* [PATCH 0/2] spacemit: fix USB2 clock and reset
@ 2026-05-18 2:58 Yixun Lan
2026-05-18 2:58 ` [PATCH 1/2] clk: spacemit: k3: fix USB2 bus clock Yixun Lan
2026-05-18 2:58 ` [PATCH 2/2] reset: spacemit: k3: fix USB2 ahb reset Yixun Lan
0 siblings, 2 replies; 4+ messages in thread
From: Yixun Lan @ 2026-05-18 2:58 UTC (permalink / raw)
To: Philipp Zabel, Stephen Boyd, Michael Turquette
Cc: linux-clk, linux-riscv, spacemit, linux-kernel, Yixun Lan,
Junzhong Pan
In current code (v7.1-rc1), the register bit of bus clock and ahb reset
for USB2 were wrongly swapped, but this didn't cause any problem, because
from setting the register bits perspective, the de-assert reset operation
is effectly equivalent to enabling the clock bit, both of them will set
value 1.
This issue was found during suspend/resume test with vendor's internal
kernel.
I've combined these two patches in one series, but would expect each
patch to go via its own subsystem as bug fix, The USB2 driver is not yet
enabled in v7.1 cycle, so it's safe that we won't break any USB2 driver.
Signed-off-by: Yixun Lan <dlan@kernel.org>
---
Yixun Lan (2):
clk: spacemit: k3: fix USB2 bus clock
reset: spacemit: k3: fix USB2 ahb reset
drivers/clk/spacemit/ccu-k3.c | 2 +-
drivers/reset/spacemit/reset-spacemit-k3.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
---
base-commit: 254f49634ee16a731174d2ae34bc50bd5f45e731
change-id: 20260428-06-clk-reset-usb-fix-a265d4e836e5
Best regards,
--
Yixun Lan <dlan@kernel.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 1/2] clk: spacemit: k3: fix USB2 bus clock
2026-05-18 2:58 [PATCH 0/2] spacemit: fix USB2 clock and reset Yixun Lan
@ 2026-05-18 2:58 ` Yixun Lan
2026-05-18 2:58 ` [PATCH 2/2] reset: spacemit: k3: fix USB2 ahb reset Yixun Lan
1 sibling, 0 replies; 4+ messages in thread
From: Yixun Lan @ 2026-05-18 2:58 UTC (permalink / raw)
To: Philipp Zabel, Stephen Boyd, Michael Turquette
Cc: linux-clk, linux-riscv, spacemit, linux-kernel, Yixun Lan,
Junzhong Pan
According to SpacemiT K3's updated docs, the USB2 ahb reset and USB2 bus
clock enable bit was wrongly swapped, the correct one should be:
Register : APMU_USB_CLK_RES_CTRL
bit[1] : usb2_port_bus_clk_en
bit[0] : usb2_port_ahb_rstn
Fixes: e371a77255b8 ("clk: spacemit: k3: add the clock tree")
Reported-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
Signed-off-by: Yixun Lan <dlan@kernel.org>
---
drivers/clk/spacemit/ccu-k3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/spacemit/ccu-k3.c b/drivers/clk/spacemit/ccu-k3.c
index e98afd59f05c..3d430f11d608 100644
--- a/drivers/clk/spacemit/ccu-k3.c
+++ b/drivers/clk/spacemit/ccu-k3.c
@@ -777,7 +777,7 @@ static const struct clk_parent_data sdh2_parents[] = {
CCU_MUX_DIV_GATE_FC_DEFINE(sdh2_clk, sdh2_parents, APMU_SDH2_CLK_RES_CTRL, 8, 3,
BIT(11), 5, 3, BIT(4), 0);
-CCU_GATE_DEFINE(usb2_bus_clk, CCU_PARENT_HW(axi_clk), APMU_USB_CLK_RES_CTRL, BIT(0), 0);
+CCU_GATE_DEFINE(usb2_bus_clk, CCU_PARENT_HW(axi_clk), APMU_USB_CLK_RES_CTRL, BIT(1), 0);
CCU_GATE_DEFINE(usb3_porta_bus_clk, CCU_PARENT_HW(axi_clk), APMU_USB_CLK_RES_CTRL, BIT(4), 0);
CCU_GATE_DEFINE(usb3_portb_bus_clk, CCU_PARENT_HW(axi_clk), APMU_USB_CLK_RES_CTRL, BIT(8), 0);
CCU_GATE_DEFINE(usb3_portc_bus_clk, CCU_PARENT_HW(axi_clk), APMU_USB_CLK_RES_CTRL, BIT(12), 0);
--
2.54.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] reset: spacemit: k3: fix USB2 ahb reset
2026-05-18 2:58 [PATCH 0/2] spacemit: fix USB2 clock and reset Yixun Lan
2026-05-18 2:58 ` [PATCH 1/2] clk: spacemit: k3: fix USB2 bus clock Yixun Lan
@ 2026-05-18 2:58 ` Yixun Lan
2026-05-26 13:23 ` Yixun Lan
1 sibling, 1 reply; 4+ messages in thread
From: Yixun Lan @ 2026-05-18 2:58 UTC (permalink / raw)
To: Philipp Zabel, Stephen Boyd, Michael Turquette
Cc: linux-clk, linux-riscv, spacemit, linux-kernel, Yixun Lan,
Junzhong Pan
According to SpacemiT K3's updated docs, the USB2 ahb reset and USB2 bus
clock enable bit was wrongly swapped, the correct one should be:
Register : APMU_USB_CLK_RES_CTRL
bit[1] : usb2_port_bus_clk_en
bit[0] : usb2_port_ahb_rstn
Fixes: a0e0c2f8c5f3 ("reset: spacemit: k3: Decouple composite reset lines")
Reported-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
Signed-off-by: Yixun Lan <dlan@kernel.org>
---
drivers/reset/spacemit/reset-spacemit-k3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/reset/spacemit/reset-spacemit-k3.c b/drivers/reset/spacemit/reset-spacemit-k3.c
index 9841f5e057b2..2e87f320cf11 100644
--- a/drivers/reset/spacemit/reset-spacemit-k3.c
+++ b/drivers/reset/spacemit/reset-spacemit-k3.c
@@ -112,7 +112,7 @@ static const struct ccu_reset_data k3_apmu_resets[] = {
[RESET_APMU_SDH0] = RESET_DATA(APMU_SDH0_CLK_RES_CTRL, 0, BIT(1)),
[RESET_APMU_SDH1] = RESET_DATA(APMU_SDH1_CLK_RES_CTRL, 0, BIT(1)),
[RESET_APMU_SDH2] = RESET_DATA(APMU_SDH2_CLK_RES_CTRL, 0, BIT(1)),
- [RESET_APMU_USB2_AHB] = RESET_DATA(APMU_USB_CLK_RES_CTRL, 0, BIT(1)),
+ [RESET_APMU_USB2_AHB] = RESET_DATA(APMU_USB_CLK_RES_CTRL, 0, BIT(0)),
[RESET_APMU_USB2_VCC] = RESET_DATA(APMU_USB_CLK_RES_CTRL, 0, BIT(2)),
[RESET_APMU_USB2_PHY] = RESET_DATA(APMU_USB_CLK_RES_CTRL, 0, BIT(3)),
[RESET_APMU_USB3_A_AHB] = RESET_DATA(APMU_USB_CLK_RES_CTRL, 0, BIT(5)),
--
2.54.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] reset: spacemit: k3: fix USB2 ahb reset
2026-05-18 2:58 ` [PATCH 2/2] reset: spacemit: k3: fix USB2 ahb reset Yixun Lan
@ 2026-05-26 13:23 ` Yixun Lan
0 siblings, 0 replies; 4+ messages in thread
From: Yixun Lan @ 2026-05-26 13:23 UTC (permalink / raw)
To: Philipp Zabel, Stephen Boyd, Michael Turquette
Cc: linux-clk, linux-riscv, spacemit, linux-kernel, Junzhong Pan
Hi Philipp Zabel,
On 02:58 Mon 18 May , Yixun Lan wrote:
> According to SpacemiT K3's updated docs, the USB2 ahb reset and USB2 bus
> clock enable bit was wrongly swapped, the correct one should be:
>
> Register : APMU_USB_CLK_RES_CTRL
> bit[1] : usb2_port_bus_clk_en
> bit[0] : usb2_port_ahb_rstn
>
> Fixes: a0e0c2f8c5f3 ("reset: spacemit: k3: Decouple composite reset lines")
> Reported-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
> Signed-off-by: Yixun Lan <dlan@kernel.org>
Would be it ok from your side to queue this patch for v7.2 cycle?
or do you want me to combine it and go via clk tree when sending PR to
Stephen? I think as long as they are accepted in same cycle, then should
be no problem, otherwise will result a broken USB2 driver.
P.S, we will activate USB2 driver for K3 in v7.2, so kicking this in
same cycle should be a good reason, no necessary to rush for v7.1 fix..
> ---
> drivers/reset/spacemit/reset-spacemit-k3.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/reset/spacemit/reset-spacemit-k3.c b/drivers/reset/spacemit/reset-spacemit-k3.c
> index 9841f5e057b2..2e87f320cf11 100644
> --- a/drivers/reset/spacemit/reset-spacemit-k3.c
> +++ b/drivers/reset/spacemit/reset-spacemit-k3.c
> @@ -112,7 +112,7 @@ static const struct ccu_reset_data k3_apmu_resets[] = {
> [RESET_APMU_SDH0] = RESET_DATA(APMU_SDH0_CLK_RES_CTRL, 0, BIT(1)),
> [RESET_APMU_SDH1] = RESET_DATA(APMU_SDH1_CLK_RES_CTRL, 0, BIT(1)),
> [RESET_APMU_SDH2] = RESET_DATA(APMU_SDH2_CLK_RES_CTRL, 0, BIT(1)),
> - [RESET_APMU_USB2_AHB] = RESET_DATA(APMU_USB_CLK_RES_CTRL, 0, BIT(1)),
> + [RESET_APMU_USB2_AHB] = RESET_DATA(APMU_USB_CLK_RES_CTRL, 0, BIT(0)),
> [RESET_APMU_USB2_VCC] = RESET_DATA(APMU_USB_CLK_RES_CTRL, 0, BIT(2)),
> [RESET_APMU_USB2_PHY] = RESET_DATA(APMU_USB_CLK_RES_CTRL, 0, BIT(3)),
> [RESET_APMU_USB3_A_AHB] = RESET_DATA(APMU_USB_CLK_RES_CTRL, 0, BIT(5)),
>
> --
> 2.54.0
>
--
Yixun Lan (dlan)
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2026-05-26 13:23 UTC | newest]
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2026-05-18 2:58 [PATCH 0/2] spacemit: fix USB2 clock and reset Yixun Lan
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2026-05-18 2:58 ` [PATCH 2/2] reset: spacemit: k3: fix USB2 ahb reset Yixun Lan
2026-05-26 13:23 ` Yixun Lan
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