Re: [PATCH v3 1/2] dt-bindings: clock: qcom: Add LPASS VA CSR HeartBeat pulse clock

Re: [PATCH v3 1/2] dt-bindings: clock: qcom: Add LPASS VA CSR HeartBeat pulse clock

[Krzysztof Kozlowski]

On Thu, Jul 23, 2026 at 04:40:40PM +0530, Sarath Ganapathiraju wrote:
> Add a binding for the Qualcomm LPASS VA CSR rate generator node that
> exposes the lpass_heartbeat_pulse clock on hawi.
> 
> The HeartBeat Pulse (also known as RateGen Pulse) synchronizes the
> start of the DMAs and Codec Interfaces for the audio usecase and can
> serve as a periodic wakeup source for the DSP.
> 
> Signed-off-by: Sarath Ganapathiraju <sarath.ganapathiraju@oss.qualcomm.com>
> ---
>  .../bindings/clock/qcom,lpass-va-csr.yaml          | 49 ++++++++++++++++++++++
>  1 file changed, 49 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,lpass-va-csr.yaml b/Documentation/devicetree/bindings/clock/qcom,lpass-va-csr.yaml

Use compatible as filename, so qcom,hawi-lpass-va-csr.yaml.

With this fixed:

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>

Best regards,
Krzysztof

Re: [PATCH v3 2/2] clk: qcom: Add LPASS VA CSR heartbeat pulse clock

[Konrad Dybcio]

On 7/23/26 1:02 PM, Sarath Ganapathiraju wrote:
> The HeartBeat Pulse (also known as RateGen Pulse) synchronizes the
> start of the DMAs and Codec Interfaces for the audio usecases and
> can serve as a periodic wakeup source for the DSP.
> 
> Add the LPASS VA CSR driver that models the rate generator as a clock
> provider so it is enabled and disabled automatically alongside the
> other clocks during runtime PM resume and suspend.
> 
> Signed-off-by: Sarath Ganapathiraju <sarath.ganapathiraju@oss.qualcomm.com>
> ---
>  drivers/clk/qcom/Kconfig        |  12 +++
>  drivers/clk/qcom/Makefile       |   1 +
>  drivers/clk/qcom/lpass-va-csr.c | 143 ++++++++++++++++++++++++++++++++
>  sound/soc/codecs/Kconfig        |   1 +

This patch spans 2 subsystems and 2 separate maintainers.. we'll need
Mark's ack for the sound/ change

>  4 files changed, 157 insertions(+)
>  create mode 100644 drivers/clk/qcom/lpass-va-csr.c
> 
> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
> index 63f271aff177..6ebdccfe37e0 100644
> --- a/drivers/clk/qcom/Kconfig
> +++ b/drivers/clk/qcom/Kconfig
> @@ -1998,6 +1998,18 @@ config CLK_GFM_LPASS_SM8250
>  	  Support for the Glitch Free Mux (GFM) Low power audio
>            subsystem (LPASS) clocks found on SM8250 SoCs.
>  
> +config QCOM_CLK_LPASS_VA_CSR

VA_CSR is the Control-and-Status-Register space of the VA Macro,
the name of the config should deifnitely focus on the heartbeat
pulse clock generator within it instead

Besides, that address space is huge, yet you're claiming it for
a single simple clock. Exposing anything else from within there
in the future will require bindings updates, which are usually a
tough sell. Is there anything else in there that we need to cover
from HLOS?

Konrad

Re: [PATCH v3 2/2] clk: qcom: Add LPASS VA CSR heartbeat pulse clock

[Sarath Ganapathiraju]

On Tue, Jul 28, 2026 at 02:12:07PM +0200, Konrad Dybcio wrote:
> This patch spans 2 subsystems and 2 separate maintainers.. we'll need
> Mark's ack for the sound/ change

Ack, will cc Mark and get his approval on next version.

> VA_CSR is the Control-and-Status-Register space of the VA Macro,
> the name of the config should definitely focus on the heartbeat
> pulse clock generator within it instead

Ack. Will rename in the next revision.

> Besides, that address space is huge, yet you're claiming it for
> a single simple clock. Exposing anything else from within there
> in the future will require bindings updates, which are usually a
> tough sell. Is there anything else in there that we need to cover
> from HLOS?

The only register block we need from HLOS is the rate generator at
offsets 0xd000-0xd010 (CTRL, COUNTER_0, DELAY). Nothing else in the
VA CSR space needs HLOS coverage for hawi. Will narrow the reg to
cover only those registers in the next revision.

Thanks,
Sarath