From: Robert Eckelmann <longnoserob@gmail.com>
To: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Cc: vladimir.zapolskiy@linaro.org, andersson@kernel.org,
bmasney@redhat.com, linux-arm-msm@vger.kernel.org,
linux-clk@vger.kernel.org, m.szyprowski@samsung.com,
mturquette@baylibre.com, sboyd@kernel.org, val@packett.cool,
david@ixit.cz
Subject: Re: [PATCH] Revert "clk: qcom: dispcc-sm8250: Enable parents for pixel clocks"
Date: Mon, 17 Aug 2026 22:12:03 +0900 [thread overview]
Message-ID: <20260817221203.462c7d31@octoberrain> (raw)
In-Reply-To: <CAO9ioeX-PB+v=OiuDakFE9NX5tDJdhjwvONJSmURKh1ABM=fgQ@mail.gmail.com>
On Thu, 13 Aug 2026 16:21:54 +0300
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> wrote:
> > Yes, please.
>
> And then almost immediately (sorry). No. The flag is correct. To
> unblock SDM845 try adding GENPD_FLAG_NO_STAY_ON to the MDSS_GDSC. The
> MDSS reset is not working / accessible, so it might be the only way
> forward for now.
>
>
Like this?
diff --git a/drivers/clk/qcom/dispcc-sdm845.c
b/drivers/clk/qcom/dispcc-sdm845.c index e060097be413..bfa657113ec0
100644 --- a/drivers/clk/qcom/dispcc-sdm845.c
+++ b/drivers/clk/qcom/dispcc-sdm845.c
@@ -764,7 +764,7 @@ static struct gdsc mdss_gdsc = {
.name = "mdss_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
- .flags = HW_CTRL | POLL_CFG_GDSCR,
+ .flags = HW_CTRL | POLL_CFG_GDSCR | GENPD_FLAG_NO_STAY_ON,
};
static struct clk_regmap *disp_cc_sdm845_clocks[] = {
This alone does not seem to solve the problem, I still get crashreports
like:
[ 3.493402] /soc@0/display-subsystem@ae00000/dsi@ae94000: Fixed
dependency cycle(s) with
/soc@0/geniqup@8c0000/i2c@88c000/hdmi-bridge@3b [ 3.513397]
/soc@0/display-subsystem@ae00000/dsi@ae94000: Fixed dependency cycle(s)
with /soc@0/display-subsystem@ae00000/display-controller@ae01000 [
3.537096] msm_dsi_phy ae94400.phy: [drm:dsi_pll_10nm_vco_prepare]
*ERROR* DSI PLL(0) lock failed, status=0x00000000 [ 3.547813]
msm_dsi_phy ae94400.phy: [drm:dsi_pll_10nm_vco_prepare] *ERROR* PLL(0)
lock failed [ 3.548807] qcom-pcie 1c00000.pcie: iATU: unroll F, 32
ob, 8 ib, align 4K, limit 4G [ 3.556493] ------------[ cut here
]------------ [ 3.556495] dsi0_phy_pll_out_dsiclk already disabled [
3.556512] WARNING: drivers/clk/clk.c:1188 at
clk_core_disable+0xb0/0xd0, CPU#4: kworker/u32:1/60 [ 3.556518]
Modules linked in: [ 3.556524] CPU: 4 UID: 0 PID: 60 Comm:
kworker/u32:1 Not tainted 7.2.0-rc7-sdm845 #1-postmarketos-qcom-sdm845
PREEMPT [ 3.556528] Hardware name: qcom Inc. SDM845 HDK/ Inc.
SDM845 HDK, BIOS 2026.07-rc1-g2abf33b7c8ea-dirty 07/01/2026 [
3.556530] Workqueue: events_unbound deferred_probe_work_func [
3.572719] qcom-pcie 1c08000.pcie: iATU: unroll F, 8 ob, 8 ib, align 4K,
limit 1024G
[ 3.573911] pstate: 604000c5 (nZCv daIF +PAN -UAO -TCO -DIT -SSBS
BTYPE=--) [ 3.573914] pc : clk_core_disable+0xb0/0xd0
[ 3.573916] lr : clk_core_disable+0xb0/0xd0
Can share the full dump off-list if wanted.
BR,
RObert Eckelmann
prev parent reply other threads:[~2026-08-17 13:12 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 0:11 [PATCH] Revert "clk: qcom: dispcc-sm8250: Enable parents for pixel clocks" Vladimir Zapolskiy
2026-07-20 13:09 ` Vladimir Zapolskiy
2026-07-20 15:00 ` Dmitry Baryshkov
2026-07-20 18:21 ` Vladimir Zapolskiy
2026-07-20 20:54 ` Dmitry Baryshkov
2026-07-20 22:39 ` Vladimir Zapolskiy
2026-07-21 23:30 ` Dmitry Baryshkov
2026-07-22 9:28 ` Vladimir Zapolskiy
2026-07-22 12:08 ` Dmitry Baryshkov
2026-08-11 8:48 ` Robert Eckelmann
2026-08-13 13:17 ` Dmitry Baryshkov
2026-08-13 13:21 ` Dmitry Baryshkov
2026-08-17 13:12 ` Robert Eckelmann [this message]
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