Linux clock framework development
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From: sashiko-bot@kernel.org
To: "Andre Przywara" <andre.przywara@arm.com>
Cc: linux-clk@vger.kernel.org, linux-sunxi@lists.linux.dev,
	robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 5/5] arm64: dts: allwinner: a523: add CPU clocks
Date: Thu, 17 Sep 2026 22:46:45 +0000	[thread overview]
Message-ID: <20260917224646.650D51F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260917223913.1855301-6-andre.przywara@arm.com>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Low] dt: sun55i-a523: incorrect #reset-cells in cpu_ccu
- [Low] dt: sun55i-a523: clock-names mismatch pll-periph0-600M
--

commit e064b2e2cf12882a6bab40a91b6eb61a493b3e06
Author: Andre Przywara <andre.przywara@arm.com>

arm64: dts: allwinner: a523: add CPU clocks

The Allwinner A523 family of SoCs feature a separate clock unit for the CPU
PLLs and muxes. This patch adds a DT node for the CPU clock controller and
lists the required clocks and sources for each CPU.

> diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> index 85ef492ffeae7..29af21372aba2 100644
> --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi

[ ... ]

> @@ -1144,5 +1153,18 @@ npu: npu@7122000 {
>  			resets = <&mcu_ccu RST_BUS_MCU_NPU>;
>  			power-domains = <&ppu PD_NPU>;
>  		};
> +
> +		cpu_ccu: clock-controller@8817000 {
> +			compatible = "allwinner,sun55i-a523-cpu-ccu";
> +			reg = <0x08817000 0x80>;
> +			clocks = <&osc24M>, <&rtc CLK_OSC32K>,
> +				 <&rtc CLK_IOSC>, <&ccu CLK_PLL_PERIPH0_2X>,
> +				 <&ccu CLK_PLL_PERIPH0_600M>;
> +			clock-names = "hosc", "losc",
> +				      "iosc", "pll-periph0-2x",
> +				      "pll-periph0-600M";

[Severity: Low]
Will this clock name cause a validation regression during dtbs_check?

In the cpu_ccu node of arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi, the
device tree uses pll-periph0-600M. This matches the driver, but the YAML
binding strictly expects pll-periph0-600m.

This case mismatch will fail validation when running make dtbs_check.

> +			#clock-cells = <1>;
> +			#reset-cells = <1>;

[Severity: Low]
Does this introduce a regression in the DT description by erroneously declaring
cpu_ccu as a reset controller provider?

The #reset-cells = <1> property in the cpu_ccu node describes it as a reset
controller, but the hardware and driver do not provide resets.

This appears to be satisfying a flawed YAML binding that erroneously mandates
it globally for all compatibles.

> +		};
>  	};
>  };

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260917223913.1855301-1-andre.przywara@arm.com?part=5

      reply	other threads:[~2026-09-17 22:46 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-17 22:39 [PATCH v2 0/5] arm64: allwinner: a523: Enable CPU clocks Andre Przywara
2026-09-17 22:39 ` [PATCH v2 1/5] clk: sunxi-ng: generalise update bit Andre Przywara
2026-09-21 15:47   ` Chen-Yu Tsai
2026-09-17 22:39 ` [PATCH v2 2/5] clk: sunxi-ng: mp: support clocks with just a shift register Andre Przywara
2026-09-18  3:51   ` Chen-Yu Tsai
2026-09-24  6:54     ` Andre Przywara
2026-09-17 22:39 ` [PATCH v2 3/5] dt-bindings: clock: sun55i-a523-ccu: Add A523 CPU CCU clock controller Andre Przywara
2026-09-17 22:46   ` sashiko-bot
2026-09-17 22:39 ` [PATCH v2 4/5] clk: sunxi-ng: add support for the A523/T527 CPU CCU Andre Przywara
2026-09-17 22:51   ` sashiko-bot
2026-09-17 22:39 ` [PATCH v2 5/5] arm64: dts: allwinner: a523: add CPU clocks Andre Przywara
2026-09-17 22:46   ` sashiko-bot [this message]

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