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From: Stephen Boyd <sboyd@kernel.org>
To: AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Conor Dooley <conor+dt@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Pablo Sun <pablo.sun@mediatek.com>, Rob Herring <robh@kernel.org>,
	Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org,
	Pablo Sun <pablo.sun@mediatek.com>
Subject: Re: [PATCH v2 2/6] clk: mediatek: clk-mt8188-topckgen: Remove univpll from parents of mfg_core_tmp
Date: Thu, 17 Oct 2024 15:25:00 -0700	[thread overview]
Message-ID: <45f562afc56223014bde8defc132023b.sboyd@kernel.org> (raw)
In-Reply-To: <20240927103005.17605-3-pablo.sun@mediatek.com>

Quoting Pablo Sun (2024-09-27 03:30:01)
> Same as MT8195, MT8188 GPU clock is primarly supplied by the dedicated
> mfgpll. The clock "mfg_core_tmp" is only used as an alt clock when
> setting mfgpll clock rate.
> 
> If we keep the univpll parents from mfg_core_tmp, when setting
> GPU frequency to 390000000, the common clock framework would switch
> the parent to univpll, instead of setting mfgpll to 390000000:
> 
>     mfgpll                            0        0        0   949999756
>     univpll                           2        2        0  2340000000
>        univpll_d6                     1        1        0   390000000
>           top_mfg_core_tmp            1        1        0   390000000
>              mfg_ck_fast_ref          1        1        0   390000000
>                 mfgcfg_bg3d           1        1        0   390000000
> 
> This results in failures when subsequent devfreq operations need to
> switch to other frequencies. So remove univpll from the parent list.
> 
> This solution is taken from commit 72d38ed720e9 ("clk: mediatek:
> clk-mt8195-topckgen: Drop univplls from mfg mux parents")
> 
> Signed-off-by: Pablo Sun <pablo.sun@mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---

Applied to clk-next

  reply	other threads:[~2024-10-17 22:25 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-27 10:29 [PATCH v2 0/6] Enable Mali GPU on MediaTek Genio 700 EVK Pablo Sun
2024-09-27 10:30 ` [PATCH v2 1/6] arm64: dts: mediatek: mt8188: Fix wrong clock provider in MFG1 power domain Pablo Sun
2024-09-27 10:30 ` [PATCH v2 2/6] clk: mediatek: clk-mt8188-topckgen: Remove univpll from parents of mfg_core_tmp Pablo Sun
2024-10-17 22:25   ` Stephen Boyd [this message]
2024-09-27 10:30 ` [PATCH v2 3/6] nvmem: mtk-efuse: Enable postprocess for mt8188 GPU speed binning Pablo Sun
2024-09-30  9:40   ` AngeloGioacchino Del Regno
2024-10-01  3:38     ` Pablo Sun
2024-10-01 15:18       ` AngeloGioacchino Del Regno
2024-09-27 10:30 ` [PATCH v2 4/6] arm64: dts: mediatek: mt8188: Add efuse for " Pablo Sun
2024-09-27 10:30 ` [PATCH v2 5/6] soc: mediatek: mediatek-regulator-coupler: Support mt8188 Pablo Sun
2024-09-30  9:29   ` AngeloGioacchino Del Regno
2024-09-27 10:30 ` [PATCH v2 6/6] arm64: dts: mediatek: mt8390-genio-700-evk: Enable Mali GPU Pablo Sun
2024-09-30  9:30   ` AngeloGioacchino Del Regno

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