From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Pablo Sun <pablo.sun@mediatek.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v2 3/6] nvmem: mtk-efuse: Enable postprocess for mt8188 GPU speed binning
Date: Mon, 30 Sep 2024 11:40:14 +0200 [thread overview]
Message-ID: <57dfe684-c9a1-4cb3-8c87-9d2fef09aed7@collabora.com> (raw)
In-Reply-To: <20240927103005.17605-4-pablo.sun@mediatek.com>
Il 27/09/24 12:30, Pablo Sun ha scritto:
> Similar to mt8186, the efuse data for mt8188's GPU speed binning
> requires post-process to convert the bit field format expected
> by the OPP table.
>
> Since mt8188 efuse is not compatible to mt8186, add a new compatible
> entry for mt8188 and enable postprocess.
>
> Signed-off-by: Pablo Sun <pablo.sun@mediatek.com>
I know I told you to just reuse the pdata from 8186, but there's something else
that came to mind, here...
...actually, the efuse block from 8188 is indeed compatible with 8186, meaning
that the register r/w, etc, are all the same (bar the addresses, yes)
So, I wonder if it's not just a better idea to not even add mt8188-efuse in this
driver's of_device_id array, and just add that to the binding so that we permit
using
efuse: efuse@11f20000 {
compatible = "mediatek,mt8188-efuse",
"mediatek,mt8186-efuse", "mediatek,efuse";
[etc]
}
Means that in mediatek,efuse.yaml you'll have to add...
- items:
- enum:
- mediatek,mt8188-efuse
- const: mediatek,mt8186-efuse
- const: mediatek,efuse <---- or without this, even.
In the end, the "mediatek,efuse" property is somewhat deprecated, so that'd
also be a good time to start the dropping process, as I imagine that future SoCs
would also need the same speedbin transformations - which means that they'll all
be compatible with 8186....
Cheers,
Angelo
> ---
> drivers/nvmem/mtk-efuse.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/nvmem/mtk-efuse.c b/drivers/nvmem/mtk-efuse.c
> index 9caf04667341..38d26e5c097a 100644
> --- a/drivers/nvmem/mtk-efuse.c
> +++ b/drivers/nvmem/mtk-efuse.c
> @@ -112,6 +112,7 @@ static const struct mtk_efuse_pdata mtk_efuse_pdata = {
> static const struct of_device_id mtk_efuse_of_match[] = {
> { .compatible = "mediatek,mt8173-efuse", .data = &mtk_efuse_pdata },
> { .compatible = "mediatek,mt8186-efuse", .data = &mtk_mt8186_efuse_pdata },
> + { .compatible = "mediatek,mt8188-efuse", .data = &mtk_mt8186_efuse_pdata },
> { .compatible = "mediatek,efuse", .data = &mtk_efuse_pdata },
> {/* sentinel */},
> };
next prev parent reply other threads:[~2024-09-30 9:40 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-27 10:29 [PATCH v2 0/6] Enable Mali GPU on MediaTek Genio 700 EVK Pablo Sun
2024-09-27 10:30 ` [PATCH v2 1/6] arm64: dts: mediatek: mt8188: Fix wrong clock provider in MFG1 power domain Pablo Sun
2024-09-27 10:30 ` [PATCH v2 2/6] clk: mediatek: clk-mt8188-topckgen: Remove univpll from parents of mfg_core_tmp Pablo Sun
2024-10-17 22:25 ` Stephen Boyd
2024-09-27 10:30 ` [PATCH v2 3/6] nvmem: mtk-efuse: Enable postprocess for mt8188 GPU speed binning Pablo Sun
2024-09-30 9:40 ` AngeloGioacchino Del Regno [this message]
2024-10-01 3:38 ` Pablo Sun
2024-10-01 15:18 ` AngeloGioacchino Del Regno
2024-09-27 10:30 ` [PATCH v2 4/6] arm64: dts: mediatek: mt8188: Add efuse for " Pablo Sun
2024-09-27 10:30 ` [PATCH v2 5/6] soc: mediatek: mediatek-regulator-coupler: Support mt8188 Pablo Sun
2024-09-30 9:29 ` AngeloGioacchino Del Regno
2024-09-27 10:30 ` [PATCH v2 6/6] arm64: dts: mediatek: mt8390-genio-700-evk: Enable Mali GPU Pablo Sun
2024-09-30 9:30 ` AngeloGioacchino Del Regno
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