* Re: [PATCH] drm/imx: Add more RGB swizzling options
2025-10-17 14:45 [PATCH] drm/imx: Add more RGB swizzling options Marek Vasut
@ 2025-10-17 15:10 ` Frank Li
2025-10-17 15:18 ` Thomas Zimmermann
2025-10-20 5:37 ` Liu Ying
1 sibling, 1 reply; 4+ messages in thread
From: Frank Li @ 2025-10-17 15:10 UTC (permalink / raw)
To: Marek Vasut
Cc: dri-devel, Abel Vesa, Conor Dooley, Fabio Estevam,
Krzysztof Kozlowski, Laurent Pinchart, Liu Ying, Lucas Stach,
Peng Fan, Pengutronix Kernel Team, Rob Herring, Shawn Guo,
Thomas Zimmermann, devicetree, imx, linux-arm-kernel, linux-clk
On Fri, Oct 17, 2025 at 04:45:38PM +0200, Marek Vasut wrote:
> Add additional buffer format swizzling options beyond XR24, the
> hardware is capable of sampling other formats, fill them in.
>
> Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
> ---
> Cc: Abel Vesa <abelvesa@kernel.org>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
> Cc: Liu Ying <victor.liu@nxp.com>
> Cc: Lucas Stach <l.stach@pengutronix.de>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Thomas Zimmermann <tzimmermann@suse.de>
> Cc: devicetree@vger.kernel.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: imx@lists.linux.dev
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-clk@vger.kernel.org
> ---
> Liu, please test on MX8qxp , I do not have that hardware.
> ---
> drivers/gpu/drm/imx/dc/dc-fu.c | 40 +++++++++++++++++++++++++++++++
> drivers/gpu/drm/imx/dc/dc-plane.c | 8 +++++++
> 2 files changed, 48 insertions(+)
>
> diff --git a/drivers/gpu/drm/imx/dc/dc-fu.c b/drivers/gpu/drm/imx/dc/dc-fu.c
> index 1d8f74babef8a..397af0e9b0236 100644
> --- a/drivers/gpu/drm/imx/dc/dc-fu.c
> +++ b/drivers/gpu/drm/imx/dc/dc-fu.c
> @@ -65,6 +65,46 @@ static const struct dc_fu_pixel_format pixel_formats[] = {
> DRM_FORMAT_XRGB8888,
> R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(0),
> R_SHIFT(16) | G_SHIFT(8) | B_SHIFT(0) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_ARGB8888,
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(8),
> + R_SHIFT(16) | G_SHIFT(8) | B_SHIFT(0) | A_SHIFT(24),
> + }, {
> + DRM_FORMAT_ABGR8888,
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(8),
> + R_SHIFT(0) | G_SHIFT(8) | B_SHIFT(16) | A_SHIFT(24),
> + }, {
> + DRM_FORMAT_XBGR8888,
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(0),
> + R_SHIFT(0) | G_SHIFT(8) | B_SHIFT(16) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_RGBA8888,
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(8),
> + R_SHIFT(24) | G_SHIFT(16) | B_SHIFT(8) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_RGBX8888,
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(0),
> + R_SHIFT(24) | G_SHIFT(16) | B_SHIFT(8) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_BGRA8888,
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(8),
> + R_SHIFT(8) | G_SHIFT(16) | B_SHIFT(24) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_BGRX8888,
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(0),
> + R_SHIFT(8) | G_SHIFT(16) | B_SHIFT(24) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_RGB888,
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(0),
> + R_SHIFT(16) | G_SHIFT(8) | B_SHIFT(0) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_BGR888,
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(0),
> + R_SHIFT(0) | G_SHIFT(8) | B_SHIFT(16) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_RGB565,
> + R_BITS(5) | G_BITS(6) | B_BITS(5) | A_BITS(0),
> + R_SHIFT(11) | G_SHIFT(5) | B_SHIFT(0) | A_SHIFT(0),
> },
> };
>
> diff --git a/drivers/gpu/drm/imx/dc/dc-plane.c b/drivers/gpu/drm/imx/dc/dc-plane.c
> index e40d5d66c5c1f..68d32b76fab95 100644
> --- a/drivers/gpu/drm/imx/dc/dc-plane.c
> +++ b/drivers/gpu/drm/imx/dc/dc-plane.c
> @@ -33,6 +33,14 @@ do { \
>
> static const uint32_t dc_plane_formats[] = {
> DRM_FORMAT_XRGB8888,
> + DRM_FORMAT_ARGB8888,
> + DRM_FORMAT_ABGR8888,
> + DRM_FORMAT_XBGR8888,
> + DRM_FORMAT_RGBA8888,
> + DRM_FORMAT_RGBX8888,
> + DRM_FORMAT_BGRA8888,
> + DRM_FORMAT_BGRX8888,
> + DRM_FORMAT_RGB565,
Is it posssible sort by name?
Frank
> };
>
> static const struct drm_plane_funcs dc_plane_funcs = {
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] drm/imx: Add more RGB swizzling options
2025-10-17 14:45 [PATCH] drm/imx: Add more RGB swizzling options Marek Vasut
2025-10-17 15:10 ` Frank Li
@ 2025-10-20 5:37 ` Liu Ying
1 sibling, 0 replies; 4+ messages in thread
From: Liu Ying @ 2025-10-20 5:37 UTC (permalink / raw)
To: Marek Vasut, dri-devel
Cc: Abel Vesa, Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
Laurent Pinchart, Lucas Stach, Peng Fan, Pengutronix Kernel Team,
Rob Herring, Shawn Guo, Thomas Zimmermann, devicetree, imx,
linux-arm-kernel, linux-clk
On 10/17/2025, Marek Vasut wrote:
> Add additional buffer format swizzling options beyond XR24, the
> hardware is capable of sampling other formats, fill them in.
This would make me change my patch series of adding i.MX8qxp DC
prefetch engine support, because that patch series supports only XR24.
But, I don't mind doing that as long as this doesn't support RG24 and
BG24.
>
> Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
The subject prefix should be specific to "drm/imx: dc-plane:".
> ---
> Cc: Abel Vesa <abelvesa@kernel.org>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
> Cc: Liu Ying <victor.liu@nxp.com>
> Cc: Lucas Stach <l.stach@pengutronix.de>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Thomas Zimmermann <tzimmermann@suse.de>
> Cc: devicetree@vger.kernel.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: imx@lists.linux.dev
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-clk@vger.kernel.org
> ---
> Liu, please test on MX8qxp , I do not have that hardware.
I've tested XB24, RX24, BX24 and RG16 on i.MX8qxp MEK board.
> ---
> drivers/gpu/drm/imx/dc/dc-fu.c | 40 +++++++++++++++++++++++++++++++
> drivers/gpu/drm/imx/dc/dc-plane.c | 8 +++++++
> 2 files changed, 48 insertions(+)
>
> diff --git a/drivers/gpu/drm/imx/dc/dc-fu.c b/drivers/gpu/drm/imx/dc/dc-fu.c
> index 1d8f74babef8a..397af0e9b0236 100644
> --- a/drivers/gpu/drm/imx/dc/dc-fu.c
> +++ b/drivers/gpu/drm/imx/dc/dc-fu.c
> @@ -65,6 +65,46 @@ static const struct dc_fu_pixel_format pixel_formats[] = {
> DRM_FORMAT_XRGB8888,
> R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(0),
> R_SHIFT(16) | G_SHIFT(8) | B_SHIFT(0) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_ARGB8888,
Since we only support primary plane and this one contains alpha component,
I'd prefer to seeing it being supported when overlay plane is enabled in the
future, not now.
Same to the other formats with alpha component.
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(8),
> + R_SHIFT(16) | G_SHIFT(8) | B_SHIFT(0) | A_SHIFT(24),
> + }, {
> + DRM_FORMAT_ABGR8888,
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(8),
> + R_SHIFT(0) | G_SHIFT(8) | B_SHIFT(16) | A_SHIFT(24),
> + }, {
> + DRM_FORMAT_XBGR8888,
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(0),
> + R_SHIFT(0) | G_SHIFT(8) | B_SHIFT(16) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_RGBA8888,
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(8),
> + R_SHIFT(24) | G_SHIFT(16) | B_SHIFT(8) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_RGBX8888,
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(0),
> + R_SHIFT(24) | G_SHIFT(16) | B_SHIFT(8) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_BGRA8888,
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(8),
> + R_SHIFT(8) | G_SHIFT(16) | B_SHIFT(24) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_BGRX8888,
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(0),
> + R_SHIFT(8) | G_SHIFT(16) | B_SHIFT(24) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_RGB888,
This is not in dc_plane_formats[] below.
Also, I don't think the prefetch engines(DPRC + PRG) of i.MX8qxp/qm DC
support this pixel format, though the DC itself seems to support it(but
NXP downstream kernel doesn't support it). So, in order not to support
bypassing the prefetch engines in runtime(which makes the driver a lot
more complicated), I hope that we don't bother to support it(even forever).
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(0),
> + R_SHIFT(16) | G_SHIFT(8) | B_SHIFT(0) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_BGR888,
Ditto.
> + R_BITS(8) | G_BITS(8) | B_BITS(8) | A_BITS(0),
> + R_SHIFT(0) | G_SHIFT(8) | B_SHIFT(16) | A_SHIFT(0),
> + }, {
> + DRM_FORMAT_RGB565,
> + R_BITS(5) | G_BITS(6) | B_BITS(5) | A_BITS(0),
> + R_SHIFT(11) | G_SHIFT(5) | B_SHIFT(0) | A_SHIFT(0),
> },
> };
>
> diff --git a/drivers/gpu/drm/imx/dc/dc-plane.c b/drivers/gpu/drm/imx/dc/dc-plane.c
> index e40d5d66c5c1f..68d32b76fab95 100644
> --- a/drivers/gpu/drm/imx/dc/dc-plane.c
> +++ b/drivers/gpu/drm/imx/dc/dc-plane.c
> @@ -33,6 +33,14 @@ do { \
>
> static const uint32_t dc_plane_formats[] = {
> DRM_FORMAT_XRGB8888,
> + DRM_FORMAT_ARGB8888,
> + DRM_FORMAT_ABGR8888,
> + DRM_FORMAT_XBGR8888,
> + DRM_FORMAT_RGBA8888,
> + DRM_FORMAT_RGBX8888,
> + DRM_FORMAT_BGRA8888,
> + DRM_FORMAT_BGRX8888,
> + DRM_FORMAT_RGB565,
I suppose that this patch may support only the below formats for now.
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_RGBX8888,
+ DRM_FORMAT_BGRX8888,
+ DRM_FORMAT_RGB565,
> };
>
> static const struct drm_plane_funcs dc_plane_funcs = {
--
Regards,
Liu Ying
^ permalink raw reply [flat|nested] 4+ messages in thread