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From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: Chen-Yu Tsai <wenst@chromium.org>
Cc: <mturquette@baylibre.com>, <sboyd@kernel.org>,
	<matthias.bgg@gmail.com>, <p.zabel@pengutronix.de>,
	<angelogioacchino.delregno@collabora.com>,
	<chun-jie.chen@mediatek.com>, <yong.liang@mediatek.com>,
	<runyang.chen@mediatek.com>, <linux-kernel@vger.kernel.org>,
	<allen-kh.cheng@mediatek.com>, <linux-clk@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: Re: [PATCH 1/7] clk: mediatek: reset: Correct the logic of setting register
Date: Tue, 19 Apr 2022 14:38:40 +0800	[thread overview]
Message-ID: <7e6ca7055ad6c236cb43b73c0b32a435033bb37d.camel@mediatek.com> (raw)
In-Reply-To: <CAGXv+5FXTft7-E5LnuZdNo8Tq6OKOKwt58GgJD_+z1N5u6B8yw@mail.gmail.com>

On Tue, 2022-04-19 at 13:48 +0800, Chen-Yu Tsai wrote:
> Hi,
> 
> On Mon, Apr 18, 2022 at 9:22 PM Rex-BC Chen <rex-bc.chen@mediatek.com
> > wrote:
> > 
> 
> The subject could be written as "Fix written reset bit offset" to
> make it
> more specific.

Hello ChenYu,

I will update the topic in next version.
Thanks for your suggestion.

BRs,
Rex

> 
> > Original assert/deassert bit is BIT(0), but it's more resonable to
> > modify
> > them to BIT(id % 32) which is based on id.
> > 
> > This patch will not influence any previous driver because the reset
> > is
> > only used for thermal. The id (MT8183_INFRACFG_AO_THERM_SW_RST) is
> > 0.
> > 
> > Fixes: 64ebb57a3df6 ("clk: reset: Modify reset-controller driver")
> > Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
> 
> Otherwise,
> 
> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>


  reply	other threads:[~2022-04-19  6:38 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-18 13:21 [PATCH 0/7] Cleanup MediaTek clk reset drivers Rex-BC Chen
2022-04-18 13:21 ` [PATCH 1/7] clk: mediatek: reset: Correct the logic of setting register Rex-BC Chen
2022-04-19  5:48   ` Chen-Yu Tsai
2022-04-19  6:38     ` Rex-BC Chen [this message]
2022-04-18 13:21 ` [PATCH 2/7] clk: mediatek: reset: Rename reset function Rex-BC Chen
2022-04-19  5:57   ` Chen-Yu Tsai
2022-04-19  6:37     ` Rex-BC Chen
2022-04-19  6:59       ` Chen-Yu Tsai
2022-04-18 13:21 ` [PATCH 3/7] clk: mediatek: reset: Merge and revise reset register function Rex-BC Chen
2022-04-19  7:26   ` Chen-Yu Tsai
2022-04-19  8:15     ` Rex-BC Chen
2022-04-18 13:21 ` [PATCH 4/7] clk: mediatek: reset: Add reset.h Rex-BC Chen
2022-04-19 10:46   ` AngeloGioacchino Del Regno
2022-04-20  2:16     ` Rex-BC Chen
2022-04-18 13:21 ` [PATCH 5/7] clk: mediatek: reset: Revise structure to control reset register Rex-BC Chen
2022-04-19 10:46   ` AngeloGioacchino Del Regno
2022-04-20  2:20     ` Rex-BC Chen
2022-04-18 13:21 ` [PATCH 6/7] clk: mediatek: reset: Add support for unregister reset controller Rex-BC Chen
2022-04-18 13:21 ` [PATCH 7/7] clk: mediatek: reset: Add reset support for simple probe/remove Rex-BC Chen

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