From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Taniya Das <quic_tdas@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, Stephen Boyd <swboyd@chromium.org>
Subject: Re: [PATCH 08/15] clk: qcom: gcc-qcs404: get rid of the test clock
Date: Sat, 17 Dec 2022 16:09:35 +0100 [thread overview]
Message-ID: <8ffa5929-e48e-a7ff-bdf6-71d4fa699fd7@linaro.org> (raw)
In-Reply-To: <20221217001730.540502-9-dmitry.baryshkov@linaro.org>
On 17.12.2022 01:17, Dmitry Baryshkov wrote:
> The test clock isn't in the bindings and apparently it's not used by
> anyone upstream. Remove it.
>
> Suggested-by: Stephen Boyd <swboyd@chromium.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
> drivers/clk/qcom/gcc-qcs404.c | 34 ----------------------------------
> 1 file changed, 34 deletions(-)
>
> diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c
> index 5636c6524d0f..fb94c57a00af 100644
> --- a/drivers/clk/qcom/gcc-qcs404.c
> +++ b/drivers/clk/qcom/gcc-qcs404.c
> @@ -22,7 +22,6 @@
> #include "reset.h"
>
> enum {
> - P_CORE_BI_PLL_TEST_SE,
> P_DSI0_PHY_PLL_OUT_BYTECLK,
> P_DSI0_PHY_PLL_OUT_DSICLK,
> /* P_GPLL0_OUT_AUX, */
> @@ -41,29 +40,24 @@ enum {
> static const struct parent_map gcc_parent_map_0[] = {
> { P_XO, 0 },
> { P_GPLL0_OUT_MAIN, 1 },
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_0[] = {
> "cxo",
> "gpll0_out_main",
> - "core_bi_pll_test_se",
> };
>
> static const char * const gcc_parent_names_ao_0[] = {
> "cxo",
> "gpll0_ao_out_main",
> - "core_bi_pll_test_se",
> };
>
> static const struct parent_map gcc_parent_map_1[] = {
> { P_XO, 0 },
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_1[] = {
> "cxo",
> - "core_bi_pll_test_se",
> };
>
> static const struct parent_map gcc_parent_map_2[] = {
> @@ -84,54 +78,46 @@ static const struct parent_map gcc_parent_map_3[] = {
> { P_XO, 0 },
> { P_GPLL0_OUT_MAIN, 1 },
> { P_GPLL6_OUT_AUX, 2 },
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_3[] = {
> "cxo",
> "gpll0_out_main",
> "gpll6_out_aux",
> - "core_bi_pll_test_se",
> };
>
> static const struct parent_map gcc_parent_map_4[] = {
> { P_XO, 0 },
> { P_GPLL1_OUT_MAIN, 1 },
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_4[] = {
> "cxo",
> "gpll1_out_main",
> - "core_bi_pll_test_se",
> };
>
> static const struct parent_map gcc_parent_map_5[] = {
> { P_XO, 0 },
> { P_DSI0_PHY_PLL_OUT_BYTECLK, 1 },
> /* { P_GPLL0_OUT_AUX, 2 }, */
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_5[] = {
> "cxo",
> "dsi0pllbyte",
> /* "gpll0_out_aux", */
> - "core_bi_pll_test_se",
> };
>
> static const struct parent_map gcc_parent_map_6[] = {
> { P_XO, 0 },
> { P_DSI0_PHY_PLL_OUT_BYTECLK, 2 },
> /* { P_GPLL0_OUT_AUX, 3 }, */
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_6[] = {
> "cxo",
> "dsi0pllbyte",
> /* "gpll0_out_aux", */
> - "core_bi_pll_test_se",
> };
>
> static const struct parent_map gcc_parent_map_7[] = {
> @@ -140,7 +126,6 @@ static const struct parent_map gcc_parent_map_7[] = {
> { P_GPLL3_OUT_MAIN, 2 },
> { P_GPLL6_OUT_AUX, 3 },
> /* { P_GPLL4_OUT_AUX, 4 }, */
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_7[] = {
> @@ -149,19 +134,16 @@ static const char * const gcc_parent_names_7[] = {
> "gpll3_out_main",
> "gpll6_out_aux",
> /* "gpll4_out_aux", */
> - "core_bi_pll_test_se",
> };
>
> static const struct parent_map gcc_parent_map_8[] = {
> { P_XO, 0 },
> { P_HDMI_PHY_PLL_CLK, 1 },
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_8[] = {
> "cxo",
> "hdmi_pll",
> - "core_bi_pll_test_se",
> };
>
> static const struct parent_map gcc_parent_map_9[] = {
> @@ -169,7 +151,6 @@ static const struct parent_map gcc_parent_map_9[] = {
> { P_GPLL0_OUT_MAIN, 1 },
> { P_DSI0_PHY_PLL_OUT_DSICLK, 2 },
> { P_GPLL6_OUT_AUX, 3 },
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_9[] = {
> @@ -177,45 +158,38 @@ static const char * const gcc_parent_names_9[] = {
> "gpll0_out_main",
> "dsi0pll",
> "gpll6_out_aux",
> - "core_bi_pll_test_se",
> };
>
> static const struct parent_map gcc_parent_map_10[] = {
> { P_XO, 0 },
> { P_SLEEP_CLK, 1 },
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_10[] = {
> "cxo",
> "sleep_clk",
> - "core_bi_pll_test_se",
> };
>
> static const struct parent_map gcc_parent_map_11[] = {
> { P_XO, 0 },
> { P_PCIE_0_PIPE_CLK, 1 },
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_11[] = {
> "cxo",
> "pcie_0_pipe_clk",
> - "core_bi_pll_test_se",
> };
>
> static const struct parent_map gcc_parent_map_12[] = {
> { P_XO, 0 },
> { P_DSI0_PHY_PLL_OUT_DSICLK, 1 },
> /* { P_GPLL0_OUT_AUX, 2 }, */
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_12[] = {
> "cxo",
> "dsi0pll",
> /* "gpll0_out_aux", */
> - "core_bi_pll_test_se",
> };
>
> static const struct parent_map gcc_parent_map_13[] = {
> @@ -223,7 +197,6 @@ static const struct parent_map gcc_parent_map_13[] = {
> { P_GPLL0_OUT_MAIN, 1 },
> { P_GPLL4_OUT_MAIN, 2 },
> { P_GPLL6_OUT_AUX, 3 },
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_13[] = {
> @@ -231,47 +204,40 @@ static const char * const gcc_parent_names_13[] = {
> "gpll0_out_main",
> "gpll4_out_main",
> "gpll6_out_aux",
> - "core_bi_pll_test_se",
> };
>
> static const struct parent_map gcc_parent_map_14[] = {
> { P_XO, 0 },
> { P_GPLL0_OUT_MAIN, 1 },
> /* { P_GPLL4_OUT_AUX, 2 }, */
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_14[] = {
> "cxo",
> "gpll0_out_main",
> /* "gpll4_out_aux", */
> - "core_bi_pll_test_se",
> };
>
> static const struct parent_map gcc_parent_map_15[] = {
> { P_XO, 0 },
> /* { P_GPLL0_OUT_AUX, 2 }, */
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_15[] = {
> "cxo",
> /* "gpll0_out_aux", */
> - "core_bi_pll_test_se",
> };
>
> static const struct parent_map gcc_parent_map_16[] = {
> { P_XO, 0 },
> { P_GPLL0_OUT_MAIN, 1 },
> /* { P_GPLL0_OUT_AUX, 2 }, */
> - { P_CORE_BI_PLL_TEST_SE, 7 },
> };
>
> static const char * const gcc_parent_names_16[] = {
> "cxo",
> "gpll0_out_main",
> /* "gpll0_out_aux", */
> - "core_bi_pll_test_se",
> };
>
> static struct clk_fixed_factor cxo = {
next prev parent reply other threads:[~2022-12-17 15:09 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-17 0:17 [PATCH 00/15] clk: qcom: gcc-qcs404: convert to parent_data Dmitry Baryshkov
2022-12-17 0:17 ` [PATCH 01/15] dt-bindings: clock: qcom: gcc-qcs404: add two GDSC entries Dmitry Baryshkov
2022-12-19 9:13 ` Krzysztof Kozlowski
2022-12-17 0:17 ` [PATCH 02/15] dt-bindings: clock: qcom: gcc-qcs404: switch to gcc.yaml Dmitry Baryshkov
2022-12-19 9:13 ` Krzysztof Kozlowski
2022-12-17 0:17 ` [PATCH 03/15] dt-bindings: clock: qcom: gcc-qcs404: define clocks/clock-names for QCS404 Dmitry Baryshkov
2022-12-19 9:14 ` Krzysztof Kozlowski
2022-12-17 0:17 ` [PATCH 04/15] clk: qcom: gcc-qcs404: use ARRAY_SIZE instead of specifying num_parents Dmitry Baryshkov
2022-12-17 15:07 ` Konrad Dybcio
2022-12-17 0:17 ` [PATCH 05/15] clk: qcom: gcc-qcs404: disable gpll[04]_out_aux parents Dmitry Baryshkov
2022-12-17 15:08 ` Konrad Dybcio
2022-12-17 17:54 ` Dmitry Baryshkov
2022-12-17 0:17 ` [PATCH 06/15] clk: qcom: gcc-qcs404: fix names of the DSI clocks used as parents Dmitry Baryshkov
2022-12-17 15:08 ` Konrad Dybcio
2022-12-17 0:17 ` [PATCH 07/15] clk: qcom: gcc-qcs404: fix the name of the HDMI PLL clock Dmitry Baryshkov
2022-12-17 15:09 ` Konrad Dybcio
2022-12-17 0:17 ` [PATCH 08/15] clk: qcom: gcc-qcs404: get rid of the test clock Dmitry Baryshkov
2022-12-17 15:09 ` Konrad Dybcio [this message]
2022-12-17 0:17 ` [PATCH 09/15] clk: qcom: gcc-qcs404: move PLL clocks up Dmitry Baryshkov
2022-12-17 15:10 ` Konrad Dybcio
2022-12-17 0:17 ` [PATCH 10/15] clk: qcom: gcc-qcs404: use parent_hws/_data instead of parent_names Dmitry Baryshkov
2022-12-17 15:13 ` Konrad Dybcio
2022-12-17 15:14 ` Konrad Dybcio
2022-12-17 17:56 ` Dmitry Baryshkov
2022-12-17 0:17 ` [PATCH 11/15] clk: qcom: gcc-qcs404: sort out the cxo clock Dmitry Baryshkov
2022-12-17 15:15 ` Konrad Dybcio
2022-12-17 0:17 ` [PATCH 12/15] clk: qcom: gcc-qcs404: add support for GDSCs Dmitry Baryshkov
2022-12-17 15:15 ` Konrad Dybcio
2022-12-17 0:17 ` [PATCH 13/15] arm64: dts: qcom: qcs404: use symbol names for PCIe resets Dmitry Baryshkov
2022-12-17 15:16 ` Konrad Dybcio
2022-12-17 0:17 ` [PATCH 14/15] arm64: dts: qcom: qcs404: add power-domains-cells to gcc node Dmitry Baryshkov
2022-12-17 15:16 ` Konrad Dybcio
2022-12-17 0:17 ` [PATCH 15/15] arm64: dts: qcom: qcs404: add clocks to the " Dmitry Baryshkov
2022-12-17 15:17 ` Konrad Dybcio
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=8ffa5929-e48e-a7ff-bdf6-71d4fa699fd7@linaro.org \
--to=konrad.dybcio@linaro.org \
--cc=agross@kernel.org \
--cc=andersson@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dmitry.baryshkov@linaro.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=quic_tdas@quicinc.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=swboyd@chromium.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox