Re: [PATCH 10/11] arm64: dts: qcom: ipq5018: Add MP03.5-c1 board support

[Kathiravan T <quic_kathirav@quicinc.com>]

On 3/7/2023 10:11 AM, Manikanta Mylavarapu wrote:
> Add initial device tree support for the MP03.5-C1 board.
>
> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
> ---
>   arch/arm64/boot/dts/qcom/Makefile             |  1 +
>   .../arm64/boot/dts/qcom/ipq5018-mp03.5-c1.dts | 64 +++++++++++++++++++
>   2 files changed, 65 insertions(+)
>   create mode 100644 arch/arm64/boot/dts/qcom/ipq5018-mp03.5-c1.dts
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index b77a95e97a56..10d1eafe57e4 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= apq8094-sony-xperia-kitakami-karin_windy.dtb
>   dtb-$(CONFIG_ARCH_QCOM)	+= apq8096-db820c.dtb
>   dtb-$(CONFIG_ARCH_QCOM)	+= apq8096-ifc6640.dtb
>   dtb-$(CONFIG_ARCH_QCOM)	+= ipq5018-mp03.1-c2.dtb
> +dtb-$(CONFIG_ARCH_QCOM)	+= ipq5018-mp03.5-c1.dtb
>   dtb-$(CONFIG_ARCH_QCOM)	+= ipq6018-cp01-c1.dtb
>   dtb-$(CONFIG_ARCH_QCOM)	+= ipq8074-hk01.dtb
>   dtb-$(CONFIG_ARCH_QCOM)	+= ipq8074-hk10-c1.dtb
> diff --git a/arch/arm64/boot/dts/qcom/ipq5018-mp03.5-c1.dts b/arch/arm64/boot/dts/qcom/ipq5018-mp03.5-c1.dts
> new file mode 100644
> index 000000000000..51ddd7367ac6
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/ipq5018-mp03.5-c1.dts
> @@ -0,0 +1,64 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
> +/*
> + * IPQ5018 CP01 board device tree source
> + *
> + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include "ipq5018.dtsi"
> +
> +/ {
> +	model = "Qualcomm Technologies, Inc. IPQ5018/AP-MP03.5-C1";
> +	compatible = "qcom,ipq5018-mp03.5-c1", "qcom,ipq5018";
> +
> +	aliases {
> +		serial0 = &blsp1_uart1;
> +	};
> +
> +	chosen {
> +		bootargs = "console=ttyMSM0,115200,n8 rw init=/init swiotlb=1 coherent_pool=2M";


Is the bootargs required?


> +		stdout-path = "serial0:115200n8";
> +	};
> +};
> +
> +&tlmm {
> +	blsp0_uart_pins: uart_pins {


node name should be uart-state {. Didn't dtbs_check complain it or am I 
missing something?


> +		pins = "gpio20", "gpio21";
> +		function = "blsp0_uart0";
> +		bias-disable;
> +	};
> +};
> +
> +&blsp1_uart1 {
> +	pinctrl-0 = <&blsp0_uart_pins>;
> +	pinctrl-names = "default";
> +	status = "ok";


s/ok/okay/


> +};
> +
> +&q6v5_wcss {
> +	q6_wcss_pd1: remoteproc_pd1 {
> +		interrupts-extended = <&wcss_smp2p_in 8 0>,
> +				<&wcss_smp2p_in 9 0>,
> +				<&wcss_smp2p_in 12 0>,
> +				<&wcss_smp2p_in 11 0>;


please align all these entries


> +		interrupt-names = "fatal",
> +				"ready",
> +				"spawn-ack",
> +				"stop-ack";
> +		qcom,smem-states = <&wcss_smp2p_out 8>,
> +				<&wcss_smp2p_out 9>,
> +				<&wcss_smp2p_out 10>;
> +		qcom,smem-state-names = "shutdown",
> +					"stop",
> +					"spawn";
> +	};


leave a blank line


> +	q6_wcss_pd2: remoteproc_pd2 {
> +		status = "okay";
> +	};
> +
> +	q6_wcss_pd3: remoteproc_pd3 {
> +		status = "okay";
> +	};
> +};