From: Drew Fustini <fustini@kernel.org>
To: Icenowy Zheng <uwu@icenowy.me>
Cc: Guo Ren <guoren@kernel.org>, Fu Wei <wefu@redhat.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Michal Wilczynski <m.wilczynski@samsung.com>,
linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/4] clk: thead: Misc changes to TH1520 clock driver
Date: Tue, 12 Aug 2025 09:24:15 -0700 [thread overview]
Message-ID: <aJtqrz9y4/hR8fEu@x1> (raw)
In-Reply-To: <50a61990b5009217dcc0ed74142c4ffeba137f73.camel@icenowy.me>
On Tue, Aug 12, 2025 at 09:42:23PM +0800, Icenowy Zheng wrote:
> 在 2025-08-12星期二的 13:42 +0800,Icenowy Zheng写道:
> > This patchset is my changes to the TH1520 clock driver, mainly for
> > supporting the display controller (the first 3).
> >
> > The first two are functionality additions, with the first one adding
> > support for enabling/disabling PLLs (for DPU PLL) and the second one
> > adding support for changing DPU dividers.
> >
> > The 3rd one is to address hang issues met when testing the DPU driver
> > w/o clk_ignore_unused command line option.
> >
> > The 4th one has no relationship to display, and only exists for my
> > need
> > to change an arbitrary GPIO (well, GPIO3_3, the one controlling the
> > fan
> > on Lichee Pi 4A) with gpioset.
> >
> > This patchset has a dependency (a 0th one) [1].
> >
> > [1]
> > https://lore.kernel.org/linux-riscv/20250809-fix_clocks_thead_aug_9-v1-1-299c33d7a593@samsung.com/
> >
>
> Oops, looks like this patchset deserves a new revision now...
Thanks, that does make it easier to apply with 'b4 shazam'.
> PATCH 2/4 has a round_rate() implementation, which is considered out-
> of-date and determine_rate() will replace it.
I saw your reply over in the big patchset from Brian Masney. That's good
that we will be able to skip adding round_rate() to the driver.
> PATCH 3/4 was broken during rebasing.
>
> PATCH 4/4 is found to be not working (and even makes padctrl0 an orphan
> clock). Yao Zi told me that I need to first do some changes to ccu_gate
> code.
Is there a way to test the functionality without additional patches from
your branch?
I look forward to v2. Thanks for working on the display.
-Drew
next prev parent reply other threads:[~2025-08-12 16:24 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-12 5:42 [PATCH 0/4] clk: thead: Misc changes to TH1520 clock driver Icenowy Zheng
2025-08-12 5:42 ` [PATCH 1/4] clk: thead: add support for enabling/disabling PLLs Icenowy Zheng
2025-08-12 5:42 ` [PATCH 2/4] clk: thead: support changing DPU pixel clock rate Icenowy Zheng
2025-08-13 2:04 ` Troy Mitchell
2025-08-13 5:54 ` Icenowy Zheng
2025-08-21 18:29 ` Brian Masney
2025-08-12 5:42 ` [PATCH 3/4] clk: thead: th1520-ap: set all AXI clocks to CLK_IS_CRITICAL Icenowy Zheng
2025-08-12 5:56 ` Icenowy Zheng
2025-08-12 6:04 ` [PATCH 3/4 FIXED] " Icenowy Zheng
2025-08-12 6:26 ` Drew Fustini
2025-08-12 6:23 ` [PATCH 3/4] " Drew Fustini
2025-08-12 5:42 ` [PATCH 4/4] clk: thead: th1520-ap: fix parent of padctrl0 clock Icenowy Zheng
2025-08-12 6:04 ` [PATCH 4/4 FIXED] " Icenowy Zheng
2025-08-12 9:17 ` Icenowy Zheng
2025-08-12 13:42 ` [PATCH 0/4] clk: thead: Misc changes to TH1520 clock driver Icenowy Zheng
2025-08-12 16:24 ` Drew Fustini [this message]
2025-08-12 19:50 ` Icenowy Zheng
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