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From: Yu Tu <yu.tu@amlogic.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	<linux-clk@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-amlogic@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: <kelvin.zhang@amlogic.com>
Subject: Re: [PATCH V5 4/4] arm64: dts: meson: add S4 Soc Peripheral clock controller in DT
Date: Wed, 23 Nov 2022 22:23:17 +0800	[thread overview]
Message-ID: <c3a1a0ce-94eb-6cce-34b2-d639b8116deb@amlogic.com> (raw)
In-Reply-To: <663d8e29-b47f-8135-8b4e-c95b68559367@linaro.org>



On 2022/11/23 22:12, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
> 
> On 23/11/2022 14:23, Yu Tu wrote:
>>>> ../patch_clk_v5_1122/0004-arm64-dts-meson-add-S4-Soc-Peripheral-clock-controll.patch
>>>> has no obvious style problems and is ready for submission.
>>>>
>>>
>>> This is a checkpatch output. I am talking about DTS broken. dtc should
>>> warn you.
>>
>> Do you mean I will have wraning in compiling?
>> I actually compiled without warning.
>> ccf$ make ARCH=arm64 dtbs -j12
>>     DTC     arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dtb
>>
> 
> Nope:
> 
> ../arch/arm64/boot/dts/amlogic/meson-s4.dtsi:105.35-127.6: Warning
> (unit_address_vs_reg): /soc/apb4@fe000000/clock-controller: node has a
> reg or ranges property, but no unit name
> 
> Test your patches better before using reviewers time for trivial
> compile-time fixes. The same rules for C code apply for DTS.
> 

Like this:
	clkc_periphs: clock-controller@0 { 

                     compatible = "amlogic,s4-peripherals-clkc"; 

                     reg = <0x0 0x0 0x0 0x49c>;
You mean it should be, right?

> Best regards,
> Krzysztof
> 
> .

  reply	other threads:[~2022-11-23 14:24 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-23  2:13 [PATCH V5 0/4] Add S4 SoC PLL and Peripheral clock controller Yu Tu
2022-11-23  2:13 ` [PATCH V5 1/4] clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver and bindings Yu Tu
2022-11-23 10:08   ` Krzysztof Kozlowski
2022-11-23 11:16     ` Yu Tu
2022-11-23 13:05       ` Krzysztof Kozlowski
2022-11-23 13:23       ` Neil Armstrong
2022-11-23 13:53         ` Krzysztof Kozlowski
2022-11-25  9:23           ` Jerome Brunet
2022-11-28  7:39             ` Yu Tu
2022-11-28 12:33               ` Jerome Brunet
2022-11-28 13:30                 ` Yu Tu
2022-12-01  8:36                   ` neil.armstrong
2022-12-01 11:33                     ` Yu Tu
2022-11-23 13:54         ` Yu Tu
2022-11-23 13:57           ` neil.armstrong
2022-11-23  2:13 ` [PATCH V5 2/4] arm64: dts: meson: add S4 Soc PLL clock controller in DT Yu Tu
2022-11-23  2:13 ` [PATCH V5 4/4] arm64: dts: meson: add S4 Soc Peripheral " Yu Tu
2022-11-23 10:10   ` Krzysztof Kozlowski
2022-11-23 11:27     ` Yu Tu
2022-11-23 13:02       ` Krzysztof Kozlowski
2022-11-23 13:23         ` Yu Tu
2022-11-23 14:12           ` Krzysztof Kozlowski
2022-11-23 14:23             ` Yu Tu [this message]
2022-11-23 13:27     ` Neil Armstrong
2022-11-23 13:38       ` Yu Tu
2022-11-23 14:13       ` Krzysztof Kozlowski
2022-11-23 14:21         ` neil.armstrong
2022-11-23 14:27           ` Yu Tu
     [not found] ` <20221123021346.18136-4-yu.tu@amlogic.com>
2022-11-23 10:09   ` [PATCH V5 3/4] clk: meson: s4: add s4 SoC peripheral clock controller driver and bindings Krzysztof Kozlowski
2022-11-23 11:22     ` Yu Tu
2022-11-23 13:06       ` Krzysztof Kozlowski
2022-11-23 14:08         ` Yu Tu
     [not found]   ` <1jbkov2vb9.fsf@starbuckisacylon.baylibre.com>
     [not found]     ` <81d9a794-2920-64f1-1d80-50653113624c@amlogic.com>
2022-11-28 12:23       ` Jerome Brunet
2022-11-28 14:02         ` Yu Tu

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