From: Yu Tu <yu.tu@amlogic.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
<linux-clk@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-amlogic@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Jerome Brunet <jbrunet@baylibre.com>,
Kevin Hilman <khilman@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: <kelvin.zhang@amlogic.com>
Subject: Re: [PATCH V5 3/4] clk: meson: s4: add s4 SoC peripheral clock controller driver and bindings
Date: Wed, 23 Nov 2022 19:22:05 +0800 [thread overview]
Message-ID: <cf7295c7-3ec6-3017-0c21-167da06e3214@amlogic.com> (raw)
In-Reply-To: <09a443b3-4e27-a751-ba2c-057d69363a13@linaro.org>
On 2022/11/23 18:09, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
>
> On 23/11/2022 03:13, Yu Tu wrote:
>> Add the peripherals clock controller found and bindings in the s4 SoC family.
>>
>> Signed-off-by: Yu Tu <yu.tu@amlogic.com>
>> ---
>> .../clock/amlogic,s4-peripherals-clkc.yaml | 105 +
>
> No, this is total mess now.
>
> Additionally, you received a lot of feedback but your changelog says only:
> "V3 -> V4: change format and clock flags."
> so you ignored entire feedback?
>
> That's not the way to work with patches.
Hi Krzysztof,
You can check the previous email reply. Now I don't know who to follow
your advice or Jerome's. I'm confused. Maybe you need to come to a
conclusion. So I can change it in the next patch.
>
> Best regards,
> Krzysztof
>
> .
next prev parent reply other threads:[~2022-11-23 11:23 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-23 2:13 [PATCH V5 0/4] Add S4 SoC PLL and Peripheral clock controller Yu Tu
2022-11-23 2:13 ` [PATCH V5 1/4] clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver and bindings Yu Tu
2022-11-23 10:08 ` Krzysztof Kozlowski
2022-11-23 11:16 ` Yu Tu
2022-11-23 13:05 ` Krzysztof Kozlowski
2022-11-23 13:23 ` Neil Armstrong
2022-11-23 13:53 ` Krzysztof Kozlowski
2022-11-25 9:23 ` Jerome Brunet
2022-11-28 7:39 ` Yu Tu
2022-11-28 12:33 ` Jerome Brunet
2022-11-28 13:30 ` Yu Tu
2022-12-01 8:36 ` neil.armstrong
2022-12-01 11:33 ` Yu Tu
2022-11-23 13:54 ` Yu Tu
2022-11-23 13:57 ` neil.armstrong
2022-11-23 2:13 ` [PATCH V5 2/4] arm64: dts: meson: add S4 Soc PLL clock controller in DT Yu Tu
2022-11-23 2:13 ` [PATCH V5 4/4] arm64: dts: meson: add S4 Soc Peripheral " Yu Tu
2022-11-23 10:10 ` Krzysztof Kozlowski
2022-11-23 11:27 ` Yu Tu
2022-11-23 13:02 ` Krzysztof Kozlowski
2022-11-23 13:23 ` Yu Tu
2022-11-23 14:12 ` Krzysztof Kozlowski
2022-11-23 14:23 ` Yu Tu
2022-11-23 13:27 ` Neil Armstrong
2022-11-23 13:38 ` Yu Tu
2022-11-23 14:13 ` Krzysztof Kozlowski
2022-11-23 14:21 ` neil.armstrong
2022-11-23 14:27 ` Yu Tu
[not found] ` <20221123021346.18136-4-yu.tu@amlogic.com>
2022-11-23 10:09 ` [PATCH V5 3/4] clk: meson: s4: add s4 SoC peripheral clock controller driver and bindings Krzysztof Kozlowski
2022-11-23 11:22 ` Yu Tu [this message]
2022-11-23 13:06 ` Krzysztof Kozlowski
2022-11-23 14:08 ` Yu Tu
[not found] ` <1jbkov2vb9.fsf@starbuckisacylon.baylibre.com>
[not found] ` <81d9a794-2920-64f1-1d80-50653113624c@amlogic.com>
2022-11-28 12:23 ` Jerome Brunet
2022-11-28 14:02 ` Yu Tu
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