* [PATCH 2/3] clk: qcom: smd: Add missing RPM clocks for msm8992/4 [not found] <20220226214126.21209-1-konrad.dybcio@somainline.org> @ 2022-02-26 21:41 ` Konrad Dybcio 2022-02-26 21:41 ` [PATCH 3/3] clk: qcom: smd: Add missing MSM8998 RPM clocks Konrad Dybcio 1 sibling, 0 replies; 3+ messages in thread From: Konrad Dybcio @ 2022-02-26 21:41 UTC (permalink / raw) To: ~postmarketos/upstreaming Cc: martin.botka, angelogioacchino.delregno, marijn.suijten, jamipkettunen, Konrad Dybcio, Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd, Konrad Dybcio, linux-arm-msm, linux-clk, linux-kernel XO and MSS_CFG were omitted when first adding the clocks for these SoCs. Add them, and while at it, move the XO clock to the top of the definition list, as ideally everyone should start using it sooner or later.. Fixes: b4297844995 ("clk: qcom: smd: Add support for MSM8992/4 rpm clocks") Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> --- drivers/clk/qcom/clk-smd-rpm.c | 13 +++++++++++-- include/linux/soc/qcom/smd-rpm.h | 1 + 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index ea28e45ca371..418f017e933f 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -413,6 +413,7 @@ static const struct clk_ops clk_smd_rpm_branch_ops = { .recalc_rate = clk_smd_rpm_recalc_rate, }; +DEFINE_CLK_SMD_RPM_BRANCH(sdm660, bi_tcxo, bi_tcxo_a, QCOM_SMD_RPM_MISC_CLK, 0, 19200000); DEFINE_CLK_SMD_RPM(msm8916, pcnoc_clk, pcnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 0); DEFINE_CLK_SMD_RPM(msm8916, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1); DEFINE_CLK_SMD_RPM(msm8916, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0); @@ -604,7 +605,11 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, ln_bb_clk, ln_bb_a_clk, 8, 19200000); DEFINE_CLK_SMD_RPM(msm8992, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0); DEFINE_CLK_SMD_RPM(msm8992, ce2_clk, ce2_a_clk, QCOM_SMD_RPM_CE_CLK, 1); +DEFINE_CLK_SMD_RPM_BRANCH(msm8992, mss_cfg_ahb_clk, mss_cfg_ahb_a_clk, + QCOM_SMD_RPM_MCFG_CLK, 0, 19200000); static struct clk_smd_rpm *msm8992_clks[] = { + [RPM_SMD_XO_CLK_SRC] = &sdm660_bi_tcxo, + [RPM_SMD_XO_A_CLK_SRC] = &sdm660_bi_tcxo_a, [RPM_SMD_PNOC_CLK] = &msm8916_pcnoc_clk, [RPM_SMD_PNOC_A_CLK] = &msm8916_pcnoc_a_clk, [RPM_SMD_OCMEMGX_CLK] = &msm8974_ocmemgx_clk, @@ -637,6 +642,8 @@ static struct clk_smd_rpm *msm8992_clks[] = { [RPM_SMD_LN_BB_A_CLK] = &msm8992_ln_bb_a_clk, [RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_mmssnoc_ahb_clk, [RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_mmssnoc_ahb_a_clk, + [RPM_SMD_MSS_CFG_AHB_CLK] = &msm8992_mss_cfg_ahb_clk, + [RPM_SMD_MSS_CFG_AHB_A_CLK] = &msm8992_mss_cfg_ahb_a_clk, [RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &msm8916_qdss_a_clk, [RPM_SMD_RF_CLK1] = &msm8916_rf_clk1, @@ -661,6 +668,8 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8992 = { DEFINE_CLK_SMD_RPM(msm8994, ce3_clk, ce3_a_clk, QCOM_SMD_RPM_CE_CLK, 2); static struct clk_smd_rpm *msm8994_clks[] = { + [RPM_SMD_XO_CLK_SRC] = &sdm660_bi_tcxo, + [RPM_SMD_XO_A_CLK_SRC] = &sdm660_bi_tcxo_a, [RPM_SMD_PNOC_CLK] = &msm8916_pcnoc_clk, [RPM_SMD_PNOC_A_CLK] = &msm8916_pcnoc_a_clk, [RPM_SMD_OCMEMGX_CLK] = &msm8974_ocmemgx_clk, @@ -693,6 +702,8 @@ static struct clk_smd_rpm *msm8994_clks[] = { [RPM_SMD_LN_BB_A_CLK] = &msm8992_ln_bb_a_clk, [RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_mmssnoc_ahb_clk, [RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_mmssnoc_ahb_a_clk, + [RPM_SMD_MSS_CFG_AHB_CLK] = &msm8992_mss_cfg_ahb_clk, + [RPM_SMD_MSS_CFG_AHB_A_CLK] = &msm8992_mss_cfg_ahb_a_clk, [RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk, [RPM_SMD_QDSS_A_CLK] = &msm8916_qdss_a_clk, [RPM_SMD_RF_CLK1] = &msm8916_rf_clk1, @@ -857,8 +868,6 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8998 = { .num_clks = ARRAY_SIZE(msm8998_clks), }; -DEFINE_CLK_SMD_RPM_BRANCH(sdm660, bi_tcxo, bi_tcxo_a, QCOM_SMD_RPM_MISC_CLK, 0, - 19200000); DEFINE_CLK_SMD_RPM_XO_BUFFER(sdm660, ln_bb_clk3, ln_bb_clk3_a, 3, 19200000); DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(sdm660, ln_bb_clk3_pin, ln_bb_clk3_pin_a, 3, 19200000); diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h index 860dd8cdf9f3..82c9d489833a 100644 --- a/include/linux/soc/qcom/smd-rpm.h +++ b/include/linux/soc/qcom/smd-rpm.h @@ -40,6 +40,7 @@ struct qcom_smd_rpm; #define QCOM_SMD_RPM_AGGR_CLK 0x72676761 #define QCOM_SMD_RPM_HWKM_CLK 0x6d6b7768 #define QCOM_SMD_RPM_PKA_CLK 0x616b70 +#define QCOM_SMD_RPM_MCFG_CLK 0x6766636d int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm, int state, -- 2.35.1 ^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 3/3] clk: qcom: smd: Add missing MSM8998 RPM clocks [not found] <20220226214126.21209-1-konrad.dybcio@somainline.org> 2022-02-26 21:41 ` [PATCH 2/3] clk: qcom: smd: Add missing RPM clocks for msm8992/4 Konrad Dybcio @ 2022-02-26 21:41 ` Konrad Dybcio 2022-03-03 17:38 ` Caleb Connolly 1 sibling, 1 reply; 3+ messages in thread From: Konrad Dybcio @ 2022-02-26 21:41 UTC (permalink / raw) To: ~postmarketos/upstreaming Cc: martin.botka, angelogioacchino.delregno, marijn.suijten, jamipkettunen, Konrad Dybcio, Jami Kettunen, Bjorn Andersson, Andy Gross, Michael Turquette, Stephen Boyd, linux-arm-msm, linux-clk, linux-kernel Add missing RPM-provided clocks on msm8998 and reorder the definitions where needed. JAMI: fixed for a0384ecfe2aa ("clk: qcom: smd-rpm: De-duplicate identical entries") JAMI: fixed for 36354c32bd76 ("clk: qcom: smd-rpm: Add .recalc_rate hook for clk_smd_rpm_branch_ops") Tested-by: Jami Kettunen <jami.kettunen@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> --- drivers/clk/qcom/clk-smd-rpm.c | 40 +++++++++++++++++++++++----------- 1 file changed, 27 insertions(+), 13 deletions(-) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 418f017e933f..afc6dc930011 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -816,15 +816,18 @@ static const struct rpm_smd_clk_desc rpm_clk_qcs404 = { .num_clks = ARRAY_SIZE(qcs404_clks), }; -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3_pin, ln_bb_clk3_a_pin, - 3, 19200000); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk3, ln_bb_clk3_a, 3, 19200000); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3_pin, ln_bb_clk3_a_pin, 3, 19200000); DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc_clk, aggre1_noc_a_clk, QCOM_SMD_RPM_AGGR_CLK, 1); DEFINE_CLK_SMD_RPM(msm8998, aggre2_noc_clk, aggre2_noc_a_clk, QCOM_SMD_RPM_AGGR_CLK, 2); DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, rf_clk3, rf_clk3_a, 6, 19200000); DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3_pin, rf_clk3_a_pin, 6, 19200000); + static struct clk_smd_rpm *msm8998_clks[] = { + [RPM_SMD_XO_CLK_SRC] = &sdm660_bi_tcxo, + [RPM_SMD_XO_A_CLK_SRC] = &sdm660_bi_tcxo_a, [RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk, [RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk, [RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk, @@ -837,12 +840,22 @@ static struct clk_smd_rpm *msm8998_clks[] = { [RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk, [RPM_SMD_DIV_CLK1] = &msm8974_div_clk1, [RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1, + [RPM_SMD_DIV_CLK2] = &msm8974_div_clk2, + [RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2, + [RPM_SMD_DIV_CLK3] = &msm8992_div_clk3, + [RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a, [RPM_SMD_IPA_CLK] = &msm8976_ipa_clk, [RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk, [RPM_SMD_LN_BB_CLK1] = &msm8916_bb_clk1, [RPM_SMD_LN_BB_CLK1_A] = &msm8916_bb_clk1_a, [RPM_SMD_LN_BB_CLK2] = &msm8916_bb_clk2, [RPM_SMD_LN_BB_CLK2_A] = &msm8916_bb_clk2_a, + [RPM_SMD_LN_BB_CLK3] = &msm8998_ln_bb_clk3, + [RPM_SMD_LN_BB_CLK3_A] = &msm8998_ln_bb_clk3_a, + [RPM_SMD_LN_BB_CLK1_PIN] = &msm8916_bb_clk1_pin, + [RPM_SMD_LN_BB_CLK1_A_PIN] = &msm8916_bb_clk1_a_pin, + [RPM_SMD_LN_BB_CLK2_PIN] = &msm8916_bb_clk2_pin, + [RPM_SMD_LN_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin, [RPM_SMD_LN_BB_CLK3_PIN] = &msm8998_ln_bb_clk3_pin, [RPM_SMD_LN_BB_CLK3_A_PIN] = &msm8998_ln_bb_clk3_a_pin, [RPM_SMD_MMAXI_CLK] = &msm8996_mmssnoc_axi_rpm_clk, @@ -855,10 +868,14 @@ static struct clk_smd_rpm *msm8998_clks[] = { [RPM_SMD_QDSS_A_CLK] = &msm8916_qdss_a_clk, [RPM_SMD_RF_CLK1] = &msm8916_rf_clk1, [RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a, - [RPM_SMD_RF_CLK2_PIN] = &msm8916_rf_clk2_pin, - [RPM_SMD_RF_CLK2_A_PIN] = &msm8916_rf_clk2_a_pin, + [RPM_SMD_RF_CLK2] = &msm8916_rf_clk2, + [RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a, [RPM_SMD_RF_CLK3] = &msm8998_rf_clk3, [RPM_SMD_RF_CLK3_A] = &msm8998_rf_clk3_a, + [RPM_SMD_RF_CLK1_PIN] = &msm8916_rf_clk1_pin, + [RPM_SMD_RF_CLK1_A_PIN] = &msm8916_rf_clk1_a_pin, + [RPM_SMD_RF_CLK2_PIN] = &msm8916_rf_clk2_pin, + [RPM_SMD_RF_CLK2_A_PIN] = &msm8916_rf_clk2_a_pin, [RPM_SMD_RF_CLK3_PIN] = &msm8998_rf_clk3_pin, [RPM_SMD_RF_CLK3_A_PIN] = &msm8998_rf_clk3_a_pin, }; @@ -868,9 +885,6 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8998 = { .num_clks = ARRAY_SIZE(msm8998_clks), }; -DEFINE_CLK_SMD_RPM_XO_BUFFER(sdm660, ln_bb_clk3, ln_bb_clk3_a, 3, 19200000); -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(sdm660, ln_bb_clk3_pin, ln_bb_clk3_pin_a, 3, 19200000); - static struct clk_smd_rpm *sdm660_clks[] = { [RPM_SMD_XO_CLK_SRC] = &sdm660_bi_tcxo, [RPM_SMD_XO_A_CLK_SRC] = &sdm660_bi_tcxo_a, @@ -900,16 +914,16 @@ static struct clk_smd_rpm *sdm660_clks[] = { [RPM_SMD_LN_BB_A_CLK] = &msm8916_bb_clk1_a, [RPM_SMD_LN_BB_CLK2] = &msm8916_bb_clk2, [RPM_SMD_LN_BB_CLK2_A] = &msm8916_bb_clk2_a, - [RPM_SMD_LN_BB_CLK3] = &sdm660_ln_bb_clk3, - [RPM_SMD_LN_BB_CLK3_A] = &sdm660_ln_bb_clk3_a, + [RPM_SMD_LN_BB_CLK3] = &msm8998_ln_bb_clk3, + [RPM_SMD_LN_BB_CLK3_A] = &msm8998_ln_bb_clk3_a, [RPM_SMD_RF_CLK1_PIN] = &msm8916_rf_clk1_pin, [RPM_SMD_RF_CLK1_A_PIN] = &msm8916_rf_clk1_a_pin, [RPM_SMD_LN_BB_CLK1_PIN] = &msm8916_bb_clk1_pin, [RPM_SMD_LN_BB_CLK1_A_PIN] = &msm8916_bb_clk1_a_pin, [RPM_SMD_LN_BB_CLK2_PIN] = &msm8916_bb_clk2_pin, [RPM_SMD_LN_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin, - [RPM_SMD_LN_BB_CLK3_PIN] = &sdm660_ln_bb_clk3_pin, - [RPM_SMD_LN_BB_CLK3_A_PIN] = &sdm660_ln_bb_clk3_pin_a, + [RPM_SMD_LN_BB_CLK3_PIN] = &msm8998_ln_bb_clk3_pin, + [RPM_SMD_LN_BB_CLK3_A_PIN] = &msm8998_ln_bb_clk3_a_pin, }; static const struct rpm_smd_clk_desc rpm_clk_sdm660 = { @@ -1011,8 +1025,8 @@ static struct clk_smd_rpm *sm6125_clks[] = { [RPM_SMD_LN_BB_CLK1_A] = &msm8916_bb_clk1_a, [RPM_SMD_LN_BB_CLK2] = &msm8916_bb_clk2, [RPM_SMD_LN_BB_CLK2_A] = &msm8916_bb_clk2_a, - [RPM_SMD_LN_BB_CLK3] = &sdm660_ln_bb_clk3, - [RPM_SMD_LN_BB_CLK3_A] = &sdm660_ln_bb_clk3_a, + [RPM_SMD_LN_BB_CLK3] = &msm8998_ln_bb_clk3, + [RPM_SMD_LN_BB_CLK3_A] = &msm8998_ln_bb_clk3_a, [RPM_SMD_QUP_CLK] = &sm6125_qup_clk, [RPM_SMD_QUP_A_CLK] = &sm6125_qup_a_clk, [RPM_SMD_MMRT_CLK] = &sm6125_mmrt_clk, -- 2.35.1 ^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 3/3] clk: qcom: smd: Add missing MSM8998 RPM clocks 2022-02-26 21:41 ` [PATCH 3/3] clk: qcom: smd: Add missing MSM8998 RPM clocks Konrad Dybcio @ 2022-03-03 17:38 ` Caleb Connolly 0 siblings, 0 replies; 3+ messages in thread From: Caleb Connolly @ 2022-03-03 17:38 UTC (permalink / raw) To: Konrad Dybcio, ~postmarketos/upstreaming Cc: martin.botka, angelogioacchino.delregno, marijn.suijten, jamipkettunen, Jami Kettunen, Bjorn Andersson, Andy Gross, Michael Turquette, Stephen Boyd, linux-arm-msm, linux-clk, linux-kernel [tested on Pixel 2 XL] Tested-by: Caleb Connolly <caleb@connolly.tech> On 26/02/2022 21:41, Konrad Dybcio wrote: > Add missing RPM-provided clocks on msm8998 and reorder the definitions > where needed. > > JAMI: fixed for a0384ecfe2aa ("clk: qcom: smd-rpm: De-duplicate identical entries") > JAMI: fixed for 36354c32bd76 ("clk: qcom: smd-rpm: Add .recalc_rate hook for clk_smd_rpm_branch_ops") > Tested-by: Jami Kettunen <jami.kettunen@somainline.org> > Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> > --- > drivers/clk/qcom/clk-smd-rpm.c | 40 +++++++++++++++++++++++----------- > 1 file changed, 27 insertions(+), 13 deletions(-) > > diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c > index 418f017e933f..afc6dc930011 100644 > --- a/drivers/clk/qcom/clk-smd-rpm.c > +++ b/drivers/clk/qcom/clk-smd-rpm.c > @@ -816,15 +816,18 @@ static const struct rpm_smd_clk_desc rpm_clk_qcs404 = { > .num_clks = ARRAY_SIZE(qcs404_clks), > }; > > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3_pin, ln_bb_clk3_a_pin, > - 3, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk3, ln_bb_clk3_a, 3, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3_pin, ln_bb_clk3_a_pin, 3, 19200000); > DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc_clk, aggre1_noc_a_clk, > QCOM_SMD_RPM_AGGR_CLK, 1); > DEFINE_CLK_SMD_RPM(msm8998, aggre2_noc_clk, aggre2_noc_a_clk, > QCOM_SMD_RPM_AGGR_CLK, 2); > DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, rf_clk3, rf_clk3_a, 6, 19200000); > DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3_pin, rf_clk3_a_pin, 6, 19200000); > + > static struct clk_smd_rpm *msm8998_clks[] = { > + [RPM_SMD_XO_CLK_SRC] = &sdm660_bi_tcxo, > + [RPM_SMD_XO_A_CLK_SRC] = &sdm660_bi_tcxo_a, > [RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk, > [RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk, > [RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk, > @@ -837,12 +840,22 @@ static struct clk_smd_rpm *msm8998_clks[] = { > [RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk, > [RPM_SMD_DIV_CLK1] = &msm8974_div_clk1, > [RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1, > + [RPM_SMD_DIV_CLK2] = &msm8974_div_clk2, > + [RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2, > + [RPM_SMD_DIV_CLK3] = &msm8992_div_clk3, > + [RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a, > [RPM_SMD_IPA_CLK] = &msm8976_ipa_clk, > [RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk, > [RPM_SMD_LN_BB_CLK1] = &msm8916_bb_clk1, > [RPM_SMD_LN_BB_CLK1_A] = &msm8916_bb_clk1_a, > [RPM_SMD_LN_BB_CLK2] = &msm8916_bb_clk2, > [RPM_SMD_LN_BB_CLK2_A] = &msm8916_bb_clk2_a, > + [RPM_SMD_LN_BB_CLK3] = &msm8998_ln_bb_clk3, > + [RPM_SMD_LN_BB_CLK3_A] = &msm8998_ln_bb_clk3_a, > + [RPM_SMD_LN_BB_CLK1_PIN] = &msm8916_bb_clk1_pin, > + [RPM_SMD_LN_BB_CLK1_A_PIN] = &msm8916_bb_clk1_a_pin, > + [RPM_SMD_LN_BB_CLK2_PIN] = &msm8916_bb_clk2_pin, > + [RPM_SMD_LN_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin, > [RPM_SMD_LN_BB_CLK3_PIN] = &msm8998_ln_bb_clk3_pin, > [RPM_SMD_LN_BB_CLK3_A_PIN] = &msm8998_ln_bb_clk3_a_pin, > [RPM_SMD_MMAXI_CLK] = &msm8996_mmssnoc_axi_rpm_clk, > @@ -855,10 +868,14 @@ static struct clk_smd_rpm *msm8998_clks[] = { > [RPM_SMD_QDSS_A_CLK] = &msm8916_qdss_a_clk, > [RPM_SMD_RF_CLK1] = &msm8916_rf_clk1, > [RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a, > - [RPM_SMD_RF_CLK2_PIN] = &msm8916_rf_clk2_pin, > - [RPM_SMD_RF_CLK2_A_PIN] = &msm8916_rf_clk2_a_pin, > + [RPM_SMD_RF_CLK2] = &msm8916_rf_clk2, > + [RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a, > [RPM_SMD_RF_CLK3] = &msm8998_rf_clk3, > [RPM_SMD_RF_CLK3_A] = &msm8998_rf_clk3_a, > + [RPM_SMD_RF_CLK1_PIN] = &msm8916_rf_clk1_pin, > + [RPM_SMD_RF_CLK1_A_PIN] = &msm8916_rf_clk1_a_pin, > + [RPM_SMD_RF_CLK2_PIN] = &msm8916_rf_clk2_pin, > + [RPM_SMD_RF_CLK2_A_PIN] = &msm8916_rf_clk2_a_pin, > [RPM_SMD_RF_CLK3_PIN] = &msm8998_rf_clk3_pin, > [RPM_SMD_RF_CLK3_A_PIN] = &msm8998_rf_clk3_a_pin, > }; > @@ -868,9 +885,6 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8998 = { > .num_clks = ARRAY_SIZE(msm8998_clks), > }; > > -DEFINE_CLK_SMD_RPM_XO_BUFFER(sdm660, ln_bb_clk3, ln_bb_clk3_a, 3, 19200000); > -DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(sdm660, ln_bb_clk3_pin, ln_bb_clk3_pin_a, 3, 19200000); > - > static struct clk_smd_rpm *sdm660_clks[] = { > [RPM_SMD_XO_CLK_SRC] = &sdm660_bi_tcxo, > [RPM_SMD_XO_A_CLK_SRC] = &sdm660_bi_tcxo_a, > @@ -900,16 +914,16 @@ static struct clk_smd_rpm *sdm660_clks[] = { > [RPM_SMD_LN_BB_A_CLK] = &msm8916_bb_clk1_a, > [RPM_SMD_LN_BB_CLK2] = &msm8916_bb_clk2, > [RPM_SMD_LN_BB_CLK2_A] = &msm8916_bb_clk2_a, > - [RPM_SMD_LN_BB_CLK3] = &sdm660_ln_bb_clk3, > - [RPM_SMD_LN_BB_CLK3_A] = &sdm660_ln_bb_clk3_a, > + [RPM_SMD_LN_BB_CLK3] = &msm8998_ln_bb_clk3, > + [RPM_SMD_LN_BB_CLK3_A] = &msm8998_ln_bb_clk3_a, > [RPM_SMD_RF_CLK1_PIN] = &msm8916_rf_clk1_pin, > [RPM_SMD_RF_CLK1_A_PIN] = &msm8916_rf_clk1_a_pin, > [RPM_SMD_LN_BB_CLK1_PIN] = &msm8916_bb_clk1_pin, > [RPM_SMD_LN_BB_CLK1_A_PIN] = &msm8916_bb_clk1_a_pin, > [RPM_SMD_LN_BB_CLK2_PIN] = &msm8916_bb_clk2_pin, > [RPM_SMD_LN_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin, > - [RPM_SMD_LN_BB_CLK3_PIN] = &sdm660_ln_bb_clk3_pin, > - [RPM_SMD_LN_BB_CLK3_A_PIN] = &sdm660_ln_bb_clk3_pin_a, > + [RPM_SMD_LN_BB_CLK3_PIN] = &msm8998_ln_bb_clk3_pin, > + [RPM_SMD_LN_BB_CLK3_A_PIN] = &msm8998_ln_bb_clk3_a_pin, > }; > > static const struct rpm_smd_clk_desc rpm_clk_sdm660 = { > @@ -1011,8 +1025,8 @@ static struct clk_smd_rpm *sm6125_clks[] = { > [RPM_SMD_LN_BB_CLK1_A] = &msm8916_bb_clk1_a, > [RPM_SMD_LN_BB_CLK2] = &msm8916_bb_clk2, > [RPM_SMD_LN_BB_CLK2_A] = &msm8916_bb_clk2_a, > - [RPM_SMD_LN_BB_CLK3] = &sdm660_ln_bb_clk3, > - [RPM_SMD_LN_BB_CLK3_A] = &sdm660_ln_bb_clk3_a, > + [RPM_SMD_LN_BB_CLK3] = &msm8998_ln_bb_clk3, > + [RPM_SMD_LN_BB_CLK3_A] = &msm8998_ln_bb_clk3_a, > [RPM_SMD_QUP_CLK] = &sm6125_qup_clk, > [RPM_SMD_QUP_A_CLK] = &sm6125_qup_a_clk, > [RPM_SMD_MMRT_CLK] = &sm6125_mmrt_clk, > -- > 2.35.1 > -- Kind Regards, Caleb ^ permalink raw reply [flat|nested] 3+ messages in thread
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2022-02-26 21:41 ` [PATCH 2/3] clk: qcom: smd: Add missing RPM clocks for msm8992/4 Konrad Dybcio
2022-02-26 21:41 ` [PATCH 3/3] clk: qcom: smd: Add missing MSM8998 RPM clocks Konrad Dybcio
2022-03-03 17:38 ` Caleb Connolly
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