* [PATCH v2 1/5] dt-bindings: display: panel: add Truly NT36850 WQHD panel
2026-10-14 16:19 [PATCH v2 0/5] arm64: dts: qcom: support SDM845 HDK Dmitry Baryshkov
@ 2026-10-14 16:19 ` Dmitry Baryshkov
2026-10-14 16:19 ` [PATCH v2 2/5] drm/panel: add Novatek NT36850 panel driver Dmitry Baryshkov
` (3 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Dmitry Baryshkov @ 2026-10-14 16:19 UTC (permalink / raw)
To: Bjorn Andersson, Michael Turquette, Stephen Boyd, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
Jessica Zhang, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Simona Vetter, Abel Vesa,
Ulf Hansson
Cc: linux-arm-msm, linux-clk, linux-kernel, devicetree, dri-devel
Describe the Truly 5.7" WQHD dual-DSI command mode panel based on the
Novatek NT36850, used on the display cards for the Qualcomm SDM845 and
SM8150 HDKs.
The model name of the panel is not known. Neither the vendor kernel nor
the HDK documentation mention it, and the panel block cannot be taken
apart completely to check the label. So the compatible is built from
the vendor, resolution, refresh rate and the controller name.
Assisted-by: LLM
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
.../display/panel/truly,wqhd60-nt36850.yaml | 98 ++++++++++++++++++++++
1 file changed, 98 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/truly,wqhd60-nt36850.yaml b/Documentation/devicetree/bindings/display/panel/truly,wqhd60-nt36850.yaml
new file mode 100644
index 000000000000..1cc63a6adc7f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/truly,wqhd60-nt36850.yaml
@@ -0,0 +1,98 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/truly,wqhd60-nt36850.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Truly WQHD panel based on the Novatek NT36850
+
+maintainers:
+ - Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
+
+description:
+ Truly 5.7" 1440x2560 60 Hz LCD panel driven by the Novatek NT36850
+ controller. It is a command mode panel using two DSI links and it is found
+ on the display cards for Qualcomm hardware development kits.
+
+allOf:
+ - $ref: panel-common-dual.yaml#
+
+properties:
+ compatible:
+ const: truly,wqhd60-nt36850
+
+ reg:
+ maxItems: 1
+
+ reset-gpios:
+ maxItems: 1
+
+ vddio-supply:
+ description: I/O voltage supply
+
+ avdd-supply:
+ description: positive bias supply
+
+ avee-supply:
+ description: negative bias supply
+
+ ports:
+ required:
+ - port@0
+ - port@1
+
+required:
+ - compatible
+ - reg
+ - reset-gpios
+ - vddio-supply
+ - avdd-supply
+ - avee-supply
+ - ports
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ panel@0 {
+ compatible = "truly,wqhd60-nt36850";
+ reg = <0>;
+
+ reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
+
+ vddio-supply = <&vreg_l14a_1p8>;
+ avdd-supply = <&lcdb_ldo>;
+ avee-supply = <&lcdb_ncp>;
+
+ backlight = <&wled>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ panel_in_0: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ panel_in_1: endpoint {
+ remote-endpoint = <&dsi1_out>;
+ };
+ };
+ };
+ };
+ };
+
+...
--
2.47.3
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v2 2/5] drm/panel: add Novatek NT36850 panel driver
2026-10-14 16:19 [PATCH v2 0/5] arm64: dts: qcom: support SDM845 HDK Dmitry Baryshkov
2026-10-14 16:19 ` [PATCH v2 1/5] dt-bindings: display: panel: add Truly NT36850 WQHD panel Dmitry Baryshkov
@ 2026-10-14 16:19 ` Dmitry Baryshkov
2026-10-14 16:32 ` sashiko-bot
2026-10-14 16:19 ` [PATCH v2 3/5] dt-bindings: arm: qcom: add Qualcomm SDM845 HDK Dmitry Baryshkov
` (2 subsequent siblings)
4 siblings, 1 reply; 9+ messages in thread
From: Dmitry Baryshkov @ 2026-10-14 16:19 UTC (permalink / raw)
To: Bjorn Andersson, Michael Turquette, Stephen Boyd, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
Jessica Zhang, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Simona Vetter, Abel Vesa,
Ulf Hansson
Cc: linux-arm-msm, linux-clk, linux-kernel, devicetree, dri-devel
Add support for the Truly WQHD dual-DSI command mode panel built around
the Novatek NT36850, found on the display card for the Qualcomm SDM845
and SM8150 HDK. The driver is based on panel-novatek-nt36523, the power
and command sequences follow the vendor device tree.
Assisted-by: LLM
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
drivers/gpu/drm/panel/Kconfig | 10 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-novatek-nt36850.c | 343 ++++++++++++++++++++++++++
3 files changed, 354 insertions(+)
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 53a1fc2913fe..869a5501e709 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -723,6 +723,16 @@ config DRM_PANEL_NOVATEK_NT36672E
LCD panel module. The panel has a resolution of 1080x2408 and uses 24 bit
RGB per pixel.
+config DRM_PANEL_NOVATEK_NT36850
+ tristate "Novatek NT36850 panel driver"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y here if you want to enable support for the panels built
+ around the Novatek NT36850 display controller, such as some
+ Truly panels used in Qualcomm development kits.
+
config DRM_PANEL_NOVATEK_NT37700F
tristate "Novatek NT37700F DSI panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index f2c9c80a218f..8dd8eb7080cb 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -69,6 +69,7 @@ obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36532) += panel-novatek-nt36532.o
obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36536) += panel-novatek-nt36536.o
obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672A) += panel-novatek-nt36672a.o
obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672E) += panel-novatek-nt36672e.o
+obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36850) += panel-novatek-nt36850.o
obj-$(CONFIG_DRM_PANEL_NOVATEK_NT37700F) += panel-novatek-nt37700f.o
obj-$(CONFIG_DRM_PANEL_NOVATEK_NT37801) += panel-novatek-nt37801.o
obj-$(CONFIG_DRM_PANEL_NOVATEK_NT39016) += panel-novatek-nt39016.o
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36850.c b/drivers/gpu/drm/panel/panel-novatek-nt36850.c
new file mode 100644
index 000000000000..6956ec7263fb
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36850.c
@@ -0,0 +1,343 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Novatek NT36850 DriverIC panels driver
+ *
+ * Copyright (c) 2022, 2023 Jianhua Lu <lujianhua000@gmail.com>
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries
+ */
+
+#include <linux/backlight.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_graph.h>
+#include <linux/regulator/consumer.h>
+
+#include <video/mipi_display.h>
+
+#include <drm/drm_crtc.h>
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_of.h>
+#include <drm/drm_panel.h>
+#include <drm/drm_probe_helper.h>
+
+struct panel_info {
+ struct drm_panel panel;
+ struct mipi_dsi_device *dsi[2];
+ const struct panel_desc *desc;
+ enum drm_panel_orientation orientation;
+
+ struct gpio_desc *reset_gpio;
+ struct backlight_device *backlight;
+ struct regulator *vddio;
+ struct regulator *avdd;
+ struct regulator *avee;
+};
+
+struct panel_desc {
+ unsigned int bpc;
+ unsigned int lanes;
+ unsigned long mode_flags;
+ enum mipi_dsi_pixel_format format;
+
+ const struct drm_display_mode *mode;
+ const struct mipi_dsi_device_info dsi_info;
+ int (*init_sequence)(struct panel_info *pinfo);
+
+ bool is_dual_dsi;
+};
+
+static inline struct panel_info *to_panel_info(struct drm_panel *panel)
+{
+ return container_of(panel, struct panel_info, panel);
+}
+
+static int truly_wqhd_init_sequence(struct panel_info *pinfo)
+{
+ struct mipi_dsi_device *dsi0 = pinfo->dsi[0];
+ struct mipi_dsi_device *dsi1 = pinfo->dsi[1];
+ struct mipi_dsi_multi_context dsi_ctx = { .dsi = NULL };
+
+ mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xff, 0x10);
+ mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xfb, 0x01);
+ mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1,
+ MIPI_DCS_SET_ADDRESS_MODE, 0x00);
+ mipi_dsi_dual(mipi_dsi_dcs_set_tear_on_multi, &dsi_ctx, dsi0, dsi1,
+ MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+ mipi_dsi_dual(mipi_dsi_dcs_set_tear_scanline_multi, &dsi_ctx, dsi0, dsi1,
+ 1000);
+ mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1,
+ MIPI_DCS_SET_DISPLAY_BRIGHTNESS,
+ 0xff);
+ mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1,
+ MIPI_DCS_WRITE_CONTROL_DISPLAY,
+ 0x2c);
+ mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1,
+ MIPI_DCS_WRITE_POWER_SAVE, 0x01);
+ mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1,
+ MIPI_DCS_EXIT_INVERT_MODE);
+ mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000);
+ mipi_dsi_dual_dcs_write_seq_multi(&dsi_ctx, dsi0, dsi1, 0xbb, 0x10);
+ mipi_dsi_dual(mipi_dsi_dcs_exit_sleep_mode_multi, &dsi_ctx, dsi0, dsi1);
+ mipi_dsi_msleep(&dsi_ctx, 120);
+ mipi_dsi_dual(mipi_dsi_dcs_set_display_on_multi, &dsi_ctx, dsi0, dsi1);
+ mipi_dsi_msleep(&dsi_ctx, 120);
+
+ return dsi_ctx.accum_err;
+}
+
+static const struct drm_display_mode truly_wqhd_mode = {
+ .clock = (720 + 120 + 20 + 140) * 2 * (2560 + 8 + 4 + 20) * 60 / 1000,
+ .hdisplay = 720 * 2,
+ .hsync_start = (720 + 120) * 2,
+ .hsync_end = (720 + 120 + 20) * 2,
+ .htotal = (720 + 120 + 20 + 140) * 2,
+ .vdisplay = 2560,
+ .vsync_start = 2560 + 8,
+ .vsync_end = 2560 + 8 + 4,
+ .vtotal = 2560 + 8 + 4 + 20,
+};
+
+static const struct panel_desc truly_wqhd_desc = {
+ .mode = &truly_wqhd_mode,
+ .bpc = 8,
+ .lanes = 4,
+ .format = MIPI_DSI_FMT_RGB888,
+ .mode_flags = MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM,
+ .init_sequence = truly_wqhd_init_sequence,
+ .is_dual_dsi = true,
+};
+
+static void nt36850_reset(struct panel_info *pinfo)
+{
+ gpiod_set_value_cansleep(pinfo->reset_gpio, 0);
+ usleep_range(10000, 11000);
+ gpiod_set_value_cansleep(pinfo->reset_gpio, 1);
+ usleep_range(10000, 11000);
+ gpiod_set_value_cansleep(pinfo->reset_gpio, 0);
+ msleep(50);
+}
+
+static int nt36850_prepare(struct drm_panel *panel)
+{
+ struct panel_info *pinfo = to_panel_info(panel);
+ int ret;
+
+ ret = regulator_enable(pinfo->vddio);
+ if (ret) {
+ dev_err(panel->dev, "failed to enable vddio regulator: %d\n", ret);
+ return ret;
+ }
+
+ msleep(20);
+
+ ret = regulator_enable(pinfo->avdd);
+ if (ret) {
+ dev_err(panel->dev, "failed to enable avdd regulator: %d\n", ret);
+ goto err_vddio;
+ }
+
+ ret = regulator_enable(pinfo->avee);
+ if (ret) {
+ dev_err(panel->dev, "failed to enable avee regulator: %d\n", ret);
+ goto err_avdd;
+ }
+
+ msleep(20);
+
+ nt36850_reset(pinfo);
+
+ ret = pinfo->desc->init_sequence(pinfo);
+ if (ret < 0) {
+ dev_err(panel->dev, "failed to initialize panel: %d\n", ret);
+ goto err_avee;
+ }
+
+ return 0;
+
+err_avee:
+ gpiod_set_value_cansleep(pinfo->reset_gpio, 1);
+ regulator_disable(pinfo->avee);
+err_avdd:
+ regulator_disable(pinfo->avdd);
+err_vddio:
+ regulator_disable(pinfo->vddio);
+
+ return ret;
+}
+
+static int nt36850_num_dsi_hosts(struct panel_info *pinfo)
+{
+ return pinfo->desc->is_dual_dsi ? 2 : 1;
+}
+
+static int nt36850_disable(struct drm_panel *panel)
+{
+ struct panel_info *pinfo = to_panel_info(panel);
+ struct mipi_dsi_device *dsi0 = pinfo->dsi[0];
+ struct mipi_dsi_device *dsi1 = pinfo->dsi[1];
+ struct mipi_dsi_multi_context dsi_ctx = { .dsi = NULL };
+
+ dsi0->mode_flags &= ~MIPI_DSI_MODE_LPM;
+ dsi1->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+ mipi_dsi_dual(mipi_dsi_dcs_set_display_off_multi, &dsi_ctx, dsi0, dsi1);
+ mipi_dsi_msleep(&dsi_ctx, 120);
+ mipi_dsi_dual(mipi_dsi_dcs_enter_sleep_mode_multi, &dsi_ctx, dsi0, dsi1);
+ mipi_dsi_msleep(&dsi_ctx, 120);
+
+ dsi0->mode_flags |= MIPI_DSI_MODE_LPM;
+ dsi1->mode_flags |= MIPI_DSI_MODE_LPM;
+
+ return dsi_ctx.accum_err;
+}
+
+static int nt36850_unprepare(struct drm_panel *panel)
+{
+ struct panel_info *pinfo = to_panel_info(panel);
+
+ gpiod_set_value_cansleep(pinfo->reset_gpio, 1);
+ regulator_disable(pinfo->avee);
+ regulator_disable(pinfo->avdd);
+ regulator_disable(pinfo->vddio);
+
+ return 0;
+}
+
+static int nt36850_get_modes(struct drm_panel *panel,
+ struct drm_connector *connector)
+{
+ struct panel_info *pinfo = to_panel_info(panel);
+
+ connector->display_info.bpc = pinfo->desc->bpc;
+
+ return drm_connector_helper_get_modes_fixed(connector, pinfo->desc->mode);
+}
+
+static enum drm_panel_orientation nt36850_get_orientation(struct drm_panel *panel)
+{
+ struct panel_info *pinfo = to_panel_info(panel);
+
+ return pinfo->orientation;
+}
+
+static const struct drm_panel_funcs nt36850_panel_funcs = {
+ .disable = nt36850_disable,
+ .prepare = nt36850_prepare,
+ .unprepare = nt36850_unprepare,
+ .get_modes = nt36850_get_modes,
+ .get_orientation = nt36850_get_orientation,
+};
+
+static int nt36850_probe(struct mipi_dsi_device *dsi)
+{
+ struct device *dev = &dsi->dev;
+ struct device_node *dsi1;
+ struct mipi_dsi_host *dsi1_host;
+ struct panel_info *pinfo;
+ const struct mipi_dsi_device_info *info;
+ int i, ret;
+
+ pinfo = devm_drm_panel_alloc(dev, struct panel_info, panel,
+ &nt36850_panel_funcs,
+ DRM_MODE_CONNECTOR_DSI);
+ if (IS_ERR(pinfo))
+ return PTR_ERR(pinfo);
+
+ pinfo->vddio = devm_regulator_get(dev, "vddio");
+ if (IS_ERR(pinfo->vddio))
+ return dev_err_probe(dev, PTR_ERR(pinfo->vddio), "failed to get vddio regulator\n");
+
+ pinfo->avdd = devm_regulator_get(dev, "avdd");
+ if (IS_ERR(pinfo->avdd))
+ return dev_err_probe(dev, PTR_ERR(pinfo->avdd), "failed to get avdd regulator\n");
+
+ pinfo->avee = devm_regulator_get(dev, "avee");
+ if (IS_ERR(pinfo->avee))
+ return dev_err_probe(dev, PTR_ERR(pinfo->avee), "failed to get avee regulator\n");
+
+ pinfo->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR(pinfo->reset_gpio))
+ return dev_err_probe(dev, PTR_ERR(pinfo->reset_gpio), "failed to get reset gpio\n");
+
+ pinfo->desc = of_device_get_match_data(dev);
+ if (!pinfo->desc)
+ return -ENODEV;
+
+ /* If the panel is dual dsi, register DSI1 */
+ if (pinfo->desc->is_dual_dsi) {
+ info = &pinfo->desc->dsi_info;
+
+ dsi1 = of_graph_get_remote_node(dsi->dev.of_node, 1, -1);
+ if (!dsi1) {
+ dev_err(dev, "cannot get secondary DSI node.\n");
+ return -ENODEV;
+ }
+
+ dsi1_host = of_find_mipi_dsi_host_by_node(dsi1);
+ of_node_put(dsi1);
+ if (!dsi1_host)
+ return dev_err_probe(dev, -EPROBE_DEFER, "cannot get secondary DSI host\n");
+
+ pinfo->dsi[1] = devm_mipi_dsi_device_register_full(dev, dsi1_host, info);
+ if (IS_ERR(pinfo->dsi[1])) {
+ dev_err(dev, "cannot get secondary DSI device\n");
+ return PTR_ERR(pinfo->dsi[1]);
+ }
+ }
+
+ pinfo->dsi[0] = dsi;
+ mipi_dsi_set_drvdata(dsi, pinfo);
+
+ ret = drm_of_get_panel_orientation(dev->of_node, &pinfo->orientation);
+ if (ret < 0) {
+ dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, ret);
+ return ret;
+ }
+
+ pinfo->panel.prepare_prev_first = true;
+
+ ret = drm_panel_of_backlight(&pinfo->panel);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to get backlight\n");
+
+ ret = devm_drm_panel_add(&dsi->dev, &pinfo->panel);
+ if (ret)
+ return dev_err_probe(dev, ret, "can't add the panel\n");
+
+ for (i = 0; i < nt36850_num_dsi_hosts(pinfo); i++) {
+ pinfo->dsi[i]->lanes = pinfo->desc->lanes;
+ pinfo->dsi[i]->format = pinfo->desc->format;
+ pinfo->dsi[i]->mode_flags = pinfo->desc->mode_flags;
+
+ ret = devm_mipi_dsi_attach(dev, pinfo->dsi[i]);
+ if (ret < 0)
+ return dev_err_probe(dev, ret, "cannot attach to DSI%d host.\n", i);
+ }
+
+ return 0;
+}
+
+static const struct of_device_id nt36850_of_match[] = {
+ {
+ .compatible = "truly,wqhd60-nt36850",
+ .data = &truly_wqhd_desc,
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, nt36850_of_match);
+
+static struct mipi_dsi_driver nt36850_driver = {
+ .probe = nt36850_probe,
+ .driver = {
+ .name = "panel-novatek-nt36850",
+ .of_match_table = nt36850_of_match,
+ },
+};
+module_mipi_dsi_driver(nt36850_driver);
+
+MODULE_AUTHOR("Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>");
+MODULE_DESCRIPTION("DRM driver for Novatek NT36850 based MIPI DSI panels");
+MODULE_LICENSE("GPL");
--
2.47.3
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v2 2/5] drm/panel: add Novatek NT36850 panel driver
2026-10-14 16:19 ` [PATCH v2 2/5] drm/panel: add Novatek NT36850 panel driver Dmitry Baryshkov
@ 2026-10-14 16:32 ` sashiko-bot
0 siblings, 0 replies; 9+ messages in thread
From: sashiko-bot @ 2026-10-14 16:32 UTC (permalink / raw)
To: Dmitry Baryshkov; +Cc: linux-clk, devicetree, dri-devel, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] drm/panel: uninitialized dsi_info causes empty secondary DSI device name
--
commit d78556555a8b667c80856e68aa43c5f0f311c5d4
Author: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
drm/panel: add Novatek NT36850 panel driver
This commit adds support for the Truly WQHD dual-DSI command mode panel
using the Novatek NT36850 controller. It configures power sequences,
initialization commands, and secondary host registration.
> diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36850.c b/drivers/gpu/drm/panel/panel-novatek-nt36850.c
> --- /dev/null
> +++ b/drivers/gpu/drm/panel/panel-novatek-nt36850.c
> [ ... ]
> +static const struct panel_desc truly_wqhd_desc = {
> + .mode = &truly_wqhd_mode,
> + .bpc = 8,
> + .lanes = 4,
> + .format = MIPI_DSI_FMT_RGB888,
> + .mode_flags = MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM,
> + .init_sequence = truly_wqhd_init_sequence,
> + .is_dual_dsi = true,
> +};
[Severity: Medium]
Because the dsi_info struct field is completely omitted here, it is
zero-initialized by the compiler.
> [ ... ]
> +static int nt36850_probe(struct mipi_dsi_device *dsi)
> +{
> [ ... ]
> + /* If the panel is dual dsi, register DSI1 */
> + if (pinfo->desc->is_dual_dsi) {
> + info = &pinfo->desc->dsi_info;
> [ ... ]
> + dsi1_host = of_find_mipi_dsi_host_by_node(dsi1);
> + of_node_put(dsi1);
> + if (!dsi1_host)
> + return dev_err_probe(dev, -EPROBE_DEFER, "cannot get secondary DSI host\n");
> +
> + pinfo->dsi[1] = devm_mipi_dsi_device_register_full(dev, dsi1_host, info);
[Severity: Medium]
Does passing this zero-initialized info struct to
devm_mipi_dsi_device_register_full() cause a malformed sysfs representation?
The MIPI DSI core copies info->type into dsi->name. Since info->type is
empty, it results in an empty string as the device name, creating a broken
uevent modalias of MODALIAS=mipi: with no actual name.
Should truly_wqhd_desc be updated to include a valid string in .dsi_info
so the secondary device is properly represented?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261014-sdm845-hdk-v2-0-6d0b4b42f267@oss.qualcomm.com?part=2
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 3/5] dt-bindings: arm: qcom: add Qualcomm SDM845 HDK
2026-10-14 16:19 [PATCH v2 0/5] arm64: dts: qcom: support SDM845 HDK Dmitry Baryshkov
2026-10-14 16:19 ` [PATCH v2 1/5] dt-bindings: display: panel: add Truly NT36850 WQHD panel Dmitry Baryshkov
2026-10-14 16:19 ` [PATCH v2 2/5] drm/panel: add Novatek NT36850 panel driver Dmitry Baryshkov
@ 2026-10-14 16:19 ` Dmitry Baryshkov
2026-10-14 16:19 ` [PATCH v2 4/5] arm64: dts: qcom: add device tree for SDM845-HDK Dmitry Baryshkov
2026-10-14 16:19 ` [PATCH v2 5/5] arm64: dts: qcom: sdm845-hdk: add display card overlay Dmitry Baryshkov
4 siblings, 0 replies; 9+ messages in thread
From: Dmitry Baryshkov @ 2026-10-14 16:19 UTC (permalink / raw)
To: Bjorn Andersson, Michael Turquette, Stephen Boyd, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
Jessica Zhang, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Simona Vetter, Abel Vesa,
Ulf Hansson
Cc: linux-arm-msm, linux-clk, linux-kernel, devicetree, dri-devel,
Krzysztof Kozlowski
Document the mobile HDK for the Qualcomm SDM845 platform.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 121ca557ce1e..dec58f8818df 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -1003,6 +1003,7 @@ properties:
- lg,judyp
- oneplus,enchilada
- oneplus,fajita
+ - qcom,sdm845-hdk
- qcom,sdm845-mtp
- shift,axolotl
- samsung,starqltechn
--
2.47.3
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v2 4/5] arm64: dts: qcom: add device tree for SDM845-HDK
2026-10-14 16:19 [PATCH v2 0/5] arm64: dts: qcom: support SDM845 HDK Dmitry Baryshkov
` (2 preceding siblings ...)
2026-10-14 16:19 ` [PATCH v2 3/5] dt-bindings: arm: qcom: add Qualcomm SDM845 HDK Dmitry Baryshkov
@ 2026-10-14 16:19 ` Dmitry Baryshkov
2026-10-14 16:31 ` sashiko-bot
2026-10-14 16:19 ` [PATCH v2 5/5] arm64: dts: qcom: sdm845-hdk: add display card overlay Dmitry Baryshkov
4 siblings, 1 reply; 9+ messages in thread
From: Dmitry Baryshkov @ 2026-10-14 16:19 UTC (permalink / raw)
To: Bjorn Andersson, Michael Turquette, Stephen Boyd, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
Jessica Zhang, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Simona Vetter, Abel Vesa,
Ulf Hansson
Cc: linux-arm-msm, linux-clk, linux-kernel, devicetree, dri-devel
Add device tree for the Qualcomm / Lantronix SDM845 HDK. It is the
development platform using the modem-less (SDA845) SoC, optional onboard
DSI panel and a rich set of connectors.
Working:
- HDMI display
- uSD, UFS, USB
- DSPs, WiFi, BT
- Buttons, LEDs
Not working or not tested:
- DisplayPort - TCPM not supported for this PMIC
- WiGig - requires power sequencing driver, doesn't work with the
current in-kernel driver
- Audio
- FingerPrint
- USIM
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/sdm845-hdk.dts | 820 ++++++++++++++++++++++++++++++++
2 files changed, 821 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 88230c4e00ea..5be99934cf9f 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -355,6 +355,7 @@ sdm845-db845c-navigation-mezzanine-dtbs := sdm845-db845c.dtb sdm845-db845c-navig
dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c-navigation-mezzanine.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-google-crosshatch.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-google-blueline.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sdm845-hdk.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyln.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-mtp.dtb
diff --git a/arch/arm64/boot/dts/qcom/sdm845-hdk.dts b/arch/arm64/boot/dts/qcom/sdm845-hdk.dts
new file mode 100644
index 000000000000..4dd426912d20
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm845-hdk.dts
@@ -0,0 +1,820 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include "sdm845.dtsi"
+#include "pm8005.dtsi"
+#include "pm8998.dtsi"
+#include "pmi8998.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. SDM845 HDK";
+ compatible = "qcom,sdm845-hdk", "qcom,sdm845";
+ chassis-type = "embedded";
+
+ aliases {
+ serial0 = &uart9;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ autorepeat;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&home_pin_a>, <&vol_up_pin_a>;
+
+ key-home {
+ label = "Home";
+ linux,code = <KEY_HOMEPAGE>;
+ gpios = <&pm8998_gpios 5 GPIO_ACTIVE_LOW>;
+ };
+
+ key-vol-up {
+ label = "Volume Up";
+ linux,code = <KEY_VOLUMEUP>;
+ gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ hdmi-out {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con: endpoint {
+ remote-endpoint = <<9611_out>;
+ };
+ };
+ };
+
+ /*
+ * Apparently RPMh does not provide support for PM8998 S4 and S6
+ * because they are always-on; model them as fixed regulators.
+ */
+ vreg_s4a_1p8: regulator-pm8998-smps4 {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_s4a_1p8";
+
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-always-on;
+ regulator-boot-on;
+
+ vin-supply = <&vph_pwr>;
+ };
+
+ vreg_s6a_0p8: regulator-pm8998-smps6 {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_s6a_0p8";
+
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <800000>;
+
+ regulator-always-on;
+ regulator-boot-on;
+
+ vin-supply = <&vph_pwr>;
+ };
+
+ vreg_sys_bob_3p3: regulator-sys-bob {
+ compatible = "regulator-fixed";
+ regulator-name = "sys_bob";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-always-on;
+ regulator-boot-on;
+
+ vin-supply = <&vreg_s4a_1p8>;
+ };
+
+ vph_pwr: regulator-vph-pwr {
+ compatible = "regulator-fixed";
+ regulator-name = "vph_pwr";
+ regulator-min-microvolt = <3700000>;
+ regulator-max-microvolt = <3700000>;
+ };
+};
+
+&adsp_pas {
+ firmware-name = "qcom/sdm845/adsp.mbn";
+
+ status = "okay";
+};
+
+&apps_rsc {
+ regulators-0 {
+ compatible = "qcom,pm8998-rpmh-regulators";
+ qcom,pmic-id = "a";
+
+ vdd-s1-supply = <&vph_pwr>;
+ vdd-s2-supply = <&vph_pwr>;
+ vdd-s3-supply = <&vph_pwr>;
+ vdd-s4-supply = <&vph_pwr>;
+ vdd-s5-supply = <&vph_pwr>;
+ vdd-s6-supply = <&vph_pwr>;
+ vdd-s7-supply = <&vph_pwr>;
+ vdd-s8-supply = <&vph_pwr>;
+ vdd-s9-supply = <&vph_pwr>;
+ vdd-s10-supply = <&vph_pwr>;
+ vdd-s11-supply = <&vph_pwr>;
+ vdd-s12-supply = <&vph_pwr>;
+ vdd-s13-supply = <&vph_pwr>;
+ vdd-l1-l27-supply = <&vreg_s7a_1p025>;
+ vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
+ vdd-l3-l11-supply = <&vreg_s7a_1p025>;
+ vdd-l4-l5-supply = <&vreg_s7a_1p025>;
+ vdd-l6-supply = <&vph_pwr>;
+ vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
+ vdd-l9-supply = <&vreg_bob>;
+ vdd-l10-l23-l25-supply = <&vreg_bob>;
+ vdd-l13-l19-l21-supply = <&vreg_bob>;
+ vdd-l16-l28-supply = <&vreg_bob>;
+ vdd-l18-l22-supply = <&vreg_bob>;
+ vdd-l20-l24-supply = <&vreg_bob>;
+ vdd-l26-supply = <&vreg_s3a_1p35>;
+ vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
+
+ vreg_s2a_1p125: smps2 {
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ };
+
+ vreg_s3a_1p35: smps3 {
+ regulator-min-microvolt = <1352000>;
+ regulator-max-microvolt = <1352000>;
+ };
+
+ vreg_s5a_2p04: smps5 {
+ regulator-min-microvolt = <1904000>;
+ regulator-max-microvolt = <2040000>;
+ };
+
+ vreg_s7a_1p025: smps7 {
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1028000>;
+ };
+
+ vreg_l1a_0p88: ldo1 {
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <880000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2a_1p2: ldo2 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-always-on;
+ };
+
+ vreg_l3a_1p0: ldo3 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l5a_0p8: ldo5 {
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l6a_1p85: ldo6 {
+ regulator-min-microvolt = <1856000>;
+ regulator-max-microvolt = <1856000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l7a_1p8: ldo7 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l8a_1p2: ldo8 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1248000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l9a_1p8: ldo9 {
+ regulator-min-microvolt = <1704000>;
+ regulator-max-microvolt = <2928000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l10a_1p8: ldo10 {
+ regulator-min-microvolt = <1704000>;
+ regulator-max-microvolt = <2928000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l11a_1p0: ldo11 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1048000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l12a_1p8: ldo12 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l13a_2p95: ldo13 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l14a_1p8: ldo14 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l15a_1p8: ldo15 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l16a_2p7: ldo16 {
+ regulator-min-microvolt = <2704000>;
+ regulator-max-microvolt = <2704000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l17a_1p3: ldo17 {
+ regulator-min-microvolt = <1304000>;
+ regulator-max-microvolt = <1304000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l18a_2p7: ldo18 {
+ regulator-min-microvolt = <2704000>;
+ regulator-max-microvolt = <2960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l19a_3p0: ldo19 {
+ regulator-min-microvolt = <2856000>;
+ regulator-max-microvolt = <3104000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l20a_2p95: ldo20 {
+ regulator-min-microvolt = <2704000>;
+ regulator-max-microvolt = <2960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l21a_2p95: ldo21 {
+ regulator-min-microvolt = <2704000>;
+ regulator-max-microvolt = <2960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l22a_2p85: ldo22 {
+ regulator-min-microvolt = <2864000>;
+ regulator-max-microvolt = <3312000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l23a_3p3: ldo23 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3312000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l24a_3p075: ldo24 {
+ regulator-min-microvolt = <3088000>;
+ regulator-max-microvolt = <3088000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l25a_3p3: ldo25 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3312000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l26a_1p2: ldo26 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l28a_3p0: ldo28 {
+ regulator-min-microvolt = <2856000>;
+ regulator-max-microvolt = <3008000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_lvs1a_1p8: lvs1 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ vreg_lvs2a_1p8: lvs2 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+ };
+
+ regulators-1 {
+ compatible = "qcom,pmi8998-rpmh-regulators";
+ qcom,pmic-id = "b";
+
+ vdd-bob-supply = <&vph_pwr>;
+
+ vreg_bob: bob {
+ regulator-min-microvolt = <3312000>;
+ regulator-max-microvolt = <3600000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
+ regulator-allow-bypass;
+ };
+ };
+
+ regulators-2 {
+ compatible = "qcom,pm8005-rpmh-regulators";
+ qcom,pmic-id = "c";
+
+ vdd-s1-supply = <&vph_pwr>;
+ vdd-s2-supply = <&vph_pwr>;
+ vdd-s3-supply = <&vph_pwr>;
+ vdd-s4-supply = <&vph_pwr>;
+
+ vreg_s3c_0p6: smps3 {
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <600000>;
+ };
+ };
+};
+
+&cluster_sleep_0 {
+ /* default, 0x4100c244, kills the board */
+ arm,psci-suspend-param = <0x41008244>;
+};
+
+&cdsp_pas {
+ firmware-name = "qcom/sdm845/cdsp.mbn";
+
+ status = "okay";
+};
+
+&gcc {
+ protected-clocks = <GCC_QSPI_CORE_CLK>,
+ <GCC_QSPI_CORE_CLK_SRC>,
+ <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
+ <GCC_LPASS_Q6_AXI_CLK>,
+ <GCC_LPASS_SWAY_CLK>;
+};
+
+&gpi_dma0 {
+ status = "okay";
+};
+
+&gpi_dma1 {
+ status = "okay";
+};
+
+&gpu {
+ status = "okay";
+};
+
+&gpu_zap_shader {
+ firmware-name = "qcom/sdm845/a630_zap.mbn";
+};
+
+&i2c3 {
+ clock-frequency = <400000>;
+
+ status = "okay";
+
+ lt9611_codec: hdmi-bridge@3b {
+ compatible = "lontium,lt9611";
+ reg = <0x3b>;
+ #sound-dai-cells = <1>;
+
+ interrupts-extended = <&tlmm 113 IRQ_TYPE_EDGE_FALLING>;
+
+ reset-gpios = <&tlmm 76 GPIO_ACTIVE_HIGH>;
+
+ vdd-supply = <&vreg_s4a_1p8>;
+ vcc-supply = <&vreg_sys_bob_3p3>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <<9611_irq_pin>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ lt9611_a: endpoint {
+ remote-endpoint = <&mdss_dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ lt9611_b: endpoint {
+ remote-endpoint = <&mdss_dsi1_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ lt9611_out: endpoint {
+ remote-endpoint = <&hdmi_con>;
+ };
+ };
+ };
+ };
+};
+
+&mdss {
+ status = "okay";
+};
+
+&mdss_dsi0 {
+ status = "okay";
+ vdda-supply = <&vreg_l26a_1p2>;
+
+ qcom,dual-dsi-mode;
+ qcom,master-dsi;
+};
+
+&mdss_dsi0_out {
+ remote-endpoint = <<9611_a>;
+ data-lanes = <0 1 2 3>;
+};
+
+&mdss_dsi0_phy {
+ status = "okay";
+ vdds-supply = <&vreg_s6a_0p8>;
+};
+
+&mdss_dsi1 {
+ vdda-supply = <&vreg_l26a_1p2>;
+
+ qcom,dual-dsi-mode;
+
+ /* DSI1 is slave, so use DSI0 clocks */
+ assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+ <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
+
+ status = "okay";
+};
+
+&mdss_dsi1_out {
+ remote-endpoint = <<9611_b>;
+ data-lanes = <0 1 2 3>;
+};
+
+&mdss_dsi1_phy {
+ vdds-supply = <&vreg_s6a_0p8>;
+ status = "okay";
+};
+
+&mss_pil {
+ firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
+
+ status = "okay";
+};
+
+&pcie0 {
+ perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
+
+ pinctrl-0 = <&pcie0_default_state>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&pcie0_phy {
+ vdda-phy-supply = <&vreg_l1a_0p88>;
+ vdda-pll-supply = <&vreg_l26a_1p2>;
+
+ status = "okay";
+};
+
+&pcie1 {
+ perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie1_default_state>;
+
+ status = "okay";
+};
+
+&pcie1_phy {
+ status = "okay";
+
+ vdda-phy-supply = <&vreg_l1a_0p88>;
+ vdda-pll-supply = <&vreg_l26a_1p2>;
+};
+
+&pm8998_gpios {
+ home_pin_a: home-active-state {
+ pins = "gpio6";
+ function = "normal";
+ input-enable;
+ bias-pull-up;
+ qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
+ };
+
+ vol_up_pin_a: vol-up-active-state {
+ pins = "gpio6";
+ function = "normal";
+ input-enable;
+ bias-pull-up;
+ qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
+ };
+};
+
+&pm8998_resin {
+ linux,code = <KEY_VOLUMEDOWN>;
+
+ status = "okay";
+};
+
+&pmi8998_lpg {
+ status = "okay";
+
+ qcom,power-source = <1>;
+
+ led@3 {
+ reg = <3>;
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_BLUETOOTH;
+ linux,default-trigger = "bluetooth-power";
+ };
+
+ led@4 {
+ reg = <4>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_HEARTBEAT;
+ linux,default-trigger = "heartbeat";
+ function-enumerator = <2>;
+ };
+
+ led@5 {
+ reg = <5>;
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <1>;
+ };
+};
+
+&pmi8998_wled {
+ status = "disabled";
+};
+
+&qupv3_id_0 {
+ status = "okay";
+};
+
+&qupv3_id_1 {
+ status = "okay";
+};
+
+&sdhc_2 {
+ status = "okay";
+
+ pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
+ pinctrl-names = "default";
+
+ vmmc-supply = <&vreg_l21a_2p95>;
+ vqmmc-supply = <&vreg_l13a_2p95>;
+
+ bus-width = <4>;
+ cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
+};
+
+&slpi_pas {
+ firmware-name = "qcom/sdm845/Qualcomm/SDM845-HDK/slpi.mbn";
+
+ status = "okay";
+};
+
+&tlmm {
+ gpio-reserved-ranges = <0 4>, /* SPI (eSE - embedded Secure Element) */
+ <81 4>; /* SPI (fingerprint reader) */
+
+ lt9611_irq_pin: lt9611-irq-state {
+ pins = "gpio113";
+ function = "gpio";
+ bias-disable;
+ };
+
+ pcie0_default_state: pcie0-default-state {
+ clkreq-pins {
+ pins = "gpio36";
+ function = "pci_e0";
+ bias-pull-up;
+ };
+
+ perst-n-pins {
+ pins = "gpio35";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ wake-n-pins {
+ pins = "gpio37";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
+ pcie1_default_state: pcie1-default-state {
+ clkreq-pins {
+ pins = "gpio103";
+ function = "pci_e1";
+ bias-pull-up;
+ };
+
+ perst-n-pins {
+ pins = "gpio102";
+ function = "gpio";
+ drive-strength = <16>;
+ bias-pull-down;
+ };
+
+ wake-n-pins {
+ pins = "gpio104";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
+ sdc2_default_state: sdc2-default-state {
+ clk-pins {
+ pins = "sdc2_clk";
+ bias-disable;
+
+ /*
+ * It seems that mmc_test reports errors if drive
+ * strength is not 16 on clk, cmd, and data pins.
+ */
+ drive-strength = <16>;
+ };
+
+ cmd-pins {
+ pins = "sdc2_cmd";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+
+ data-pins {
+ pins = "sdc2_data";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+ };
+
+ sdc2_card_det_n: sd-card-det-n-state {
+ pins = "gpio126";
+ function = "gpio";
+ bias-pull-up;
+ };
+};
+
+&uart6 {
+ pinctrl-0 = <&qup_uart6_4pin>;
+
+ status = "okay";
+
+ bluetooth {
+ compatible = "qcom,wcn3990-bt";
+
+ vddio-supply = <&vreg_s4a_1p8>;
+ vddxo-supply = <&vreg_l7a_1p8>;
+ vddrf-supply = <&vreg_l17a_1p3>;
+ vddch0-supply = <&vreg_l25a_3p3>;
+ max-speed = <3200000>;
+ };
+};
+
+&uart9 {
+ status = "okay";
+};
+
+&ufs_mem_hc {
+ status = "okay";
+
+ reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
+
+ vcc-supply = <&vreg_l20a_2p95>;
+ vcc-max-microamp = <800000>;
+};
+
+&ufs_mem_phy {
+ status = "okay";
+
+ vdda-phy-supply = <&vreg_l1a_0p88>;
+ vdda-pll-supply = <&vreg_l26a_1p2>;
+};
+
+&usb_1 {
+ status = "okay";
+};
+
+&usb_1_dwc3 {
+ dr_mode = "peripheral";
+};
+
+&usb_1_hsphy {
+ status = "okay";
+
+ vdd-supply = <&vreg_l1a_0p88>;
+ vdda-pll-supply = <&vreg_l12a_1p8>;
+ vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
+
+ qcom,imp-res-offset-value = <8>;
+ qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
+ qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
+ qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
+};
+
+&usb_1_qmpphy {
+ vdda-phy-supply = <&vreg_l26a_1p2>;
+ vdda-pll-supply = <&vreg_l1a_0p88>;
+
+ status = "okay";
+};
+
+/* HS only */
+&usb_2 {
+ qcom,select-utmi-as-pipe-clk;
+
+ status = "okay";
+};
+
+&usb_2_dwc3 {
+ maximum-speed = "high-speed";
+ phys = <&usb_2_hsphy>;
+ phy-names = "usb2-phy";
+
+ dr_mode = "host";
+};
+
+&usb_2_hsphy {
+ vdd-supply = <&vreg_l1a_0p88>;
+ vdda-pll-supply = <&vreg_l12a_1p8>;
+ vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
+
+ qcom,imp-res-offset-value = <8>;
+ qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
+
+ status = "okay";
+};
+
+&venus {
+ status = "okay";
+};
+
+&wifi {
+ vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
+ vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
+ vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
+ vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
+ vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
+
+ qcom,snoc-host-cap-8bit-quirk;
+ qcom,calibration-variant = "Qualcomm_sdm845hdk";
+
+ status = "okay";
+};
+
+/* PINCTRL - additions to nodes defined in sdm845.dtsi */
+&qup_uart9_rx {
+ drive-strength = <2>;
+ bias-pull-up;
+};
+
+&qup_uart9_tx {
+ drive-strength = <2>;
+ bias-disable;
+};
--
2.47.3
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v2 4/5] arm64: dts: qcom: add device tree for SDM845-HDK
2026-10-14 16:19 ` [PATCH v2 4/5] arm64: dts: qcom: add device tree for SDM845-HDK Dmitry Baryshkov
@ 2026-10-14 16:31 ` sashiko-bot
0 siblings, 0 replies; 9+ messages in thread
From: sashiko-bot @ 2026-10-14 16:31 UTC (permalink / raw)
To: Dmitry Baryshkov; +Cc: linux-clk, devicetree, dri-devel, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] dts: usb_1_qmpphy swaps vdda-phy and vdda-pll voltage supplies
- [Medium] dts: home_pin_a pinctrl incorrectly configures gpio6 instead of gpio5
- [Medium] dts: impossible 1.8V vin-supply for 3.3V fixed regulator vreg_sys_bob_3p3
--
commit 48f1c407e24f3899e533d5dddbd59a77b4901a02
Author: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
arm64: dts: qcom: add device tree for SDM845-HDK
This patch adds the device tree for the SDM845-HDK board, a development
platform utilizing the modem-less SDA845 SoC. It introduces initial support
for features like HDMI display, uSD, UFS, USB, and various onboard peripherals.
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-hdk.dts b/arch/arm64/boot/dts/qcom/sdm845-hdk.dts
> new file mode 100644
> index 0000000000000..4dd426912d20f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sdm845-hdk.dts
[ ... ]
> + vreg_sys_bob_3p3: regulator-sys-bob {
> + compatible = "regulator-fixed";
> + regulator-name = "sys_bob";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + regulator-always-on;
> + regulator-boot-on;
> +
> + vin-supply = <&vreg_s4a_1p8>;
> + };
[Severity: Medium]
Is vreg_s4a_1p8 the correct vin-supply for this regulator?
vreg_s4a_1p8 provides 1.8V, but vreg_sys_bob_3p3 is defined as a 3.3V fixed
regulator. A fixed regulator cannot step up a 1.8V input to 3.3V.
Could this create an incorrect power dependency tree, potentially causing the
1.8V supply to be kept awake unnecessarily or turned off while the 3.3V rail
is still needed?
[ ... ]
> +&pm8998_gpios {
> + home_pin_a: home-active-state {
> + pins = "gpio6";
> + function = "normal";
> + input-enable;
> + bias-pull-up;
> + qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
> + };
[Severity: Medium]
Does home_pin_a incorrectly configure gpio6 instead of gpio5?
Earlier in the file, the key-home node is defined to use gpio5:
key-home {
label = "Home";
linux,code = <KEY_HOMEPAGE>;
gpios = <&pm8998_gpios 5 GPIO_ACTIVE_LOW>;
};
Configuring gpio6 here leaves gpio5 without its required pull-up configuration,
which could break the Home button. Additionally, since vol_up_pin_a also uses
gpio6, this results in gpio6 being configured twice.
[ ... ]
> +&usb_1_qmpphy {
> + vdda-phy-supply = <&vreg_l26a_1p2>;
> + vdda-pll-supply = <&vreg_l1a_0p88>;
> +
> + status = "okay";
> +};
[Severity: High]
Are the voltage supplies for vdda-phy and vdda-pll swapped?
The QMP PHY expects a ~0.88V core supply and a 1.2V PLL supply. Assigning
vreg_l26a_1p2 (1.2V) to vdda-phy-supply and vreg_l1a_0p88 (0.88V) to
vdda-pll-supply applies excessive voltage to the 0.88V rail and insufficient
voltage to the 1.2V rail.
Could this reversed configuration lead to hardware failure or potential damage?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261014-sdm845-hdk-v2-0-6d0b4b42f267@oss.qualcomm.com?part=4
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 5/5] arm64: dts: qcom: sdm845-hdk: add display card overlay
2026-10-14 16:19 [PATCH v2 0/5] arm64: dts: qcom: support SDM845 HDK Dmitry Baryshkov
` (3 preceding siblings ...)
2026-10-14 16:19 ` [PATCH v2 4/5] arm64: dts: qcom: add device tree for SDM845-HDK Dmitry Baryshkov
@ 2026-10-14 16:19 ` Dmitry Baryshkov
2026-10-14 16:34 ` sashiko-bot
4 siblings, 1 reply; 9+ messages in thread
From: Dmitry Baryshkov @ 2026-10-14 16:19 UTC (permalink / raw)
To: Bjorn Andersson, Michael Turquette, Stephen Boyd, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
Jessica Zhang, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Simona Vetter, Abel Vesa,
Ulf Hansson
Cc: linux-arm-msm, linux-clk, linux-kernel, devicetree, dri-devel
The SDM845 HDK can be fitted with the same display card as the SM8150
HDK, carrying a Truly NT36850 WQHD dual-DSI panel. Here it is powered
by the PMI8998 LAB/IBB and WLED, and it is mutually exclusive with the
on-board LT9611 HDMI bridge.
The configuration follows the vendor kernel, with the bias rails at the
5.5 V default of the LCD mode and the mode select line driven low for
the dual port mode.
Assisted-by: LLM
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/Makefile | 4 +
.../boot/dts/qcom/sdm845-hdk-display-card.dtso | 109 +++++++++++++++++++++
2 files changed, 113 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 5be99934cf9f..85d06a950b4a 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -356,6 +356,10 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c-navigation-mezzanine.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-google-crosshatch.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-google-blueline.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-hdk.dtb
+
+sdm845-hdk-display-card-dtbs := sdm845-hdk.dtb sdm845-hdk-display-card.dtbo
+
+dtb-$(CONFIG_ARCH_QCOM) += sdm845-hdk-display-card.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyln.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-mtp.dtb
diff --git a/arch/arm64/boot/dts/qcom/sdm845-hdk-display-card.dtso b/arch/arm64/boot/dts/qcom/sdm845-hdk-display-card.dtso
new file mode 100644
index 000000000000..1022ab096170
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm845-hdk-display-card.dtso
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+/*
+ * Display Card kit overlay.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+/dts-v1/;
+/plugin/;
+
+/* Disable HDMI bridge related nodes (mutually exclusive with the display card) */
+<9611_codec {
+ status = "disabled";
+};
+
+&ibb {
+ regulator-min-microvolt = <5500000>;
+ regulator-max-microvolt = <5500000>;
+};
+
+&lab {
+ regulator-min-microvolt = <5500000>;
+ regulator-max-microvolt = <5500000>;
+};
+
+&mdss_dsi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ panel@0 {
+ compatible = "truly,wqhd60-nt36850";
+ reg = <0>;
+
+ reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
+
+ vddio-supply = <&vreg_l14a_1p8>;
+ avdd-supply = <&lab>;
+ avee-supply = <&ibb>;
+
+ backlight = <&pmi8998_wled>;
+
+ pinctrl-0 = <&disp0_reset_n_active>, <&mdp_vsync>;
+ pinctrl-1 = <&disp0_reset_n_suspend>, <&mdp_vsync>;
+ pinctrl-names = "default", "sleep";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ panel0_in: endpoint {
+ remote-endpoint = <&mdss_dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ panel1_in: endpoint {
+ remote-endpoint = <&mdss_dsi1_out>;
+ };
+ };
+ };
+ };
+};
+
+&mdss_dsi0_out {
+ remote-endpoint = <&panel0_in>;
+};
+
+&mdss_dsi1_out {
+ remote-endpoint = <&panel1_in>;
+};
+
+&pmi8998_wled {
+ qcom,num-strings = <2>;
+ qcom,external-pfet;
+
+ status = "okay";
+};
+
+&tlmm {
+ disp0_reset_n_active: disp0-reset-n-active-state {
+ pins = "gpio6";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ disp0_reset_n_suspend: disp0-reset-n-suspend-state {
+ pins = "gpio6";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ mdp_vsync: mdp-vsync-state {
+ pins = "gpio10";
+ function = "mdp_vsync";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
--
2.47.3
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH v2 5/5] arm64: dts: qcom: sdm845-hdk: add display card overlay
2026-10-14 16:19 ` [PATCH v2 5/5] arm64: dts: qcom: sdm845-hdk: add display card overlay Dmitry Baryshkov
@ 2026-10-14 16:34 ` sashiko-bot
0 siblings, 0 replies; 9+ messages in thread
From: sashiko-bot @ 2026-10-14 16:34 UTC (permalink / raw)
To: Dmitry Baryshkov; +Cc: linux-clk, devicetree, dri-devel, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dts: qcom: sdm845-hdk: missing mode select line configuration
--
commit 054d071f82b9427b1a9e8eba69c5018761cb4d20
Author: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
arm64: dts: qcom: sdm845-hdk: add display card overlay
This commit adds a device tree overlay for the SDM845 HDK to support a
Truly NT36850 WQHD dual-DSI panel.
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-hdk-display-card.dtso b/arch/arm64/boot/dts/qcom/sdm845-hdk-display-card.dtso
> new file mode 100644
> index 0000000000000..1022ab096170f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sdm845-hdk-display-card.dtso
[ ... ]
> +&tlmm {
> + disp0_reset_n_active: disp0-reset-n-active-state {
> + pins = "gpio6";
> + function = "gpio";
> + drive-strength = <8>;
> + bias-disable;
> + };
> +
> + disp0_reset_n_suspend: disp0-reset-n-suspend-state {
> + pins = "gpio6";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +
> + mdp_vsync: mdp-vsync-state {
> + pins = "gpio10";
> + function = "mdp_vsync";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
> +};
[Severity: Medium]
The commit message states "the mode select line driven low for the dual
port mode", but does the &tlmm node actually configure this?
There doesn't appear to be a gpio-hog definition or other configuration
here to statically drive the mode select line low. Without it, might the
dual-DSI panel fail to initialize correctly if the hardware defaults
to the single port mode?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261014-sdm845-hdk-v2-0-6d0b4b42f267@oss.qualcomm.com?part=5
^ permalink raw reply [flat|nested] 9+ messages in thread