Re: [PATCH RFC 07/23] ASoC: dt-bindings: qcom,lpass-cpu: document the SM8650 LPASS

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] ASoC: dt-bindings: qcom,lpass-cpu: split unwieldy per-compatible
  schema
--

commit f17c7c8f20845c2d15f821f60a13b5f93656ae8d
Author: Neil Armstrong <neil.armstrong@linaro.org>

ASoC: dt-bindings: qcom,lpass-cpu: document the SM8650 LPASS

This commit adds the qcom,sm8650-lpass-cpu compatible string and its
register, clock, and interrupt definitions to the qcom,lpass-cpu binding
schema.

> diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml
> index 3a559bd07a79b..f431173a0e880 100644
> --- a/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml
> +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml
> @@ -23,32 +23,33 @@ properties:
>        - qcom,apq8016-lpass-cpu
>        - qcom,sc7180-lpass-cpu
>        - qcom,sc7280-lpass-cpu
> +      - qcom,sm8650-lpass-cpu
>  
>    reg:
>      minItems: 1
> -    maxItems: 6
> +    maxItems: 8
>      description: LPAIF core registers
>  
>    reg-names:
>      minItems: 1
> -    maxItems: 6
> +    maxItems: 8
>  
>    clocks:
>      minItems: 3
> -    maxItems: 10
> +    maxItems: 16
>  
>    clock-names:
>      minItems: 1
> -    maxItems: 10
> +    maxItems: 16
>  
>    interrupts:
>      minItems: 1
> -    maxItems: 4
> +    maxItems: 6
>      description: LPAIF DMA buffer interrupt
>  
>    interrupt-names:
>      minItems: 1
> -    maxItems: 4
> +    maxItems: 6
>  
>    qcom,adsp:
>      $ref: /schemas/types.yaml#/definitions/phandle
> @@ -59,6 +60,8 @@ properties:
>      maxItems: 3
>      description: Phandle to apps_smmu node with sid mask
>  
> +  dma-coherent: true
> +
>    power-domains:
>      maxItems: 1
>  
> @@ -241,6 +244,65 @@ allOf:
>          - iommus
>          - power-domains
>  
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: qcom,sm8650-lpass-cpu
> +
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 16
> +          maxItems: 16

[Severity: Low]
Should this binding be split into separate schema files (sharing common DAI
definitions via a common schema ref if needed) instead of adding another
large per-compatible if-then block to qcom,lpass-cpu.yaml?

Each SoC variant here has substantially different reg, clock, and interrupt
counts and names.  Fitting qcom,sm8650-lpass-cpu into the same schema also
widens the top-level maxItems limits and enables dma-coherent at the top
level, which relaxes validation for older compatibles like qcom,lpass-cpu
and qcom,apq8016-lpass-cpu whose if-then blocks only constrain clocks and
clock-names.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261113-topic-sm8650-el2-v1-0-5183f6aab9fc@linaro.org?part=7