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From: sashiko-bot@kernel.org
To: "Neil Armstrong" <neil.armstrong@linaro.org>
Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org,
	robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH RFC 10/23] ASoC: qcom: lpass-cdc-dma: add support for WSA codec DMA
Date: Fri, 13 Nov 2026 19:07:06 +0000	[thread overview]
Message-ID: <sashiko-outbox-213505@kernel.org> (raw)
In-Reply-To: <20261113-topic-sm8650-el2-v1-10-5183f6aab9fc@linaro.org>

Thank you for your contribution! Sashiko AI review found 2 potential
issues to consider:
- [Medium] ASoC: qcom: missing WSA_TX4 case in
  __lpass_get_codec_dma_intf_type()
- [Medium] ASoC: qcom: unchecked clk_prepare_enable() in
  lpass_cdc_dma_daiops_startup()
--

commit fe9e37da583fba7a4cfa98118783d3ccffae7524
Author: Neil Armstrong <neil.armstrong@linaro.org>

ASoC: qcom: lpass-cdc-dma: add support for WSA codec DMA

This commit adds WSA codec DMA interface plumbing and clock handling to
the LPASS codec DMA driver.

> diff --git a/sound/soc/qcom/lpass-cdc-dma.c b/sound/soc/qcom/lpass-cdc-dma.c
> index 2dc8c75c4bf08..903055e3188d8 100644
> --- a/sound/soc/qcom/lpass-cdc-dma.c
> +++ b/sound/soc/qcom/lpass-cdc-dma.c

[ ... ]

> @@ -68,49 +76,67 @@ static int __lpass_get_codec_dma_intf_type(int dai_id)
>  	case LPASS_CDC_DMA_RX0:
>  	case LPASS_CDC_DMA_TX0:
>  	case LPASS_CDC_DMA_VA_TX0:
> +	case LPASS_CDC_DMA_WSA_TX0:
> +	case LPASS_CDC_DMA_WSA_RX0:
>  		ret = LPASS_CDC_DMA_INTERFACE1;
>  		break;
>  	case LPASS_CDC_DMA_RX1:
>  	case LPASS_CDC_DMA_TX1:
>  	case LPASS_CDC_DMA_VA_TX1:
> +	case LPASS_CDC_DMA_WSA_RX1:
> +	case LPASS_CDC_DMA_WSA_TX1:
>  		ret = LPASS_CDC_DMA_INTERFACE2;
>  		break;
>  	case LPASS_CDC_DMA_RX2:
>  	case LPASS_CDC_DMA_TX2:
>  	case LPASS_CDC_DMA_VA_TX2:
> +	case LPASS_CDC_DMA_WSA_RX2:
> +	case LPASS_CDC_DMA_WSA_TX2:
>  		ret = LPASS_CDC_DMA_INTERFACE3;
>  		break;
>  	case LPASS_CDC_DMA_RX3:
>  	case LPASS_CDC_DMA_TX3:
>  	case LPASS_CDC_DMA_VA_TX3:
> +	case LPASS_CDC_DMA_WSA_RX3:
> +	case LPASS_CDC_DMA_WSA_TX3:
>  		ret = LPASS_CDC_DMA_INTERFACE4;
>  		break;
>  	case LPASS_CDC_DMA_RX4:
>  	case LPASS_CDC_DMA_TX4:
>  	case LPASS_CDC_DMA_VA_TX4:
> +	case LPASS_CDC_DMA_WSA_RX4:
>  		ret = LPASS_CDC_DMA_INTERFACE5;
>  		break;

[Severity: Medium]
Should LPASS_CDC_DMA_WSA_TX4 also be included in the
LPASS_CDC_DMA_INTERFACE5 case?

__lpass_get_dmactl_handle(), lpass_cdc_dma_daiops_startup(), and
lpass_cdc_dma_daiops_shutdown() all handle the full
LPASS_CDC_DMA_WSA_TX0 ... LPASS_CDC_DMA_WSA_TX8 range, but omitting
LPASS_CDC_DMA_WSA_TX4 here causes __lpass_get_codec_dma_intf_type() to
return -EINVAL and __lpass_platform_codec_intf_init() to abort without
configuring or enabling the DMA interface.

[ ... ]

> @@ -184,6 +210,17 @@ static int lpass_cdc_dma_daiops_startup(struct snd_pcm_substream *substream,
>  		clk_set_rate(drvdata->va_mem0, CODEC_MEM_HZ_NORMAL);
>  		clk_prepare_enable(drvdata->va_mem0);
>  		break;
> +	case LPASS_CDC_DMA_WSA_RX0 ... LPASS_CDC_DMA_WSA_RX9:
> +	case LPASS_CDC_DMA_WSA_TX0 ... LPASS_CDC_DMA_WSA_TX8:
> +		clk_set_rate(drvdata->codec_mem0, CODEC_MEM_HZ_NORMAL);	//??
> +		clk_set_rate(drvdata->codec_mem1, CODEC_MEM_HZ_NORMAL);	//??
> +		clk_set_rate(drvdata->codec_mem2, CODEC_MEM_HZ_NORMAL);	//??
> +		clk_set_rate(drvdata->codec_mem3, CODEC_MEM_HZ_NORMAL);	//??
> +		clk_prepare_enable(drvdata->codec_mem0);		//??
> +		clk_prepare_enable(drvdata->codec_mem1);		//??
> +		clk_prepare_enable(drvdata->codec_mem2);		//??
> +		clk_prepare_enable(drvdata->codec_mem3);		//??
> +		break;
>  	default:
>  		dev_err(soc_runtime->dev, "%s: invalid  interface: %d\n", __func__, dai->id);
>  		break;
> @@ -205,6 +242,13 @@ static void lpass_cdc_dma_daiops_shutdown(struct snd_pcm_substream *substream,
>  	case LPASS_CDC_DMA_VA_TX0 ... LPASS_CDC_DMA_VA_TX0:
>  		clk_disable_unprepare(drvdata->va_mem0);
>  		break;
> +	case LPASS_CDC_DMA_WSA_RX0 ... LPASS_CDC_DMA_WSA_RX9:
> +	case LPASS_CDC_DMA_WSA_TX0 ... LPASS_CDC_DMA_WSA_TX8:
> +		clk_disable_unprepare(drvdata->codec_mem3);
> +		clk_disable_unprepare(drvdata->codec_mem2);
> +		clk_disable_unprepare(drvdata->codec_mem1);
> +		clk_disable_unprepare(drvdata->codec_mem0);
> +		break;

[Severity: Medium]
What happens if clk_set_rate() or clk_prepare_enable() fails in
lpass_cdc_dma_daiops_startup()?

Ignoring errors here lets the stream proceed with unclocked LPM memory,
leaves any earlier codec_mem clocks enabled on partial failure, and
causes lpass_cdc_dma_daiops_shutdown() to call clk_disable_unprepare()
on clocks whose enable failed.  Later commit "ASoC: qcom: lpass: enable
the right codec_mem clock when usin LPM memory" removes the "//??"
comments and selects a single clock via lpass_cdc_dma_mem_clk(), but
still leaves clk_set_rate() and clk_prepare_enable() unchecked.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261113-topic-sm8650-el2-v1-0-5183f6aab9fc@linaro.org?part=10

  reply	other threads:[~2026-11-13 19:07 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-13 18:38 [PATCH RFC 00/23] arm64: qcom: enable SM8650 audio without ADSP firmware Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 01/23] dt-bindings: clock: qcom: add SM8650 LPASS core & audio clock controllers Neil Armstrong
2026-11-13 18:57   ` sashiko-bot
2026-11-13 18:38 ` [PATCH RFC 02/23] clk: " Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 03/23] dt-bindings: pinctrl: qcom,sm8650-lpass-lpi-pinctrl: document clocks and power domaines when ADSP is not used Neil Armstrong
2026-11-13 19:02   ` sashiko-bot
2026-11-13 18:38 ` [PATCH RFC 04/23] ASoC: dt-bindings: qcom,lpass: add Senary & Septenary MI2S ids Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 05/23] ASoC: dt-bindings: qcom,lpass: add WSA RX and TX channels ids Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 06/23] ASoC: dt-bindings: qcom,lpass-*-macro: document less clock when ADSP is not used Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 07/23] ASoC: dt-bindings: qcom,lpass-cpu: document the SM8650 LPASS Neil Armstrong
2026-11-13 18:57   ` sashiko-bot
2026-11-13 18:38 ` [PATCH RFC 08/23] ASoC: qcom: lpass-cpu: get the optional codec_mem3 clock Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 09/23] ASoC: qcom: lpass: add support for optional WSA interface Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 10/23] ASoC: qcom: lpass-cdc-dma: add support for WSA codec DMA Neil Armstrong
2026-11-13 19:07   ` sashiko-bot [this message]
2026-11-13 18:38 ` [PATCH RFC 11/23] ASoC: qcom: lpass: prepare to handle multiple lpaifs for i2s Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 12/23] ASoC: qcom: lpass: add support for MI2S_SENARY & MI2S_SEPTENARY Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 13/23] ASoC: qcom: lpass: support mapping I2S ports to multiple LPAIFs Neil Armstrong
2026-11-13 19:04   ` sashiko-bot
2026-11-13 18:38 ` [PATCH RFC 14/23] ASoC: qcom: lpass: support LPM memory type for I2S LPAIFs Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 15/23] ASoC: qcom: lpass: allocate LPM buffer memory to DAIs Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 16/23] ASoC: qcom: lpass: enable the right codec_mem clock when usin LPM memory Neil Armstrong
2026-11-13 19:06   ` sashiko-bot
2026-11-13 18:38 ` [PATCH RFC 17/23] ASoC: qcom: add SM8650 LPASS CPU driver Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 18/23] ASoC: qcom: swd: allow LPASS_CDC_DMA_WSA_RX0 as soundwire dai Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 19/23] ASoC: qcom: sc8280xp: allow using the sc8280xp card with lpass-cpu Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 20/23] arm64: dts: qcom: sm8650: move EL1 Gunyah nodes to sm8650-el1.dtsi Neil Armstrong
2026-11-13 19:08   ` Val Packett
2026-11-13 18:38 ` [PATCH RFC 21/23] arm64: dts: qcom: add SM8650 LPASS CPU dtsi Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 22/23] arm64: dts: qcom: sm8650-valve-deckard: enable audio Neil Armstrong
2026-11-13 18:38 ` [PATCH RFC 23/23] arm64: defconfig: enable the SM8650 LPASS CPU driver Neil Armstrong

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