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From: Xu Yilun <yilun.xu@linux.intel.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: linux-pci@vger.kernel.org, linux-coco@lists.linux.dev,
	gregkh@linuxfoundation.org, aik@amd.com, aneesh.kumar@kernel.org,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lukas Wunner <lukas@wunner.de>, Samuel Ortiz <sameo@rivosinc.com>,
	Jonathan Cameron <jonathan.cameron@huawei.com>
Subject: Re: [PATCH v8 8/9] PCI/IDE: Report available IDE streams
Date: Mon, 10 Nov 2025 12:49:22 +0800	[thread overview]
Message-ID: <aRFu0q6/tdrfU8Qo@yilunxu-OptiPlex-7050> (raw)
In-Reply-To: <20251031212902.2256310-9-dan.j.williams@intel.com>

On Fri, Oct 31, 2025 at 02:29:00PM -0700, Dan Williams wrote:
> The limited number of link-encryption (IDE) streams that a given set of
> host bridges supports is a platform specific detail. Provide
> pci_ide_init_nr_streams() as a generic facility for either platform TSM

Should be updated to pci_ide_set_nr_streams().

> drivers, or PCI core native IDE, to report the number available streams.
> After invoking pci_ide_init_nr_streams() an "available_secure_streams"

I suppose should also be pci_ide_set_nr_streams() here.

> attribute appears in PCI host bridge sysfs to convey that count.

I don't see how it appears later. 

> +static umode_t pci_ide_attr_visible(struct kobject *kobj, struct attribute *a, int n)
> +{
> +	struct device *dev = kobj_to_dev(kobj);
> +	struct pci_host_bridge *hb = to_pci_host_bridge(dev);
> +
> +	if (a == &dev_attr_available_secure_streams.attr)
> +		if (!hb->nr_ide_streams)
> +			return 0;

The previous patch unconditionally initializes nr_ide_streams to 256, so
this check is not functional for "appear later". Maybe remove it.

> +
> +	return a->mode;
> +}
> +
> +const struct attribute_group pci_ide_attr_group = {
> +	.attrs = pci_ide_attrs,
> +	.is_visible = pci_ide_attr_visible,
> +};
> +
> +/**
> + * pci_ide_set_nr_streams() - sets size of the pool of IDE Stream resources
> + * @hb: host bridge boundary for the stream pool
> + * @nr: number of streams
> + *
> + * Platform PCI init and/or expert test module use only. Limit IDE
> + * Stream establishment by setting the number of stream resources
> + * available at the host bridge. Platform init code must set this before
> + * the first pci_ide_stream_alloc() call if the platform has less than the
> + * default of 256 streams per host-bridge.
> + *
> + * The "PCI_IDE" symbol namespace is required because this is typically
> + * a detail that is settled in early PCI init. I.e. this export is not
> + * for endpoint drivers.
> + */
> +void pci_ide_set_nr_streams(struct pci_host_bridge *hb, u16 nr)
> +{
> +	hb->nr_ide_streams = min(nr, 256);
> +	WARN_ON_ONCE(!ida_is_empty(&hb->ide_stream_ida));
> +	sysfs_update_group(&hb->dev.kobj, &pci_ide_attr_group);

Also no need to update group, is it?


Should be easy to address these concerns. I believe I can also:

Reviewed-by: Xu Yilun <yilun.xu@linux.intel.com>

> +}

  reply	other threads:[~2025-11-10  5:03 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-31 21:28 [PATCH v8 0/9] PCI/TSM: Core infrastructure for PCI device security (TDISP) Dan Williams
2025-10-31 21:28 ` [PATCH v8 1/9] coco/tsm: Introduce a core device for TEE Security Managers Dan Williams
2025-11-08 15:45   ` Xu Yilun
2025-10-31 21:28 ` [PATCH v8 2/9] PCI/IDE: Enumerate Selective Stream IDE capabilities Dan Williams
2025-11-08 16:15   ` Xu Yilun
2025-10-31 21:28 ` [PATCH v8 3/9] PCI: Introduce pci_walk_bus_reverse(), for_each_pci_dev_reverse() Dan Williams
2025-10-31 21:28 ` [PATCH v8 4/9] PCI/TSM: Establish Secure Sessions and Link Encryption Dan Williams
2025-11-10  3:44   ` Xu Yilun
2025-11-10 23:19     ` dan.j.williams
2025-10-31 21:28 ` [PATCH v8 5/9] PCI: Add PCIe Device 3 Extended Capability enumeration Dan Williams
2025-11-10  3:45   ` Xu Yilun
2025-10-31 21:28 ` [PATCH v8 6/9] PCI: Establish document for PCI host bridge sysfs attributes Dan Williams
2025-10-31 21:28 ` [PATCH v8 7/9] PCI/IDE: Add IDE establishment helpers Dan Williams
2025-11-03 15:04   ` Jonathan Cameron
2025-11-10  4:16   ` Xu Yilun
2025-11-10 23:21     ` dan.j.williams
2025-10-31 21:29 ` [PATCH v8 8/9] PCI/IDE: Report available IDE streams Dan Williams
2025-11-10  4:49   ` Xu Yilun [this message]
2025-11-10 23:49     ` dan.j.williams
2025-10-31 21:29 ` [PATCH v8 9/9] PCI/TSM: Report active " Dan Williams
2025-11-10  4:52   ` Xu Yilun

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