* [PATCH v4 2/2] hw_random: timeriomem-rng: add configurable read width and data mask
2026-06-17 11:44 [PATCH v4 1/2] dt-bindings: rng: timeriomem_rng: add reg-io-width and mask properties Jad Keskes
@ 2026-06-17 11:46 ` Jad Keskes
2026-06-17 15:11 ` Thomas Gleixner
2026-06-18 4:11 ` [PATCH v4 1/2] dt-bindings: rng: timeriomem_rng: add reg-io-width and mask properties Krzysztof Kozlowski
2026-06-18 4:12 ` Krzysztof Kozlowski
2 siblings, 1 reply; 5+ messages in thread
From: Jad Keskes @ 2026-06-17 11:46 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Olivia Mackall, Herbert Xu, Rob Herring, Conor Dooley,
Alexander Clouter, linux-crypto, devicetree, linux-kernel,
Jad Keskes
The TODO for supporting read sizes other than 32 bits and masking has
been sitting in this driver since 2009. Implement it.
Add reg-io-width (1, 2, or 4 bytes) and mask support. The read loop
dispatches on width using readb/readw/readl so a configured 1-byte
access doesn't trigger a bus error on hardware that rejects 32-bit
reads to that address. The mask is ANDed with the value before storing.
These are platform properties, not runtime policy -- width depends on
SoC integration, mask reflects which output bits carry entropy.
The alignment check in probe is updated to verify the resource is
aligned to the configured width instead of hardcoding 4-byte alignment.
Signed-off-by: Jad Keskes <inasj268@gmail.com>
---
drivers/char/hw_random/timeriomem-rng.c | 77 ++++++++++++++++++++-----
include/linux/timeriomem-rng.h | 12 ++++
2 files changed, 76 insertions(+), 13 deletions(-)
diff --git a/drivers/char/hw_random/timeriomem-rng.c b/drivers/char/hw_random/timeriomem-rng.c
index e61f06393209..42393409f22a 100644
--- a/drivers/char/hw_random/timeriomem-rng.c
+++ b/drivers/char/hw_random/timeriomem-rng.c
@@ -14,7 +14,9 @@
* has to do is provide the address and 'wait time' that new data becomes
* available.
*
- * TODO: add support for reading sizes other than 32bits and masking
+ * The read width (8, 16, or 32 bits) and an optional data mask can be
+ * configured through platform data or device tree properties. Default is
+ * 32-bit reads with no mask.
*/
#include <linux/completion.h>
@@ -34,6 +36,8 @@ struct timeriomem_rng_private {
void __iomem *io_base;
ktime_t period;
unsigned int present:1;
+ unsigned int reg_io_width;
+ u32 mask;
struct hrtimer timer;
struct completion completion;
@@ -48,6 +52,7 @@ static int timeriomem_rng_read(struct hwrng *hwrng, void *data,
container_of(hwrng, struct timeriomem_rng_private, rng_ops);
int retval = 0;
int period_us = ktime_to_us(priv->period);
+ int chunk = priv->reg_io_width;
/*
* There may not have been enough time for new data to be generated
@@ -71,11 +76,28 @@ static int timeriomem_rng_read(struct hwrng *hwrng, void *data,
usleep_range(period_us,
period_us + max(1, period_us / 100));
- *(u32 *)data = readl(priv->io_base);
- retval += sizeof(u32);
- data += sizeof(u32);
- max -= sizeof(u32);
- } while (wait && max > sizeof(u32));
+ switch (priv->reg_io_width) {
+ case 1: {
+ u8 val = readb(priv->io_base) & priv->mask;
+ *(u8 *)data = val;
+ break;
+ }
+ case 2: {
+ u16 val = readw(priv->io_base) & priv->mask;
+ *(u16 *)data = val;
+ break;
+ }
+ case 4: {
+ u32 val = readl(priv->io_base) & priv->mask;
+ *(u32 *)data = val;
+ break;
+ }
+ }
+
+ retval += chunk;
+ data += chunk;
+ max -= chunk;
+ } while (wait && max > chunk);
/*
* Block any new callers until the RNG has had time to generate new
@@ -125,11 +147,8 @@ static int timeriomem_rng_probe(struct platform_device *pdev)
if (IS_ERR(priv->io_base))
return PTR_ERR(priv->io_base);
- if (res->start % 4 != 0 || resource_size(res) < 4) {
- dev_err(&pdev->dev,
- "address must be at least four bytes wide and 32-bit aligned\n");
- return -EINVAL;
- }
+ priv->reg_io_width = 4;
+ priv->mask = 0xFFFFFFFF;
if (pdev->dev.of_node) {
int i;
@@ -145,9 +164,41 @@ static int timeriomem_rng_probe(struct platform_device *pdev)
if (!of_property_read_u32(pdev->dev.of_node,
"quality", &i))
priv->rng_ops.quality = i;
+
+ of_property_read_u32(pdev->dev.of_node,
+ "reg-io-width", &priv->reg_io_width);
+ of_property_read_u32(pdev->dev.of_node,
+ "mask", &priv->mask);
} else {
period = pdata->period;
priv->rng_ops.quality = pdata->quality;
+
+ if (pdata->reg_io_width_set)
+ priv->reg_io_width = pdata->reg_io_width;
+ if (pdata->mask_set)
+ priv->mask = pdata->mask;
+ }
+
+ if (priv->reg_io_width == 0)
+ priv->reg_io_width = 4;
+
+ switch (priv->reg_io_width) {
+ case 1:
+ case 2:
+ case 4:
+ break;
+ default:
+ dev_err(&pdev->dev, "invalid reg-io-width %u, must be 1, 2, or 4\n",
+ priv->reg_io_width);
+ return -EINVAL;
+ }
+
+ if (!IS_ALIGNED(res->start, priv->reg_io_width) ||
+ resource_size(res) < priv->reg_io_width) {
+ dev_err(&pdev->dev,
+ "address must be %u-byte aligned\n",
+ priv->reg_io_width);
+ return -EINVAL;
}
priv->period = us_to_ktime(period);
@@ -167,8 +218,8 @@ static int timeriomem_rng_probe(struct platform_device *pdev)
return err;
}
- dev_info(&pdev->dev, "32bits from 0x%p @ %dus\n",
- priv->io_base, period);
+ dev_info(&pdev->dev, "%u-byte from %p @ %dus\n",
+ priv->reg_io_width, priv->io_base, period);
return 0;
}
diff --git a/include/linux/timeriomem-rng.h b/include/linux/timeriomem-rng.h
index 672df7fbf6c1..5732489a17a1 100644
--- a/include/linux/timeriomem-rng.h
+++ b/include/linux/timeriomem-rng.h
@@ -16,6 +16,18 @@ struct timeriomem_rng_data {
/* bits of entropy per 1024 bits read */
unsigned int quality;
+
+ /* read width (1, 2, or 4 bytes), 0 means 4 */
+ unsigned int reg_io_width;
+
+ /* set to true if reg-io-width is explicitly provided */
+ bool reg_io_width_set;
+
+ /* mask applied to raw read value */
+ u32 mask;
+
+ /* set to true if mask is explicitly provided */
+ bool mask_set;
};
#endif /* _LINUX_TIMERIOMEM_RNG_H */
--
2.54.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH v4 1/2] dt-bindings: rng: timeriomem_rng: add reg-io-width and mask properties
2026-06-17 11:44 [PATCH v4 1/2] dt-bindings: rng: timeriomem_rng: add reg-io-width and mask properties Jad Keskes
2026-06-17 11:46 ` [PATCH v4 2/2] hw_random: timeriomem-rng: add configurable read width and data mask Jad Keskes
@ 2026-06-18 4:11 ` Krzysztof Kozlowski
2026-06-18 4:12 ` Krzysztof Kozlowski
2 siblings, 0 replies; 5+ messages in thread
From: Krzysztof Kozlowski @ 2026-06-18 4:11 UTC (permalink / raw)
To: Jad Keskes, Krzysztof Kozlowski
Cc: Olivia Mackall, Herbert Xu, Rob Herring, Conor Dooley,
Alexander Clouter, linux-crypto, devicetree, linux-kernel
On 17/06/2026 13:44, Jad Keskes wrote:
> Add optional reg-io-width (1, 2, or 4 bytes) and mask properties to the
> binding. reg-io-width selects the bus access size, mask is ANDed with
> the raw register value to allow only the entropy-bearing bits through.
>
> Update the example to show a typical 1-byte configuration.
> Update SPDX to dual license to match kernel convention.
And did you Cc all of the copyright holders?
> Drop the misleading '32-bit aligned' constraint from the reg
> description since alignment now depends on the configured width.
>
> Signed-off-by: Jad Keskes <inasj268@gmail.com>
> ---
> .../bindings/rng/timeriomem_rng.yaml | 48 +++++++++++++++----
> 1 file changed, 40 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml b/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml
> index 4754174e9849..740bc52bf474 100644
> --- a/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml
> +++ b/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml
> @@ -1,10 +1,16 @@
> -# SPDX-License-Identifier: GPL-2.0-only
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
Don't mix multiple changes into one commit.
> %YAML 1.2
> ---
> $id: http://devicetree.org/schemas/rng/timeriomem_rng.yaml#
> $schema: http://devicetree.org/meta-schemas/core.yaml#
>
> -title: TimerIO Random Number Generator
> +title: Timer IOMEM Hardware Random Number Generator
> +
> +description: |
> + This binding covers platforms that have a single IO memory address which
Do not describe the binding. Describe the hardware.
> + provides periodic random data. The driver reads from the address at a
Do not describe drivers. Describe the hardware.
> + fixed interval, returning a configurable-width value masked to the desired
> + bits.
>
> maintainers:
> - Krzysztof Kozlowski <krzk@kernel.org>
> @@ -13,9 +19,17 @@ properties:
> compatible:
> const: timeriomem_rng
>
> + reg:
> + maxItems: 1
> + description:
> + Base address to sample from. Must be aligned to the configured access
> + width (1, 2, or 4 bytes) and at least that wide.
> +
> period:
> $ref: /schemas/types.yaml#/definitions/uint32
> - description: wait time in microseconds to use between samples
> + description:
> + Interval in microseconds between reads. New random data is expected to
> + be available at this rate.
>
> quality:
> $ref: /schemas/types.yaml#/definitions/uint32
> @@ -26,16 +40,26 @@ properties:
> instead. Note that the default quality is usually zero which disables
> using this rng to automatically fill the kernel's entropy pool.
>
> - reg:
> - maxItems: 1
> + reg-io-width:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + default: 4
> + enum: [1, 2, 4]
> description:
> - Base address to sample from. Currently 'reg' must be at least four bytes
> - wide and 32-bit aligned.
> + Access width in bytes. Determines whether the read is performed as
> + an 8-bit, 16-bit, or 32-bit bus access.
> +
> + mask:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + default: 0xFFFFFFFF
> + description:
> + Mask applied to the value read from the register. Bits set to 0 in
> + the mask are cleared in the output data. Default (no mask) passes
> + all bits through.
>
> required:
> - compatible
> - - period
> - reg
> + - period
>
> additionalProperties: false
>
> @@ -46,3 +70,11 @@ examples:
> reg = <0x44 0x04>;
> period = <1000000>;
> };
> +
> + rng@64 {
> + compatible = "timeriomem_rng";
> + reg = <0x64 0x01>;
> + period = <50000>;
> + reg-io-width = <1>;
> + mask = <0xFF>;
> + };
Grow existing example. Or why can't it grow?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v4 1/2] dt-bindings: rng: timeriomem_rng: add reg-io-width and mask properties
2026-06-17 11:44 [PATCH v4 1/2] dt-bindings: rng: timeriomem_rng: add reg-io-width and mask properties Jad Keskes
2026-06-17 11:46 ` [PATCH v4 2/2] hw_random: timeriomem-rng: add configurable read width and data mask Jad Keskes
2026-06-18 4:11 ` [PATCH v4 1/2] dt-bindings: rng: timeriomem_rng: add reg-io-width and mask properties Krzysztof Kozlowski
@ 2026-06-18 4:12 ` Krzysztof Kozlowski
2 siblings, 0 replies; 5+ messages in thread
From: Krzysztof Kozlowski @ 2026-06-18 4:12 UTC (permalink / raw)
To: Jad Keskes, Krzysztof Kozlowski
Cc: Olivia Mackall, Herbert Xu, Rob Herring, Conor Dooley,
Alexander Clouter, linux-crypto, devicetree, linux-kernel
On 17/06/2026 13:44, Jad Keskes wrote:
> Add optional reg-io-width (1, 2, or 4 bytes) and mask properties to the
> binding. reg-io-width selects the bus access size, mask is ANDed with
> the raw register value to allow only the entropy-bearing bits through.
>
> Update the example to show a typical 1-byte configuration.
> Update SPDX to dual license to match kernel convention.
> Drop the misleading '32-bit aligned' constraint from the reg
> description since alignment now depends on the configured width.
>
> Signed-off-by: Jad Keskes <inasj268@gmail.com>
> ---
> .../bindings/rng/timeriomem_rng.yaml | 48 +++++++++++++++----
> 1 file changed, 40 insertions(+), 8 deletions(-)
... And where is any changelog?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 5+ messages in thread