[PATCH v2 0/2] Add TRNG support for Glymur SoC

[PATCH v2 0/2] Add TRNG support for Glymur SoC

[Harshal Dev]

Document and add the device-tree node to enable TRNG for Glymur SoC.

Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
---
Changes in v2:
- Padded the address part to 8 hex digits with leading zeroes.
- Collected Reviewed-by tags from Konrad and Krzysztof.
- Link to v1: https://lore.kernel.org/r/20260416-glymur_trng_enablement-v1-0-60abcfd45403@oss.qualcomm.com

---
Harshal Dev (2):
      dt-bindings: crypto: qcom,prng: Document Glymur TRNG
      arm64: dts: qcom: glymur: add TRNG node

 Documentation/devicetree/bindings/crypto/qcom,prng.yaml | 1 +
 arch/arm64/boot/dts/qcom/glymur.dtsi                    | 5 +++++
 2 files changed, 6 insertions(+)
---
base-commit: 936c21068d7ade00325e40d82bfd2f3f29d9f659
change-id: 20260416-glymur_trng_enablement-31518b69fbca

Best regards,
-- 
Harshal Dev <harshal.dev@oss.qualcomm.com>

[PATCH v2 1/2] dt-bindings: crypto: qcom,prng: Document Glymur TRNG

[Harshal Dev]

Document glymur compatible for the True Random Number Generator.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
---
 Documentation/devicetree/bindings/crypto/qcom,prng.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml
index 41402599e9ab..498d6914135e 100644
--- a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml
@@ -17,6 +17,7 @@ properties:
           - qcom,prng-ee  # 8996 and later using EE
       - items:
           - enum:
+              - qcom,glymur-trng
               - qcom,ipq5332-trng
               - qcom,ipq5424-trng
               - qcom,ipq9574-trng

-- 
2.34.1

[PATCH v2 2/2] arm64: dts: qcom: glymur: add TRNG node

[Harshal Dev]

Glymur has a True Random Number Generator, add the node with the correct
compatible set.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/glymur.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
index f23cf81ddb77..64bbd5691229 100644
--- a/arch/arm64/boot/dts/qcom/glymur.dtsi
+++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
@@ -3675,6 +3675,11 @@ pcie3b_phy: phy@f10000 {
 			status = "disabled";
 		};
 
+		rng: rng@10c3000 {
+			compatible = "qcom,glymur-trng", "qcom,trng";
+			reg = <0x0 0x010c3000 0x0 0x1000>;
+		};
+
 		tcsr_mutex: hwlock@1f40000 {
 			compatible = "qcom,tcsr-mutex";
 			reg = <0x0 0x01f40000 0x0 0x20000>;

-- 
2.34.1

Re: [PATCH v2 1/2] dt-bindings: crypto: qcom,prng: Document Glymur TRNG

[Herbert Xu]

On Fri, Apr 24, 2026 at 02:05:07PM +0530, Harshal Dev wrote:
> Document glymur compatible for the True Random Number Generator.
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
> ---
>  Documentation/devicetree/bindings/crypto/qcom,prng.yaml | 1 +
>  1 file changed, 1 insertion(+)

Patch applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Re: [PATCH v2 2/2] arm64: dts: qcom: glymur: add TRNG node

[Kuldeep Singh]

On 24-04-2026 14:05, Harshal Dev wrote:
> Glymur has a True Random Number Generator, add the node with the correct
> compatible set.
> 
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>

Tested-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>

root@qcom-armv8a:~# cat /sys/class/misc/hw_random/rng_current
qcom_hwrng
root@qcom-armv8a:~# cat /dev/random | rngtest -c 1000
rngtest 6.16
Copyright (c) 2004 by Henrique de Moraes Holschuh
This is free software; see the source for copying conditions.  There is
NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR
PURPOSE.

rngtest: starting FIPS tests...
rngtest: bits received from input: 20000032
rngtest: FIPS 140-2 successes: 1000
rngtest: FIPS 140-2 failures: 0
rngtest: FIPS 140-2(2001-10-10) Monobit: 0
rngtest: FIPS 140-2(2001-10-10) Poker: 0
rngtest: FIPS 140-2(2001-10-10) Runs: 0
rngtest: FIPS 140-2(2001-10-10) Long run: 0
rngtest: FIPS 140-2(2001-10-10) Continuous run: 0
rngtest: input channel speed: (min=1666666666.667; avg=54945054945.055;
max=0.000)bits/s
rngtest: FIPS tests speed: (min=186.995; avg=280.435; max=334.623)Mibits/s
rngtest: Program run time: 68912 microseconds
root@qcom-armv8a:~#

-- 
Regards
Kuldeep

Re: [PATCH v2 2/2] arm64: dts: qcom: glymur: add TRNG node

[Harshal Dev]

Hi Bjorn,

On 4/24/2026 2:05 PM, Harshal Dev wrote:
> Glymur has a True Random Number Generator, add the node with the correct
> compatible set.
> 
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/glymur.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> index f23cf81ddb77..64bbd5691229 100644
> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
> @@ -3675,6 +3675,11 @@ pcie3b_phy: phy@f10000 {
>  			status = "disabled";
>  		};
>  
> +		rng: rng@10c3000 {
> +			compatible = "qcom,glymur-trng", "qcom,trng";
> +			reg = <0x0 0x010c3000 0x0 0x1000>;
> +		};
> +
>  		tcsr_mutex: hwlock@1f40000 {
>  			compatible = "qcom,tcsr-mutex";
>  			reg = <0x0 0x01f40000 0x0 0x20000>;
> 

A gentle reminder to pick this patch for the 7.2 merge window.

Regards,
Harshal

Re: [PATCH v2 2/2] arm64: dts: qcom: glymur: add TRNG node

[Harshal Dev]

Hello Bjorn,

On 5/18/2026 2:06 PM, Harshal Dev wrote:
> Hi Bjorn,
> 
> On 4/24/2026 2:05 PM, Harshal Dev wrote:
>> Glymur has a True Random Number Generator, add the node with the correct
>> compatible set.
>>
>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
>> ---
>>  arch/arm64/boot/dts/qcom/glymur.dtsi | 5 +++++
>>  1 file changed, 5 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
>> index f23cf81ddb77..64bbd5691229 100644
>> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
>> @@ -3675,6 +3675,11 @@ pcie3b_phy: phy@f10000 {
>>  			status = "disabled";
>>  		};
>>  
>> +		rng: rng@10c3000 {
>> +			compatible = "qcom,glymur-trng", "qcom,trng";
>> +			reg = <0x0 0x010c3000 0x0 0x1000>;
>> +		};
>> +
>>  		tcsr_mutex: hwlock@1f40000 {
>>  			compatible = "qcom,tcsr-mutex";
>>  			reg = <0x0 0x01f40000 0x0 0x20000>;
>>
> 
> A gentle reminder to pick this patch for the 7.2 merge window.
> 

Another reminder to pick this patch up in-case you've missed it.

Thanks,
Harshal

> Regards,
> Harshal

Re: [PATCH v2 2/2] arm64: dts: qcom: glymur: add TRNG node

[Harshal Dev]

Hi Bjorn,

On 6/9/2026 12:06 PM, Harshal Dev wrote:
> Hello Bjorn,
> 
> On 5/18/2026 2:06 PM, Harshal Dev wrote:
>> Hi Bjorn,
>>
>> On 4/24/2026 2:05 PM, Harshal Dev wrote:
>>> Glymur has a True Random Number Generator, add the node with the correct
>>> compatible set.
>>>
>>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
>>> ---
>>>  arch/arm64/boot/dts/qcom/glymur.dtsi | 5 +++++
>>>  1 file changed, 5 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
>>> index f23cf81ddb77..64bbd5691229 100644
>>> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
>>> @@ -3675,6 +3675,11 @@ pcie3b_phy: phy@f10000 {
>>>  			status = "disabled";
>>>  		};
>>>  
>>> +		rng: rng@10c3000 {
>>> +			compatible = "qcom,glymur-trng", "qcom,trng";
>>> +			reg = <0x0 0x010c3000 0x0 0x1000>;
>>> +		};
>>> +
>>>  		tcsr_mutex: hwlock@1f40000 {
>>>  			compatible = "qcom,tcsr-mutex";
>>>  			reg = <0x0 0x01f40000 0x0 0x20000>;
>>>
>>
>> A gentle reminder to pick this patch for the 7.2 merge window.
>>
> 
> Another reminder to pick this patch up in-case you've missed it.
> 

Gentle reminder.

Thanks,
Harshal

> Thanks,
> Harshal
> 
>> Regards,
>> Harshal
> 

Re: [PATCH v2 2/2] arm64: dts: qcom: glymur: add TRNG node

[Konrad Dybcio]

On 6/18/26 1:58 PM, Harshal Dev wrote:
> Hi Bjorn,
> 
> On 6/9/2026 12:06 PM, Harshal Dev wrote:
>> Hello Bjorn,
>>
>> On 5/18/2026 2:06 PM, Harshal Dev wrote:
>>> Hi Bjorn,
>>>
>>> On 4/24/2026 2:05 PM, Harshal Dev wrote:
>>>> Glymur has a True Random Number Generator, add the node with the correct
>>>> compatible set.
>>>>
>>>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>>> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
>>>> ---
>>>>  arch/arm64/boot/dts/qcom/glymur.dtsi | 5 +++++
>>>>  1 file changed, 5 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
>>>> index f23cf81ddb77..64bbd5691229 100644
>>>> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
>>>> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
>>>> @@ -3675,6 +3675,11 @@ pcie3b_phy: phy@f10000 {
>>>>  			status = "disabled";
>>>>  		};
>>>>  
>>>> +		rng: rng@10c3000 {
>>>> +			compatible = "qcom,glymur-trng", "qcom,trng";
>>>> +			reg = <0x0 0x010c3000 0x0 0x1000>;
>>>> +		};
>>>> +
>>>>  		tcsr_mutex: hwlock@1f40000 {
>>>>  			compatible = "qcom,tcsr-mutex";
>>>>  			reg = <0x0 0x01f40000 0x0 0x20000>;
>>>>
>>>
>>> A gentle reminder to pick this patch for the 7.2 merge window.
>>>
>>
>> Another reminder to pick this patch up in-case you've missed it.
>>
> 
> Gentle reminder.

Bjorn and I were both out at the time, after we returned it was too
late to accept new patches.

Currently we're halfway through the merge window (where Torvalds
receives pull requests to create 7.2-rc1 out of), during which
contributions are not accepted. They will resume in ~1.5wk after
7.2-rc1 is tagged, targetting 7.3

Konrad

Re: [PATCH v2 2/2] arm64: dts: qcom: glymur: add TRNG node

[Harshal Dev]

Hi Konrad, Bjorn

On 6/18/2026 5:50 PM, Konrad Dybcio wrote:
> On 6/18/26 1:58 PM, Harshal Dev wrote:
>> Hi Bjorn,
>>
>> On 6/9/2026 12:06 PM, Harshal Dev wrote:
>>> Hello Bjorn,
>>>
>>> On 5/18/2026 2:06 PM, Harshal Dev wrote:
>>>> Hi Bjorn,
>>>>
>>>> On 4/24/2026 2:05 PM, Harshal Dev wrote:
>>>>> Glymur has a True Random Number Generator, add the node with the correct
>>>>> compatible set.
>>>>>
>>>>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>>>> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
>>>>> ---
>>>>>  arch/arm64/boot/dts/qcom/glymur.dtsi | 5 +++++
>>>>>  1 file changed, 5 insertions(+)
>>>>>
>>>>> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
>>>>> index f23cf81ddb77..64bbd5691229 100644
>>>>> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
>>>>> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
>>>>> @@ -3675,6 +3675,11 @@ pcie3b_phy: phy@f10000 {
>>>>>  			status = "disabled";
>>>>>  		};
>>>>>  
>>>>> +		rng: rng@10c3000 {
>>>>> +			compatible = "qcom,glymur-trng", "qcom,trng";
>>>>> +			reg = <0x0 0x010c3000 0x0 0x1000>;
>>>>> +		};
>>>>> +
>>>>>  		tcsr_mutex: hwlock@1f40000 {
>>>>>  			compatible = "qcom,tcsr-mutex";
>>>>>  			reg = <0x0 0x01f40000 0x0 0x20000>;
>>>>>
>>>>
>>>> A gentle reminder to pick this patch for the 7.2 merge window.
>>>>
>>>
>>> Another reminder to pick this patch up in-case you've missed it.
>>>
>>
>> Gentle reminder.
> 
> Bjorn and I were both out at the time, after we returned it was too
> late to accept new patches.
> 
> Currently we're halfway through the merge window (where Torvalds
> receives pull requests to create 7.2-rc1 out of), during which
> contributions are not accepted. They will resume in ~1.5wk after
> 7.2-rc1 is tagged, targetting 7.3
>

I believe we can pick this up for 7.3 merge window now.
A gentle reminder to pick this up.

Thanks a lot!
Harshal 
> Konrad