* [PATCH 1/5] crypto: ccp: Move direct access to some PSP registers out of TEE
2023-09-07 18:48 [PATCH 0/5] Add new platform support for DBC Mario Limonciello
@ 2023-09-07 18:48 ` Mario Limonciello
2023-09-14 7:18 ` Rijo Thomas
2023-09-07 18:48 ` [PATCH 2/5] crypto: ccp: Add support for extended PSP mailbox commands Mario Limonciello
` (5 subsequent siblings)
6 siblings, 1 reply; 10+ messages in thread
From: Mario Limonciello @ 2023-09-07 18:48 UTC (permalink / raw)
To: herbert, davem
Cc: thomas.lendacky, john.allen, linux-crypto, linux-kernel,
Rijo-john.Thomas, Mario Limonciello
From: Tom Lendacky <thomas.lendacky@amd.com>
With the PSP mailbox registers supporting more than just TEE, access to
them must be maintained and serialized by the PSP device support. Remove
TEE support direct access and create an interface in the PSP support
where the register access can be controlled/serialized.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
drivers/crypto/ccp/psp-dev.c | 60 ++++++++++++++++++++++++++++++++++++
drivers/crypto/ccp/psp-dev.h | 18 +++++++++++
drivers/crypto/ccp/sp-dev.h | 3 ++
drivers/crypto/ccp/sp-pci.c | 18 +++++++----
drivers/crypto/ccp/tee-dev.c | 48 ++++++-----------------------
drivers/crypto/ccp/tee-dev.h | 15 ++-------
6 files changed, 104 insertions(+), 58 deletions(-)
diff --git a/drivers/crypto/ccp/psp-dev.c b/drivers/crypto/ccp/psp-dev.c
index d42d7bc62352..3258c4612e14 100644
--- a/drivers/crypto/ccp/psp-dev.c
+++ b/drivers/crypto/ccp/psp-dev.c
@@ -9,6 +9,9 @@
#include <linux/kernel.h>
#include <linux/irqreturn.h>
+#include <linux/mutex.h>
+#include <linux/bitfield.h>
+#include <linux/delay.h>
#include "sp-dev.h"
#include "psp-dev.h"
@@ -19,6 +22,62 @@
struct psp_device *psp_master;
+#define PSP_C2PMSG_17_CMDRESP_CMD GENMASK(19, 16)
+
+static int psp_mailbox_poll(const void __iomem *cmdresp_reg, unsigned int *cmdresp,
+ unsigned int timeout_msecs)
+{
+ while (true) {
+ *cmdresp = ioread32(cmdresp_reg);
+ if (FIELD_GET(PSP_CMDRESP_RESP, *cmdresp))
+ return 0;
+
+ if (!timeout_msecs--)
+ break;
+
+ usleep_range(1000, 1100);
+ }
+
+ return -ETIMEDOUT;
+}
+
+int psp_mailbox_command(struct psp_device *psp, enum psp_cmd cmd, void *cmdbuff,
+ unsigned int timeout_msecs, unsigned int *cmdresp)
+{
+ void __iomem *cmdresp_reg, *cmdbuff_lo_reg, *cmdbuff_hi_reg;
+ int ret;
+
+ if (!psp || !psp->vdata || !psp->vdata->cmdresp_reg ||
+ !psp->vdata->cmdbuff_addr_lo_reg || !psp->vdata->cmdbuff_addr_hi_reg)
+ return -ENODEV;
+
+ cmdresp_reg = psp->io_regs + psp->vdata->cmdresp_reg;
+ cmdbuff_lo_reg = psp->io_regs + psp->vdata->cmdbuff_addr_lo_reg;
+ cmdbuff_hi_reg = psp->io_regs + psp->vdata->cmdbuff_addr_hi_reg;
+
+ mutex_lock(&psp->mailbox_mutex);
+
+ /* Ensure mailbox is ready for a command */
+ ret = -EBUSY;
+ if (psp_mailbox_poll(cmdresp_reg, cmdresp, 0))
+ goto unlock;
+
+ if (cmdbuff) {
+ iowrite32(lower_32_bits(__psp_pa(cmdbuff)), cmdbuff_lo_reg);
+ iowrite32(upper_32_bits(__psp_pa(cmdbuff)), cmdbuff_hi_reg);
+ }
+
+ *cmdresp = FIELD_PREP(PSP_C2PMSG_17_CMDRESP_CMD, cmd);
+ iowrite32(*cmdresp, cmdresp_reg);
+
+ ret = psp_mailbox_poll(cmdresp_reg, cmdresp, timeout_msecs);
+
+unlock:
+ mutex_unlock(&psp->mailbox_mutex);
+
+ return ret;
+}
+
static struct psp_device *psp_alloc_struct(struct sp_device *sp)
{
struct device *dev = sp->dev;
@@ -164,6 +223,7 @@ int psp_dev_init(struct sp_device *sp)
}
psp->io_regs = sp->io_map;
+ mutex_init(&psp->mailbox_mutex);
ret = psp_get_capability(psp);
if (ret)
diff --git a/drivers/crypto/ccp/psp-dev.h b/drivers/crypto/ccp/psp-dev.h
index 8a4de69399c5..d917657c6085 100644
--- a/drivers/crypto/ccp/psp-dev.h
+++ b/drivers/crypto/ccp/psp-dev.h
@@ -14,6 +14,8 @@
#include <linux/list.h>
#include <linux/bits.h>
#include <linux/interrupt.h>
+#include <linux/mutex.h>
+#include <linux/psp.h>
#include "sp-dev.h"
@@ -33,6 +35,7 @@ struct psp_device {
struct sp_device *sp;
void __iomem *io_regs;
+ struct mutex mailbox_mutex;
psp_irq_handler_t sev_irq_handler;
void *sev_irq_data;
@@ -71,4 +74,19 @@ struct psp_device *psp_get_master_device(void);
#define PSP_SECURITY_HSP_TPM_AVAILABLE BIT(10)
#define PSP_SECURITY_ROM_ARMOR_ENFORCED BIT(11)
+/**
+ * enum psp_cmd - PSP mailbox commands
+ * @PSP_CMD_TEE_RING_INIT: Initialize TEE ring buffer
+ * @PSP_CMD_TEE_RING_DESTROY: Destroy TEE ring buffer
+ * @PSP_CMD_MAX: Maximum command id
+ */
+enum psp_cmd {
+ PSP_CMD_TEE_RING_INIT = 1,
+ PSP_CMD_TEE_RING_DESTROY = 2,
+ PSP_CMD_MAX = 15,
+};
+
+int psp_mailbox_command(struct psp_device *psp, enum psp_cmd cmd, void *cmdbuff,
+ unsigned int timeout_msecs, unsigned int *cmdresp);
+
#endif /* __PSP_DEV_H */
diff --git a/drivers/crypto/ccp/sp-dev.h b/drivers/crypto/ccp/sp-dev.h
index 2329ad524b49..c4e125efe6c7 100644
--- a/drivers/crypto/ccp/sp-dev.h
+++ b/drivers/crypto/ccp/sp-dev.h
@@ -71,6 +71,9 @@ struct psp_vdata {
const struct sev_vdata *sev;
const struct tee_vdata *tee;
const struct platform_access_vdata *platform_access;
+ const unsigned int cmdresp_reg;
+ const unsigned int cmdbuff_addr_lo_reg;
+ const unsigned int cmdbuff_addr_hi_reg;
const unsigned int feature_reg;
const unsigned int inten_reg;
const unsigned int intsts_reg;
diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c
index b6ab56abeb68..d1aedc5c1a68 100644
--- a/drivers/crypto/ccp/sp-pci.c
+++ b/drivers/crypto/ccp/sp-pci.c
@@ -418,18 +418,12 @@ static const struct sev_vdata sevv2 = {
};
static const struct tee_vdata teev1 = {
- .cmdresp_reg = 0x10544, /* C2PMSG_17 */
- .cmdbuff_addr_lo_reg = 0x10548, /* C2PMSG_18 */
- .cmdbuff_addr_hi_reg = 0x1054c, /* C2PMSG_19 */
.ring_wptr_reg = 0x10550, /* C2PMSG_20 */
.ring_rptr_reg = 0x10554, /* C2PMSG_21 */
.info_reg = 0x109e8, /* C2PMSG_58 */
};
static const struct tee_vdata teev2 = {
- .cmdresp_reg = 0x10944, /* C2PMSG_17 */
- .cmdbuff_addr_lo_reg = 0x10948, /* C2PMSG_18 */
- .cmdbuff_addr_hi_reg = 0x1094c, /* C2PMSG_19 */
.ring_wptr_reg = 0x10950, /* C2PMSG_20 */
.ring_rptr_reg = 0x10954, /* C2PMSG_21 */
};
@@ -466,6 +460,9 @@ static const struct psp_vdata pspv2 = {
static const struct psp_vdata pspv3 = {
.tee = &teev1,
.platform_access = &pa_v1,
+ .cmdresp_reg = 0x10544, /* C2PMSG_17 */
+ .cmdbuff_addr_lo_reg = 0x10548, /* C2PMSG_18 */
+ .cmdbuff_addr_hi_reg = 0x1054c, /* C2PMSG_19 */
.bootloader_info_reg = 0x109ec, /* C2PMSG_59 */
.feature_reg = 0x109fc, /* C2PMSG_63 */
.inten_reg = 0x10690, /* P2CMSG_INTEN */
@@ -476,6 +473,9 @@ static const struct psp_vdata pspv3 = {
static const struct psp_vdata pspv4 = {
.sev = &sevv2,
.tee = &teev1,
+ .cmdresp_reg = 0x10544, /* C2PMSG_17 */
+ .cmdbuff_addr_lo_reg = 0x10548, /* C2PMSG_18 */
+ .cmdbuff_addr_hi_reg = 0x1054c, /* C2PMSG_19 */
.bootloader_info_reg = 0x109ec, /* C2PMSG_59 */
.feature_reg = 0x109fc, /* C2PMSG_63 */
.inten_reg = 0x10690, /* P2CMSG_INTEN */
@@ -485,6 +485,9 @@ static const struct psp_vdata pspv4 = {
static const struct psp_vdata pspv5 = {
.tee = &teev2,
.platform_access = &pa_v2,
+ .cmdresp_reg = 0x10944, /* C2PMSG_17 */
+ .cmdbuff_addr_lo_reg = 0x10948, /* C2PMSG_18 */
+ .cmdbuff_addr_hi_reg = 0x1094c, /* C2PMSG_19 */
.feature_reg = 0x109fc, /* C2PMSG_63 */
.inten_reg = 0x10510, /* P2CMSG_INTEN */
.intsts_reg = 0x10514, /* P2CMSG_INTSTS */
@@ -493,6 +496,9 @@ static const struct psp_vdata pspv5 = {
static const struct psp_vdata pspv6 = {
.sev = &sevv2,
.tee = &teev2,
+ .cmdresp_reg = 0x10944, /* C2PMSG_17 */
+ .cmdbuff_addr_lo_reg = 0x10948, /* C2PMSG_18 */
+ .cmdbuff_addr_hi_reg = 0x1094c, /* C2PMSG_19 */
.feature_reg = 0x109fc, /* C2PMSG_63 */
.inten_reg = 0x10510, /* P2CMSG_INTEN */
.intsts_reg = 0x10514, /* P2CMSG_INTSTS */
diff --git a/drivers/crypto/ccp/tee-dev.c b/drivers/crypto/ccp/tee-dev.c
index 5560bf8329a1..5e1d80724678 100644
--- a/drivers/crypto/ccp/tee-dev.c
+++ b/drivers/crypto/ccp/tee-dev.c
@@ -62,26 +62,6 @@ static void tee_free_ring(struct psp_tee_device *tee)
mutex_destroy(&rb_mgr->mutex);
}
-static int tee_wait_cmd_poll(struct psp_tee_device *tee, unsigned int timeout,
- unsigned int *reg)
-{
- /* ~10ms sleep per loop => nloop = timeout * 100 */
- int nloop = timeout * 100;
-
- while (--nloop) {
- *reg = ioread32(tee->io_regs + tee->vdata->cmdresp_reg);
- if (FIELD_GET(PSP_CMDRESP_RESP, *reg))
- return 0;
-
- usleep_range(10000, 10100);
- }
-
- dev_err(tee->dev, "tee: command timed out, disabling PSP\n");
- psp_dead = true;
-
- return -ETIMEDOUT;
-}
-
static
struct tee_init_ring_cmd *tee_alloc_cmd_buffer(struct psp_tee_device *tee)
{
@@ -110,7 +90,6 @@ static int tee_init_ring(struct psp_tee_device *tee)
{
int ring_size = MAX_RING_BUFFER_ENTRIES * sizeof(struct tee_ring_cmd);
struct tee_init_ring_cmd *cmd;
- phys_addr_t cmd_buffer;
unsigned int reg;
int ret;
@@ -130,23 +109,15 @@ static int tee_init_ring(struct psp_tee_device *tee)
return -ENOMEM;
}
- cmd_buffer = __psp_pa((void *)cmd);
-
/* Send command buffer details to Trusted OS by writing to
* CPU-PSP message registers
*/
-
- iowrite32(lower_32_bits(cmd_buffer),
- tee->io_regs + tee->vdata->cmdbuff_addr_lo_reg);
- iowrite32(upper_32_bits(cmd_buffer),
- tee->io_regs + tee->vdata->cmdbuff_addr_hi_reg);
- iowrite32(TEE_RING_INIT_CMD,
- tee->io_regs + tee->vdata->cmdresp_reg);
-
- ret = tee_wait_cmd_poll(tee, TEE_DEFAULT_TIMEOUT, ®);
+ ret = psp_mailbox_command(tee->psp, PSP_CMD_TEE_RING_INIT, cmd,
+ TEE_DEFAULT_CMD_TIMEOUT, ®);
if (ret) {
- dev_err(tee->dev, "tee: ring init command timed out\n");
+ dev_err(tee->dev, "tee: ring init command timed out, disabling TEE support\n");
tee_free_ring(tee);
+ psp_dead = true;
goto free_buf;
}
@@ -174,12 +145,11 @@ static void tee_destroy_ring(struct psp_tee_device *tee)
if (psp_dead)
goto free_ring;
- iowrite32(TEE_RING_DESTROY_CMD,
- tee->io_regs + tee->vdata->cmdresp_reg);
-
- ret = tee_wait_cmd_poll(tee, TEE_DEFAULT_TIMEOUT, ®);
+ ret = psp_mailbox_command(tee->psp, PSP_CMD_TEE_RING_DESTROY, NULL,
+ TEE_DEFAULT_CMD_TIMEOUT, ®);
if (ret) {
- dev_err(tee->dev, "tee: ring destroy command timed out\n");
+ dev_err(tee->dev, "tee: ring destroy command timed out, disabling TEE support\n");
+ psp_dead = true;
} else if (FIELD_GET(PSP_CMDRESP_STS, reg)) {
dev_err(tee->dev, "tee: ring destroy command failed (%#010lx)\n",
FIELD_GET(PSP_CMDRESP_STS, reg));
@@ -370,7 +340,7 @@ int psp_tee_process_cmd(enum tee_cmd_id cmd_id, void *buf, size_t len,
if (ret)
return ret;
- ret = tee_wait_cmd_completion(tee, resp, TEE_DEFAULT_TIMEOUT);
+ ret = tee_wait_cmd_completion(tee, resp, TEE_DEFAULT_RING_TIMEOUT);
if (ret) {
resp->flag = CMD_RESPONSE_TIMEDOUT;
return ret;
diff --git a/drivers/crypto/ccp/tee-dev.h b/drivers/crypto/ccp/tee-dev.h
index 49d26158b71e..ea9a2b7c05f5 100644
--- a/drivers/crypto/ccp/tee-dev.h
+++ b/drivers/crypto/ccp/tee-dev.h
@@ -17,21 +17,10 @@
#include <linux/device.h>
#include <linux/mutex.h>
-#define TEE_DEFAULT_TIMEOUT 10
+#define TEE_DEFAULT_CMD_TIMEOUT (10 * MSEC_PER_SEC)
+#define TEE_DEFAULT_RING_TIMEOUT 10
#define MAX_BUFFER_SIZE 988
-/**
- * enum tee_ring_cmd_id - TEE interface commands for ring buffer configuration
- * @TEE_RING_INIT_CMD: Initialize ring buffer
- * @TEE_RING_DESTROY_CMD: Destroy ring buffer
- * @TEE_RING_MAX_CMD: Maximum command id
- */
-enum tee_ring_cmd_id {
- TEE_RING_INIT_CMD = 0x00010000,
- TEE_RING_DESTROY_CMD = 0x00020000,
- TEE_RING_MAX_CMD = 0x000F0000,
-};
-
/**
* struct tee_init_ring_cmd - Command to init TEE ring buffer
* @low_addr: bits [31:0] of the physical address of ring buffer
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH 1/5] crypto: ccp: Move direct access to some PSP registers out of TEE
2023-09-07 18:48 ` [PATCH 1/5] crypto: ccp: Move direct access to some PSP registers out of TEE Mario Limonciello
@ 2023-09-14 7:18 ` Rijo Thomas
0 siblings, 0 replies; 10+ messages in thread
From: Rijo Thomas @ 2023-09-14 7:18 UTC (permalink / raw)
To: Mario Limonciello, herbert, davem
Cc: thomas.lendacky, john.allen, linux-crypto, linux-kernel
On 9/8/2023 12:18 AM, Mario Limonciello wrote:
> From: Tom Lendacky <thomas.lendacky@amd.com>
>
> With the PSP mailbox registers supporting more than just TEE, access to
> them must be maintained and serialized by the PSP device support. Remove
> TEE support direct access and create an interface in the PSP support
> where the register access can be controlled/serialized.
>
Reviewed-by: Rijo Thomas <Rijo-john.Thomas@amd.com>
Tested-by: Rijo Thomas <Rijo-john.Thomas@amd.com>
> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
> drivers/crypto/ccp/psp-dev.c | 60 ++++++++++++++++++++++++++++++++++++
> drivers/crypto/ccp/psp-dev.h | 18 +++++++++++
> drivers/crypto/ccp/sp-dev.h | 3 ++
> drivers/crypto/ccp/sp-pci.c | 18 +++++++----
> drivers/crypto/ccp/tee-dev.c | 48 ++++++-----------------------
> drivers/crypto/ccp/tee-dev.h | 15 ++-------
> 6 files changed, 104 insertions(+), 58 deletions(-)
>
> diff --git a/drivers/crypto/ccp/psp-dev.c b/drivers/crypto/ccp/psp-dev.c
> index d42d7bc62352..3258c4612e14 100644
> --- a/drivers/crypto/ccp/psp-dev.c
> +++ b/drivers/crypto/ccp/psp-dev.c
> @@ -9,6 +9,9 @@
>
> #include <linux/kernel.h>
> #include <linux/irqreturn.h>
> +#include <linux/mutex.h>
> +#include <linux/bitfield.h>
> +#include <linux/delay.h>
>
> #include "sp-dev.h"
> #include "psp-dev.h"
> @@ -19,6 +22,62 @@
>
> struct psp_device *psp_master;
>
> +#define PSP_C2PMSG_17_CMDRESP_CMD GENMASK(19, 16)
> +
> +static int psp_mailbox_poll(const void __iomem *cmdresp_reg, unsigned int *cmdresp,
> + unsigned int timeout_msecs)
> +{
> + while (true) {
> + *cmdresp = ioread32(cmdresp_reg);
> + if (FIELD_GET(PSP_CMDRESP_RESP, *cmdresp))
> + return 0;
> +
> + if (!timeout_msecs--)
> + break;
> +
> + usleep_range(1000, 1100);
> + }
> +
> + return -ETIMEDOUT;
> +}
> +
> +int psp_mailbox_command(struct psp_device *psp, enum psp_cmd cmd, void *cmdbuff,
> + unsigned int timeout_msecs, unsigned int *cmdresp)
> +{
> + void __iomem *cmdresp_reg, *cmdbuff_lo_reg, *cmdbuff_hi_reg;
> + int ret;
> +
> + if (!psp || !psp->vdata || !psp->vdata->cmdresp_reg ||
> + !psp->vdata->cmdbuff_addr_lo_reg || !psp->vdata->cmdbuff_addr_hi_reg)
> + return -ENODEV;
> +
> + cmdresp_reg = psp->io_regs + psp->vdata->cmdresp_reg;
> + cmdbuff_lo_reg = psp->io_regs + psp->vdata->cmdbuff_addr_lo_reg;
> + cmdbuff_hi_reg = psp->io_regs + psp->vdata->cmdbuff_addr_hi_reg;
> +
> + mutex_lock(&psp->mailbox_mutex);
> +
> + /* Ensure mailbox is ready for a command */
> + ret = -EBUSY;
> + if (psp_mailbox_poll(cmdresp_reg, cmdresp, 0))
> + goto unlock;
> +
> + if (cmdbuff) {
> + iowrite32(lower_32_bits(__psp_pa(cmdbuff)), cmdbuff_lo_reg);
> + iowrite32(upper_32_bits(__psp_pa(cmdbuff)), cmdbuff_hi_reg);
> + }
> +
> + *cmdresp = FIELD_PREP(PSP_C2PMSG_17_CMDRESP_CMD, cmd);
> + iowrite32(*cmdresp, cmdresp_reg);
> +
> + ret = psp_mailbox_poll(cmdresp_reg, cmdresp, timeout_msecs);
> +
> +unlock:
> + mutex_unlock(&psp->mailbox_mutex);
> +
> + return ret;
> +}
> +
> static struct psp_device *psp_alloc_struct(struct sp_device *sp)
> {
> struct device *dev = sp->dev;
> @@ -164,6 +223,7 @@ int psp_dev_init(struct sp_device *sp)
> }
>
> psp->io_regs = sp->io_map;
> + mutex_init(&psp->mailbox_mutex);
>
> ret = psp_get_capability(psp);
> if (ret)
> diff --git a/drivers/crypto/ccp/psp-dev.h b/drivers/crypto/ccp/psp-dev.h
> index 8a4de69399c5..d917657c6085 100644
> --- a/drivers/crypto/ccp/psp-dev.h
> +++ b/drivers/crypto/ccp/psp-dev.h
> @@ -14,6 +14,8 @@
> #include <linux/list.h>
> #include <linux/bits.h>
> #include <linux/interrupt.h>
> +#include <linux/mutex.h>
> +#include <linux/psp.h>
>
> #include "sp-dev.h"
>
> @@ -33,6 +35,7 @@ struct psp_device {
> struct sp_device *sp;
>
> void __iomem *io_regs;
> + struct mutex mailbox_mutex;
>
> psp_irq_handler_t sev_irq_handler;
> void *sev_irq_data;
> @@ -71,4 +74,19 @@ struct psp_device *psp_get_master_device(void);
> #define PSP_SECURITY_HSP_TPM_AVAILABLE BIT(10)
> #define PSP_SECURITY_ROM_ARMOR_ENFORCED BIT(11)
>
> +/**
> + * enum psp_cmd - PSP mailbox commands
> + * @PSP_CMD_TEE_RING_INIT: Initialize TEE ring buffer
> + * @PSP_CMD_TEE_RING_DESTROY: Destroy TEE ring buffer
> + * @PSP_CMD_MAX: Maximum command id
> + */
> +enum psp_cmd {
> + PSP_CMD_TEE_RING_INIT = 1,
> + PSP_CMD_TEE_RING_DESTROY = 2,
> + PSP_CMD_MAX = 15,
> +};
> +
> +int psp_mailbox_command(struct psp_device *psp, enum psp_cmd cmd, void *cmdbuff,
> + unsigned int timeout_msecs, unsigned int *cmdresp);
> +
> #endif /* __PSP_DEV_H */
> diff --git a/drivers/crypto/ccp/sp-dev.h b/drivers/crypto/ccp/sp-dev.h
> index 2329ad524b49..c4e125efe6c7 100644
> --- a/drivers/crypto/ccp/sp-dev.h
> +++ b/drivers/crypto/ccp/sp-dev.h
> @@ -71,6 +71,9 @@ struct psp_vdata {
> const struct sev_vdata *sev;
> const struct tee_vdata *tee;
> const struct platform_access_vdata *platform_access;
> + const unsigned int cmdresp_reg;
> + const unsigned int cmdbuff_addr_lo_reg;
> + const unsigned int cmdbuff_addr_hi_reg;
> const unsigned int feature_reg;
> const unsigned int inten_reg;
> const unsigned int intsts_reg;
> diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c
> index b6ab56abeb68..d1aedc5c1a68 100644
> --- a/drivers/crypto/ccp/sp-pci.c
> +++ b/drivers/crypto/ccp/sp-pci.c
> @@ -418,18 +418,12 @@ static const struct sev_vdata sevv2 = {
> };
>
> static const struct tee_vdata teev1 = {
> - .cmdresp_reg = 0x10544, /* C2PMSG_17 */
> - .cmdbuff_addr_lo_reg = 0x10548, /* C2PMSG_18 */
> - .cmdbuff_addr_hi_reg = 0x1054c, /* C2PMSG_19 */
> .ring_wptr_reg = 0x10550, /* C2PMSG_20 */
> .ring_rptr_reg = 0x10554, /* C2PMSG_21 */
> .info_reg = 0x109e8, /* C2PMSG_58 */
> };
>
> static const struct tee_vdata teev2 = {
> - .cmdresp_reg = 0x10944, /* C2PMSG_17 */
> - .cmdbuff_addr_lo_reg = 0x10948, /* C2PMSG_18 */
> - .cmdbuff_addr_hi_reg = 0x1094c, /* C2PMSG_19 */
> .ring_wptr_reg = 0x10950, /* C2PMSG_20 */
> .ring_rptr_reg = 0x10954, /* C2PMSG_21 */
> };
> @@ -466,6 +460,9 @@ static const struct psp_vdata pspv2 = {
> static const struct psp_vdata pspv3 = {
> .tee = &teev1,
> .platform_access = &pa_v1,
> + .cmdresp_reg = 0x10544, /* C2PMSG_17 */
> + .cmdbuff_addr_lo_reg = 0x10548, /* C2PMSG_18 */
> + .cmdbuff_addr_hi_reg = 0x1054c, /* C2PMSG_19 */
> .bootloader_info_reg = 0x109ec, /* C2PMSG_59 */
> .feature_reg = 0x109fc, /* C2PMSG_63 */
> .inten_reg = 0x10690, /* P2CMSG_INTEN */
> @@ -476,6 +473,9 @@ static const struct psp_vdata pspv3 = {
> static const struct psp_vdata pspv4 = {
> .sev = &sevv2,
> .tee = &teev1,
> + .cmdresp_reg = 0x10544, /* C2PMSG_17 */
> + .cmdbuff_addr_lo_reg = 0x10548, /* C2PMSG_18 */
> + .cmdbuff_addr_hi_reg = 0x1054c, /* C2PMSG_19 */
> .bootloader_info_reg = 0x109ec, /* C2PMSG_59 */
> .feature_reg = 0x109fc, /* C2PMSG_63 */
> .inten_reg = 0x10690, /* P2CMSG_INTEN */
> @@ -485,6 +485,9 @@ static const struct psp_vdata pspv4 = {
> static const struct psp_vdata pspv5 = {
> .tee = &teev2,
> .platform_access = &pa_v2,
> + .cmdresp_reg = 0x10944, /* C2PMSG_17 */
> + .cmdbuff_addr_lo_reg = 0x10948, /* C2PMSG_18 */
> + .cmdbuff_addr_hi_reg = 0x1094c, /* C2PMSG_19 */
> .feature_reg = 0x109fc, /* C2PMSG_63 */
> .inten_reg = 0x10510, /* P2CMSG_INTEN */
> .intsts_reg = 0x10514, /* P2CMSG_INTSTS */
> @@ -493,6 +496,9 @@ static const struct psp_vdata pspv5 = {
> static const struct psp_vdata pspv6 = {
> .sev = &sevv2,
> .tee = &teev2,
> + .cmdresp_reg = 0x10944, /* C2PMSG_17 */
> + .cmdbuff_addr_lo_reg = 0x10948, /* C2PMSG_18 */
> + .cmdbuff_addr_hi_reg = 0x1094c, /* C2PMSG_19 */
> .feature_reg = 0x109fc, /* C2PMSG_63 */
> .inten_reg = 0x10510, /* P2CMSG_INTEN */
> .intsts_reg = 0x10514, /* P2CMSG_INTSTS */
> diff --git a/drivers/crypto/ccp/tee-dev.c b/drivers/crypto/ccp/tee-dev.c
> index 5560bf8329a1..5e1d80724678 100644
> --- a/drivers/crypto/ccp/tee-dev.c
> +++ b/drivers/crypto/ccp/tee-dev.c
> @@ -62,26 +62,6 @@ static void tee_free_ring(struct psp_tee_device *tee)
> mutex_destroy(&rb_mgr->mutex);
> }
>
> -static int tee_wait_cmd_poll(struct psp_tee_device *tee, unsigned int timeout,
> - unsigned int *reg)
> -{
> - /* ~10ms sleep per loop => nloop = timeout * 100 */
> - int nloop = timeout * 100;
> -
> - while (--nloop) {
> - *reg = ioread32(tee->io_regs + tee->vdata->cmdresp_reg);
> - if (FIELD_GET(PSP_CMDRESP_RESP, *reg))
> - return 0;
> -
> - usleep_range(10000, 10100);
> - }
> -
> - dev_err(tee->dev, "tee: command timed out, disabling PSP\n");
> - psp_dead = true;
> -
> - return -ETIMEDOUT;
> -}
> -
> static
> struct tee_init_ring_cmd *tee_alloc_cmd_buffer(struct psp_tee_device *tee)
> {
> @@ -110,7 +90,6 @@ static int tee_init_ring(struct psp_tee_device *tee)
> {
> int ring_size = MAX_RING_BUFFER_ENTRIES * sizeof(struct tee_ring_cmd);
> struct tee_init_ring_cmd *cmd;
> - phys_addr_t cmd_buffer;
> unsigned int reg;
> int ret;
>
> @@ -130,23 +109,15 @@ static int tee_init_ring(struct psp_tee_device *tee)
> return -ENOMEM;
> }
>
> - cmd_buffer = __psp_pa((void *)cmd);
> -
> /* Send command buffer details to Trusted OS by writing to
> * CPU-PSP message registers
> */
> -
> - iowrite32(lower_32_bits(cmd_buffer),
> - tee->io_regs + tee->vdata->cmdbuff_addr_lo_reg);
> - iowrite32(upper_32_bits(cmd_buffer),
> - tee->io_regs + tee->vdata->cmdbuff_addr_hi_reg);
> - iowrite32(TEE_RING_INIT_CMD,
> - tee->io_regs + tee->vdata->cmdresp_reg);
> -
> - ret = tee_wait_cmd_poll(tee, TEE_DEFAULT_TIMEOUT, ®);
> + ret = psp_mailbox_command(tee->psp, PSP_CMD_TEE_RING_INIT, cmd,
> + TEE_DEFAULT_CMD_TIMEOUT, ®);
> if (ret) {
> - dev_err(tee->dev, "tee: ring init command timed out\n");
> + dev_err(tee->dev, "tee: ring init command timed out, disabling TEE support\n");
> tee_free_ring(tee);
> + psp_dead = true;
> goto free_buf;
> }
>
> @@ -174,12 +145,11 @@ static void tee_destroy_ring(struct psp_tee_device *tee)
> if (psp_dead)
> goto free_ring;
>
> - iowrite32(TEE_RING_DESTROY_CMD,
> - tee->io_regs + tee->vdata->cmdresp_reg);
> -
> - ret = tee_wait_cmd_poll(tee, TEE_DEFAULT_TIMEOUT, ®);
> + ret = psp_mailbox_command(tee->psp, PSP_CMD_TEE_RING_DESTROY, NULL,
> + TEE_DEFAULT_CMD_TIMEOUT, ®);
> if (ret) {
> - dev_err(tee->dev, "tee: ring destroy command timed out\n");
> + dev_err(tee->dev, "tee: ring destroy command timed out, disabling TEE support\n");
> + psp_dead = true;
> } else if (FIELD_GET(PSP_CMDRESP_STS, reg)) {
> dev_err(tee->dev, "tee: ring destroy command failed (%#010lx)\n",
> FIELD_GET(PSP_CMDRESP_STS, reg));
> @@ -370,7 +340,7 @@ int psp_tee_process_cmd(enum tee_cmd_id cmd_id, void *buf, size_t len,
> if (ret)
> return ret;
>
> - ret = tee_wait_cmd_completion(tee, resp, TEE_DEFAULT_TIMEOUT);
> + ret = tee_wait_cmd_completion(tee, resp, TEE_DEFAULT_RING_TIMEOUT);
> if (ret) {
> resp->flag = CMD_RESPONSE_TIMEDOUT;
> return ret;
> diff --git a/drivers/crypto/ccp/tee-dev.h b/drivers/crypto/ccp/tee-dev.h
> index 49d26158b71e..ea9a2b7c05f5 100644
> --- a/drivers/crypto/ccp/tee-dev.h
> +++ b/drivers/crypto/ccp/tee-dev.h
> @@ -17,21 +17,10 @@
> #include <linux/device.h>
> #include <linux/mutex.h>
>
> -#define TEE_DEFAULT_TIMEOUT 10
> +#define TEE_DEFAULT_CMD_TIMEOUT (10 * MSEC_PER_SEC)
> +#define TEE_DEFAULT_RING_TIMEOUT 10
> #define MAX_BUFFER_SIZE 988
>
> -/**
> - * enum tee_ring_cmd_id - TEE interface commands for ring buffer configuration
> - * @TEE_RING_INIT_CMD: Initialize ring buffer
> - * @TEE_RING_DESTROY_CMD: Destroy ring buffer
> - * @TEE_RING_MAX_CMD: Maximum command id
> - */
> -enum tee_ring_cmd_id {
> - TEE_RING_INIT_CMD = 0x00010000,
> - TEE_RING_DESTROY_CMD = 0x00020000,
> - TEE_RING_MAX_CMD = 0x000F0000,
> -};
> -
> /**
> * struct tee_init_ring_cmd - Command to init TEE ring buffer
> * @low_addr: bits [31:0] of the physical address of ring buffer
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 2/5] crypto: ccp: Add support for extended PSP mailbox commands
2023-09-07 18:48 [PATCH 0/5] Add new platform support for DBC Mario Limonciello
2023-09-07 18:48 ` [PATCH 1/5] crypto: ccp: Move direct access to some PSP registers out of TEE Mario Limonciello
@ 2023-09-07 18:48 ` Mario Limonciello
2023-09-07 18:48 ` [PATCH 3/5] crypto: ccp: Add a communication path abstraction for DBC Mario Limonciello
` (4 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Mario Limonciello @ 2023-09-07 18:48 UTC (permalink / raw)
To: herbert, davem
Cc: thomas.lendacky, john.allen, linux-crypto, linux-kernel,
Rijo-john.Thomas, Mario Limonciello
The PSP mailbox supports a number of extended sub-commands. These
subcommands are placed in the header of the buffer sent to the mailbox.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
drivers/crypto/ccp/psp-dev.c | 24 ++++++++++++++++++++++++
drivers/crypto/ccp/psp-dev.h | 21 +++++++++++++++++++++
2 files changed, 45 insertions(+)
diff --git a/drivers/crypto/ccp/psp-dev.c b/drivers/crypto/ccp/psp-dev.c
index 3258c4612e14..f9f3b3404f87 100644
--- a/drivers/crypto/ccp/psp-dev.c
+++ b/drivers/crypto/ccp/psp-dev.c
@@ -78,6 +78,30 @@ int psp_mailbox_command(struct psp_device *psp, enum psp_cmd cmd, void *cmdbuff,
return ret;
}
+int psp_extended_mailbox_cmd(struct psp_device *psp, unsigned int timeout_msecs,
+ struct psp_ext_request *req)
+{
+ unsigned int reg;
+ int ret;
+
+ print_hex_dump_debug("->psp ", DUMP_PREFIX_OFFSET, 16, 2, req,
+ req->header.payload_size, false);
+
+ ret = psp_mailbox_command(psp, PSP_CMD_TEE_EXTENDED_CMD, (void *)req,
+ timeout_msecs, ®);
+ if (ret) {
+ return ret;
+ } else if (FIELD_GET(PSP_CMDRESP_STS, reg)) {
+ req->header.status = FIELD_GET(PSP_CMDRESP_STS, reg);
+ return -EIO;
+ }
+
+ print_hex_dump_debug("<-psp ", DUMP_PREFIX_OFFSET, 16, 2, req,
+ req->header.payload_size, false);
+
+ return 0;
+}
+
static struct psp_device *psp_alloc_struct(struct sp_device *sp)
{
struct device *dev = sp->dev;
diff --git a/drivers/crypto/ccp/psp-dev.h b/drivers/crypto/ccp/psp-dev.h
index d917657c6085..396a80d846c0 100644
--- a/drivers/crypto/ccp/psp-dev.h
+++ b/drivers/crypto/ccp/psp-dev.h
@@ -78,15 +78,36 @@ struct psp_device *psp_get_master_device(void);
* enum psp_cmd - PSP mailbox commands
* @PSP_CMD_TEE_RING_INIT: Initialize TEE ring buffer
* @PSP_CMD_TEE_RING_DESTROY: Destroy TEE ring buffer
+ * @PSP_CMD_TEE_EXTENDED_CMD: Extended command
* @PSP_CMD_MAX: Maximum command id
*/
enum psp_cmd {
PSP_CMD_TEE_RING_INIT = 1,
PSP_CMD_TEE_RING_DESTROY = 2,
+ PSP_CMD_TEE_EXTENDED_CMD = 14,
PSP_CMD_MAX = 15,
};
int psp_mailbox_command(struct psp_device *psp, enum psp_cmd cmd, void *cmdbuff,
unsigned int timeout_msecs, unsigned int *cmdresp);
+/**
+ * struct psp_ext_req_buffer_hdr - Structure of the extended command header
+ * @payload_size: total payload size
+ * @sub_cmd_id: extended command ID
+ * @status: status of command execution (out)
+ */
+struct psp_ext_req_buffer_hdr {
+ u32 payload_size;
+ u32 sub_cmd_id;
+ u32 status;
+} __packed;
+
+struct psp_ext_request {
+ struct psp_ext_req_buffer_hdr header;
+ void *buf;
+} __packed;
+
+int psp_extended_mailbox_cmd(struct psp_device *psp, unsigned int timeout_msecs,
+ struct psp_ext_request *req);
#endif /* __PSP_DEV_H */
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 3/5] crypto: ccp: Add a communication path abstraction for DBC
2023-09-07 18:48 [PATCH 0/5] Add new platform support for DBC Mario Limonciello
2023-09-07 18:48 ` [PATCH 1/5] crypto: ccp: Move direct access to some PSP registers out of TEE Mario Limonciello
2023-09-07 18:48 ` [PATCH 2/5] crypto: ccp: Add support for extended PSP mailbox commands Mario Limonciello
@ 2023-09-07 18:48 ` Mario Limonciello
2023-09-07 18:48 ` [PATCH 4/5] crypto: ccp: Add a macro to check capabilities register Mario Limonciello
` (3 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Mario Limonciello @ 2023-09-07 18:48 UTC (permalink / raw)
To: herbert, davem
Cc: thomas.lendacky, john.allen, linux-crypto, linux-kernel,
Rijo-john.Thomas, Mario Limonciello
DBC is currently accessed only from the platform access mailbox and
a lot of that implementation's communication path is intertwined
with DBC. Add an abstraction layer for pointers into the mailbox.
No intended functional changes.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
drivers/crypto/ccp/dbc.c | 37 ++++++++++++++++++-------------------
drivers/crypto/ccp/dbc.h | 27 ++++++++-------------------
2 files changed, 26 insertions(+), 38 deletions(-)
diff --git a/drivers/crypto/ccp/dbc.c b/drivers/crypto/ccp/dbc.c
index 6f33149ef80d..ebd7279d4001 100644
--- a/drivers/crypto/ccp/dbc.c
+++ b/drivers/crypto/ccp/dbc.c
@@ -42,17 +42,17 @@ static int send_dbc_cmd(struct psp_dbc_device *dbc_dev,
{
int ret;
- dbc_dev->mbox->req.header.status = 0;
+ *dbc_dev->result = 0;
ret = psp_send_platform_access_msg(msg, (struct psp_request *)dbc_dev->mbox);
if (ret == -EIO) {
int i;
dev_dbg(dbc_dev->dev,
"msg 0x%x failed with PSP error: 0x%x\n",
- msg, dbc_dev->mbox->req.header.status);
+ msg, *dbc_dev->result);
for (i = 0; error_codes[i].psp; i++) {
- if (dbc_dev->mbox->req.header.status == error_codes[i].psp)
+ if (*dbc_dev->result == error_codes[i].psp)
return error_codes[i].ret;
}
}
@@ -64,7 +64,7 @@ static int send_dbc_nonce(struct psp_dbc_device *dbc_dev)
{
int ret;
- dbc_dev->mbox->req.header.payload_size = sizeof(dbc_dev->mbox->dbc_nonce);
+ *dbc_dev->payload_size = dbc_dev->header_size + sizeof(struct dbc_user_nonce);
ret = send_dbc_cmd(dbc_dev, PSP_DYNAMIC_BOOST_GET_NONCE);
if (ret == -EAGAIN) {
dev_dbg(dbc_dev->dev, "retrying get nonce\n");
@@ -76,9 +76,9 @@ static int send_dbc_nonce(struct psp_dbc_device *dbc_dev)
static int send_dbc_parameter(struct psp_dbc_device *dbc_dev)
{
- dbc_dev->mbox->req.header.payload_size = sizeof(dbc_dev->mbox->dbc_param);
+ struct dbc_user_param *user_param = (struct dbc_user_param *)dbc_dev->payload;
- switch (dbc_dev->mbox->dbc_param.user.msg_index) {
+ switch (user_param->msg_index) {
case PARAM_SET_FMAX_CAP:
case PARAM_SET_PWR_CAP:
case PARAM_SET_GFX_MODE:
@@ -125,8 +125,7 @@ static long dbc_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
switch (cmd) {
case DBCIOCNONCE:
- if (copy_from_user(&dbc_dev->mbox->dbc_nonce.user, argp,
- sizeof(struct dbc_user_nonce))) {
+ if (copy_from_user(dbc_dev->payload, argp, sizeof(struct dbc_user_nonce))) {
ret = -EFAULT;
goto unlock;
}
@@ -135,43 +134,39 @@ static long dbc_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
if (ret)
goto unlock;
- if (copy_to_user(argp, &dbc_dev->mbox->dbc_nonce.user,
- sizeof(struct dbc_user_nonce))) {
+ if (copy_to_user(argp, dbc_dev->payload, sizeof(struct dbc_user_nonce))) {
ret = -EFAULT;
goto unlock;
}
break;
case DBCIOCUID:
- dbc_dev->mbox->req.header.payload_size = sizeof(dbc_dev->mbox->dbc_set_uid);
- if (copy_from_user(&dbc_dev->mbox->dbc_set_uid.user, argp,
- sizeof(struct dbc_user_setuid))) {
+ if (copy_from_user(dbc_dev->payload, argp, sizeof(struct dbc_user_setuid))) {
ret = -EFAULT;
goto unlock;
}
+ *dbc_dev->payload_size = dbc_dev->header_size + sizeof(struct dbc_user_setuid);
ret = send_dbc_cmd(dbc_dev, PSP_DYNAMIC_BOOST_SET_UID);
if (ret)
goto unlock;
- if (copy_to_user(argp, &dbc_dev->mbox->dbc_set_uid.user,
- sizeof(struct dbc_user_setuid))) {
+ if (copy_to_user(argp, dbc_dev->payload, sizeof(struct dbc_user_setuid))) {
ret = -EFAULT;
goto unlock;
}
break;
case DBCIOCPARAM:
- if (copy_from_user(&dbc_dev->mbox->dbc_param.user, argp,
- sizeof(struct dbc_user_param))) {
+ if (copy_from_user(dbc_dev->payload, argp, sizeof(struct dbc_user_param))) {
ret = -EFAULT;
goto unlock;
}
+ *dbc_dev->payload_size = dbc_dev->header_size + sizeof(struct dbc_user_param);
ret = send_dbc_parameter(dbc_dev);
if (ret)
goto unlock;
- if (copy_to_user(argp, &dbc_dev->mbox->dbc_param.user,
- sizeof(struct dbc_user_param))) {
+ if (copy_to_user(argp, dbc_dev->payload, sizeof(struct dbc_user_param))) {
ret = -EFAULT;
goto unlock;
}
@@ -213,6 +208,10 @@ int dbc_dev_init(struct psp_device *psp)
psp->dbc_data = dbc_dev;
dbc_dev->dev = dev;
+ dbc_dev->payload_size = &dbc_dev->mbox->pa_req.header.payload_size;
+ dbc_dev->result = &dbc_dev->mbox->pa_req.header.status;
+ dbc_dev->payload = &dbc_dev->mbox->pa_req.buf;
+ dbc_dev->header_size = sizeof(struct psp_req_buffer_hdr);
ret = send_dbc_nonce(dbc_dev);
if (ret == -EACCES) {
diff --git a/drivers/crypto/ccp/dbc.h b/drivers/crypto/ccp/dbc.h
index e963099ca38e..184646ee55bb 100644
--- a/drivers/crypto/ccp/dbc.h
+++ b/drivers/crypto/ccp/dbc.h
@@ -26,28 +26,17 @@ struct psp_dbc_device {
struct mutex ioctl_mutex;
struct miscdevice char_dev;
-};
-
-struct dbc_nonce {
- struct psp_req_buffer_hdr header;
- struct dbc_user_nonce user;
-} __packed;
-struct dbc_set_uid {
- struct psp_req_buffer_hdr header;
- struct dbc_user_setuid user;
-} __packed;
-
-struct dbc_param {
- struct psp_req_buffer_hdr header;
- struct dbc_user_param user;
-} __packed;
+ /* used to abstract communication path */
+ bool use_ext;
+ u32 header_size;
+ u32 *payload_size;
+ u32 *result;
+ void *payload;
+};
union dbc_buffer {
- struct psp_request req;
- struct dbc_nonce dbc_nonce;
- struct dbc_set_uid dbc_set_uid;
- struct dbc_param dbc_param;
+ struct psp_request pa_req;
};
void dbc_dev_destroy(struct psp_device *psp);
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 4/5] crypto: ccp: Add a macro to check capabilities register
2023-09-07 18:48 [PATCH 0/5] Add new platform support for DBC Mario Limonciello
` (2 preceding siblings ...)
2023-09-07 18:48 ` [PATCH 3/5] crypto: ccp: Add a communication path abstraction for DBC Mario Limonciello
@ 2023-09-07 18:48 ` Mario Limonciello
2023-09-07 18:48 ` [PATCH 5/5] crypto: ccp: Add support for DBC over PSP mailbox Mario Limonciello
` (2 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Mario Limonciello @ 2023-09-07 18:48 UTC (permalink / raw)
To: herbert, davem
Cc: thomas.lendacky, john.allen, linux-crypto, linux-kernel,
Rijo-john.Thomas, Mario Limonciello
Offsets are checked by the capabilities register in multiple places.
To make the code more readable add a macro.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
drivers/crypto/ccp/psp-dev.c | 6 +++---
drivers/crypto/ccp/sp-dev.h | 1 +
drivers/crypto/ccp/sp-pci.c | 4 ++--
3 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto/ccp/psp-dev.c b/drivers/crypto/ccp/psp-dev.c
index f9f3b3404f87..5f61b23695d5 100644
--- a/drivers/crypto/ccp/psp-dev.c
+++ b/drivers/crypto/ccp/psp-dev.c
@@ -157,7 +157,7 @@ static unsigned int psp_get_capability(struct psp_device *psp)
psp->capability = val;
/* Detect if TSME and SME are both enabled */
- if (psp->capability & PSP_CAPABILITY_PSP_SECURITY_REPORTING &&
+ if (PSP_CAPABILITY(psp, PSP_SECURITY_REPORTING) &&
psp->capability & (PSP_SECURITY_TSME_STATUS << PSP_CAPABILITY_PSP_SECURITY_OFFSET) &&
cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT))
dev_notice(psp->dev, "psp: Both TSME and SME are active, SME is unnecessary when TSME is active.\n");
@@ -168,7 +168,7 @@ static unsigned int psp_get_capability(struct psp_device *psp)
static int psp_check_sev_support(struct psp_device *psp)
{
/* Check if device supports SEV feature */
- if (!(psp->capability & PSP_CAPABILITY_SEV)) {
+ if (!PSP_CAPABILITY(psp, SEV)) {
dev_dbg(psp->dev, "psp does not support SEV\n");
return -ENODEV;
}
@@ -179,7 +179,7 @@ static int psp_check_sev_support(struct psp_device *psp)
static int psp_check_tee_support(struct psp_device *psp)
{
/* Check if device supports TEE feature */
- if (!(psp->capability & PSP_CAPABILITY_TEE)) {
+ if (!PSP_CAPABILITY(psp, TEE)) {
dev_dbg(psp->dev, "psp does not support TEE\n");
return -ENODEV;
}
diff --git a/drivers/crypto/ccp/sp-dev.h b/drivers/crypto/ccp/sp-dev.h
index c4e125efe6c7..03d5b9e04084 100644
--- a/drivers/crypto/ccp/sp-dev.h
+++ b/drivers/crypto/ccp/sp-dev.h
@@ -30,6 +30,7 @@
#define PLATFORM_FEATURE_DBC 0x1
+#define PSP_CAPABILITY(psp, cap) (psp->capability & PSP_CAPABILITY_##cap)
#define PSP_FEATURE(psp, feat) (psp->vdata && psp->vdata->platform_features & PLATFORM_FEATURE_##feat)
/* Structure to hold CCP device data */
diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c
index d1aedc5c1a68..300dda14182b 100644
--- a/drivers/crypto/ccp/sp-pci.c
+++ b/drivers/crypto/ccp/sp-pci.c
@@ -84,7 +84,7 @@ static umode_t psp_security_is_visible(struct kobject *kobj, struct attribute *a
struct sp_device *sp = dev_get_drvdata(dev);
struct psp_device *psp = sp->psp_data;
- if (psp && (psp->capability & PSP_CAPABILITY_PSP_SECURITY_REPORTING))
+ if (psp && PSP_CAPABILITY(psp, PSP_SECURITY_REPORTING))
return 0444;
return 0;
@@ -135,7 +135,7 @@ static umode_t psp_firmware_is_visible(struct kobject *kobj, struct attribute *a
val = ioread32(psp->io_regs + psp->vdata->bootloader_info_reg);
if (attr == &dev_attr_tee_version.attr &&
- psp->capability & PSP_CAPABILITY_TEE &&
+ PSP_CAPABILITY(psp, TEE) &&
psp->vdata->tee->info_reg)
val = ioread32(psp->io_regs + psp->vdata->tee->info_reg);
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 5/5] crypto: ccp: Add support for DBC over PSP mailbox
2023-09-07 18:48 [PATCH 0/5] Add new platform support for DBC Mario Limonciello
` (3 preceding siblings ...)
2023-09-07 18:48 ` [PATCH 4/5] crypto: ccp: Add a macro to check capabilities register Mario Limonciello
@ 2023-09-07 18:48 ` Mario Limonciello
2023-09-07 21:28 ` [PATCH 0/5] Add new platform support for DBC Tom Lendacky
2023-09-15 10:45 ` Herbert Xu
6 siblings, 0 replies; 10+ messages in thread
From: Mario Limonciello @ 2023-09-07 18:48 UTC (permalink / raw)
To: herbert, davem
Cc: thomas.lendacky, john.allen, linux-crypto, linux-kernel,
Rijo-john.Thomas, Mario Limonciello
On some SOCs DBC is supported through the PSP mailbox instead of
the platform mailbox. This capability is advertised in the PSP
capabilities register. Allow using this communication path if
supported.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
drivers/crypto/ccp/dbc.c | 43 +++++++++++++++++++++++++++---------
drivers/crypto/ccp/dbc.h | 2 ++
drivers/crypto/ccp/psp-dev.c | 32 +++++++++++----------------
drivers/crypto/ccp/psp-dev.h | 16 ++++++++++++++
4 files changed, 64 insertions(+), 29 deletions(-)
diff --git a/drivers/crypto/ccp/dbc.c b/drivers/crypto/ccp/dbc.c
index ebd7279d4001..d373caab52f8 100644
--- a/drivers/crypto/ccp/dbc.c
+++ b/drivers/crypto/ccp/dbc.c
@@ -9,6 +9,7 @@
#include "dbc.h"
+#define DBC_DEFAULT_TIMEOUT (10 * MSEC_PER_SEC)
struct error_map {
u32 psp;
int ret;
@@ -37,13 +38,28 @@ static struct error_map error_codes[] = {
{0x0, 0x0},
};
-static int send_dbc_cmd(struct psp_dbc_device *dbc_dev,
- enum psp_platform_access_msg msg)
+static inline int send_dbc_cmd_thru_ext(struct psp_dbc_device *dbc_dev, int msg)
+{
+ dbc_dev->mbox->ext_req.header.sub_cmd_id = msg;
+
+ return psp_extended_mailbox_cmd(dbc_dev->psp,
+ DBC_DEFAULT_TIMEOUT,
+ (struct psp_ext_request *)dbc_dev->mbox);
+}
+
+static inline int send_dbc_cmd_thru_pa(struct psp_dbc_device *dbc_dev, int msg)
+{
+ return psp_send_platform_access_msg(msg,
+ (struct psp_request *)dbc_dev->mbox);
+}
+
+static int send_dbc_cmd(struct psp_dbc_device *dbc_dev, int msg)
{
int ret;
*dbc_dev->result = 0;
- ret = psp_send_platform_access_msg(msg, (struct psp_request *)dbc_dev->mbox);
+ ret = dbc_dev->use_ext ? send_dbc_cmd_thru_ext(dbc_dev, msg) :
+ send_dbc_cmd_thru_pa(dbc_dev, msg);
if (ret == -EIO) {
int i;
@@ -192,9 +208,6 @@ int dbc_dev_init(struct psp_device *psp)
struct psp_dbc_device *dbc_dev;
int ret;
- if (!PSP_FEATURE(psp, DBC))
- return 0;
-
dbc_dev = devm_kzalloc(dev, sizeof(*dbc_dev), GFP_KERNEL);
if (!dbc_dev)
return -ENOMEM;
@@ -208,10 +221,20 @@ int dbc_dev_init(struct psp_device *psp)
psp->dbc_data = dbc_dev;
dbc_dev->dev = dev;
- dbc_dev->payload_size = &dbc_dev->mbox->pa_req.header.payload_size;
- dbc_dev->result = &dbc_dev->mbox->pa_req.header.status;
- dbc_dev->payload = &dbc_dev->mbox->pa_req.buf;
- dbc_dev->header_size = sizeof(struct psp_req_buffer_hdr);
+ dbc_dev->psp = psp;
+
+ if (PSP_CAPABILITY(psp, DBC_THRU_EXT)) {
+ dbc_dev->use_ext = true;
+ dbc_dev->payload_size = &dbc_dev->mbox->ext_req.header.payload_size;
+ dbc_dev->result = &dbc_dev->mbox->ext_req.header.status;
+ dbc_dev->payload = &dbc_dev->mbox->ext_req.buf;
+ dbc_dev->header_size = sizeof(struct psp_ext_req_buffer_hdr);
+ } else {
+ dbc_dev->payload_size = &dbc_dev->mbox->pa_req.header.payload_size;
+ dbc_dev->result = &dbc_dev->mbox->pa_req.header.status;
+ dbc_dev->payload = &dbc_dev->mbox->pa_req.buf;
+ dbc_dev->header_size = sizeof(struct psp_req_buffer_hdr);
+ }
ret = send_dbc_nonce(dbc_dev);
if (ret == -EACCES) {
diff --git a/drivers/crypto/ccp/dbc.h b/drivers/crypto/ccp/dbc.h
index 184646ee55bb..e0fecbe92eb1 100644
--- a/drivers/crypto/ccp/dbc.h
+++ b/drivers/crypto/ccp/dbc.h
@@ -20,6 +20,7 @@
struct psp_dbc_device {
struct device *dev;
+ struct psp_device *psp;
union dbc_buffer *mbox;
@@ -37,6 +38,7 @@ struct psp_dbc_device {
union dbc_buffer {
struct psp_request pa_req;
+ struct psp_ext_request ext_req;
};
void dbc_dev_destroy(struct psp_device *psp);
diff --git a/drivers/crypto/ccp/psp-dev.c b/drivers/crypto/ccp/psp-dev.c
index 5f61b23695d5..124a2e0c8999 100644
--- a/drivers/crypto/ccp/psp-dev.c
+++ b/drivers/crypto/ccp/psp-dev.c
@@ -187,23 +187,6 @@ static int psp_check_tee_support(struct psp_device *psp)
return 0;
}
-static void psp_init_platform_access(struct psp_device *psp)
-{
- int ret;
-
- ret = platform_access_dev_init(psp);
- if (ret) {
- dev_warn(psp->dev, "platform access init failed: %d\n", ret);
- return;
- }
-
- /* dbc must come after platform access as it tests the feature */
- ret = dbc_dev_init(psp);
- if (ret)
- dev_warn(psp->dev, "failed to init dynamic boost control: %d\n",
- ret);
-}
-
static int psp_init(struct psp_device *psp)
{
int ret;
@@ -220,8 +203,19 @@ static int psp_init(struct psp_device *psp)
return ret;
}
- if (psp->vdata->platform_access)
- psp_init_platform_access(psp);
+ if (psp->vdata->platform_access) {
+ ret = platform_access_dev_init(psp);
+ if (ret)
+ return ret;
+ }
+
+ /* dbc must come after platform access as it tests the feature */
+ if (PSP_FEATURE(psp, DBC) ||
+ PSP_CAPABILITY(psp, DBC_THRU_EXT)) {
+ ret = dbc_dev_init(psp);
+ if (ret)
+ return ret;
+ }
return 0;
}
diff --git a/drivers/crypto/ccp/psp-dev.h b/drivers/crypto/ccp/psp-dev.h
index 396a80d846c0..ae582ba63729 100644
--- a/drivers/crypto/ccp/psp-dev.h
+++ b/drivers/crypto/ccp/psp-dev.h
@@ -16,6 +16,7 @@
#include <linux/interrupt.h>
#include <linux/mutex.h>
#include <linux/psp.h>
+#include <linux/psp-platform-access.h>
#include "sp-dev.h"
@@ -56,6 +57,7 @@ struct psp_device *psp_get_master_device(void);
#define PSP_CAPABILITY_SEV BIT(0)
#define PSP_CAPABILITY_TEE BIT(1)
+#define PSP_CAPABILITY_DBC_THRU_EXT BIT(2)
#define PSP_CAPABILITY_PSP_SECURITY_REPORTING BIT(7)
#define PSP_CAPABILITY_PSP_SECURITY_OFFSET 8
@@ -108,6 +110,20 @@ struct psp_ext_request {
void *buf;
} __packed;
+/**
+ * enum psp_sub_cmd - PSP mailbox sub commands
+ * @PSP_SUB_CMD_DBC_GET_NONCE: Get nonce from DBC
+ * @PSP_SUB_CMD_DBC_SET_UID: Set UID for DBC
+ * @PSP_SUB_CMD_DBC_GET_PARAMETER: Get parameter from DBC
+ * @PSP_SUB_CMD_DBC_SET_PARAMETER: Set parameter for DBC
+ */
+enum psp_sub_cmd {
+ PSP_SUB_CMD_DBC_GET_NONCE = PSP_DYNAMIC_BOOST_GET_NONCE,
+ PSP_SUB_CMD_DBC_SET_UID = PSP_DYNAMIC_BOOST_SET_UID,
+ PSP_SUB_CMD_DBC_GET_PARAMETER = PSP_DYNAMIC_BOOST_GET_PARAMETER,
+ PSP_SUB_CMD_DBC_SET_PARAMETER = PSP_DYNAMIC_BOOST_SET_PARAMETER,
+};
+
int psp_extended_mailbox_cmd(struct psp_device *psp, unsigned int timeout_msecs,
struct psp_ext_request *req);
#endif /* __PSP_DEV_H */
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH 0/5] Add new platform support for DBC
2023-09-07 18:48 [PATCH 0/5] Add new platform support for DBC Mario Limonciello
` (4 preceding siblings ...)
2023-09-07 18:48 ` [PATCH 5/5] crypto: ccp: Add support for DBC over PSP mailbox Mario Limonciello
@ 2023-09-07 21:28 ` Tom Lendacky
2023-09-14 8:38 ` Rijo Thomas
2023-09-15 10:45 ` Herbert Xu
6 siblings, 1 reply; 10+ messages in thread
From: Tom Lendacky @ 2023-09-07 21:28 UTC (permalink / raw)
To: Mario Limonciello, herbert, davem
Cc: john.allen, linux-crypto, linux-kernel, Rijo-john.Thomas
On 9/7/23 13:48, Mario Limonciello wrote:
> Some platforms that support dynamic boost control (DBC) support it via
> a different mailbox than the platform access mailbox.
>
> This series adds support for those platforms.
>
> It is tested on top of the fixes series. The prerequisite patches refer
> to that series.
> Link: https://lore.kernel.org/linux-crypto/20230829150759.156126-1-mario.limonciello@amd.com/T/#m47782729377f6fe5d62130cc701dae7f15306726
>
> Mario Limonciello (4):
> crypto: ccp: Add support for extended PSP mailbox commands
> crypto: ccp: Add a communication path abstraction for DBC
> crypto: ccp: Add a macro to check capabilities register
> crypto: ccp: Add support for DBC over PSP mailbox
>
> Tom Lendacky (1):
> crypto: ccp: Move direct access to some PSP registers out of TEE
>
> drivers/crypto/ccp/dbc.c | 72 ++++++++++++++-------
> drivers/crypto/ccp/dbc.h | 29 +++------
> drivers/crypto/ccp/psp-dev.c | 122 ++++++++++++++++++++++++++++-------
> drivers/crypto/ccp/psp-dev.h | 55 ++++++++++++++++
> drivers/crypto/ccp/sp-dev.h | 4 ++
> drivers/crypto/ccp/sp-pci.c | 22 ++++---
> drivers/crypto/ccp/tee-dev.c | 48 +++-----------
> drivers/crypto/ccp/tee-dev.h | 15 +----
> 8 files changed, 241 insertions(+), 126 deletions(-)
>
Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
But I would like to see a Reviewed-by: or Tested-by: from Rijo-john for
the TEE changes.
Thanks,
Tom
>
> base-commit: 7ba2090ca64ea1aa435744884124387db1fac70f
> prerequisite-patch-id: 4bcf7f3ea21472e4e28c2457cc9827f6023ec6ca
> prerequisite-patch-id: 903be53a20306f0188e52015dbfe5196738bb2eb
> prerequisite-patch-id: af396bafb6acaa9c203c1a2c5f4665171cb45e4f
> prerequisite-patch-id: abe450d4bf1de4a5664a41dbf84e72b1d4bfdae7
> prerequisite-patch-id: b0b9cf55fcb73a11de6f3da73412fb090562857a
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH 0/5] Add new platform support for DBC
2023-09-07 21:28 ` [PATCH 0/5] Add new platform support for DBC Tom Lendacky
@ 2023-09-14 8:38 ` Rijo Thomas
0 siblings, 0 replies; 10+ messages in thread
From: Rijo Thomas @ 2023-09-14 8:38 UTC (permalink / raw)
To: Tom Lendacky, Mario Limonciello, herbert, davem
Cc: john.allen, linux-crypto, linux-kernel
On 9/8/2023 2:58 AM, Tom Lendacky wrote:
> On 9/7/23 13:48, Mario Limonciello wrote:
>> Some platforms that support dynamic boost control (DBC) support it via
>> a different mailbox than the platform access mailbox.
>>
>> This series adds support for those platforms.
>>
>> It is tested on top of the fixes series. The prerequisite patches refer
>> to that series.
>> Link: https://lore.kernel.org/linux-crypto/20230829150759.156126-1-mario.limonciello@amd.com/T/#m47782729377f6fe5d62130cc701dae7f15306726
>>
>> Mario Limonciello (4):
>> crypto: ccp: Add support for extended PSP mailbox commands
>> crypto: ccp: Add a communication path abstraction for DBC
>> crypto: ccp: Add a macro to check capabilities register
>> crypto: ccp: Add support for DBC over PSP mailbox
>>
>> Tom Lendacky (1):
>> crypto: ccp: Move direct access to some PSP registers out of TEE
>>
>> drivers/crypto/ccp/dbc.c | 72 ++++++++++++++-------
>> drivers/crypto/ccp/dbc.h | 29 +++------
>> drivers/crypto/ccp/psp-dev.c | 122 ++++++++++++++++++++++++++++-------
>> drivers/crypto/ccp/psp-dev.h | 55 ++++++++++++++++
>> drivers/crypto/ccp/sp-dev.h | 4 ++
>> drivers/crypto/ccp/sp-pci.c | 22 ++++---
>> drivers/crypto/ccp/tee-dev.c | 48 +++-----------
>> drivers/crypto/ccp/tee-dev.h | 15 +----
>> 8 files changed, 241 insertions(+), 126 deletions(-)
>>
>
> Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
>
> But I would like to see a Reviewed-by: or Tested-by: from Rijo-john for the TEE changes.
>
Done.
Acked-by: Rijo Thomas <Rijo-john.Thomas@amd.com>
Thanks,
Rijo
> Thanks,
> Tom
>
>>
>> base-commit: 7ba2090ca64ea1aa435744884124387db1fac70f
>> prerequisite-patch-id: 4bcf7f3ea21472e4e28c2457cc9827f6023ec6ca
>> prerequisite-patch-id: 903be53a20306f0188e52015dbfe5196738bb2eb
>> prerequisite-patch-id: af396bafb6acaa9c203c1a2c5f4665171cb45e4f
>> prerequisite-patch-id: abe450d4bf1de4a5664a41dbf84e72b1d4bfdae7
>> prerequisite-patch-id: b0b9cf55fcb73a11de6f3da73412fb090562857a
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 0/5] Add new platform support for DBC
2023-09-07 18:48 [PATCH 0/5] Add new platform support for DBC Mario Limonciello
` (5 preceding siblings ...)
2023-09-07 21:28 ` [PATCH 0/5] Add new platform support for DBC Tom Lendacky
@ 2023-09-15 10:45 ` Herbert Xu
6 siblings, 0 replies; 10+ messages in thread
From: Herbert Xu @ 2023-09-15 10:45 UTC (permalink / raw)
To: Mario Limonciello
Cc: davem, thomas.lendacky, john.allen, linux-crypto, linux-kernel,
Rijo-john.Thomas
On Thu, Sep 07, 2023 at 01:48:41PM -0500, Mario Limonciello wrote:
> Some platforms that support dynamic boost control (DBC) support it via
> a different mailbox than the platform access mailbox.
>
> This series adds support for those platforms.
>
> It is tested on top of the fixes series. The prerequisite patches refer
> to that series.
> Link: https://lore.kernel.org/linux-crypto/20230829150759.156126-1-mario.limonciello@amd.com/T/#m47782729377f6fe5d62130cc701dae7f15306726
>
> Mario Limonciello (4):
> crypto: ccp: Add support for extended PSP mailbox commands
> crypto: ccp: Add a communication path abstraction for DBC
> crypto: ccp: Add a macro to check capabilities register
> crypto: ccp: Add support for DBC over PSP mailbox
>
> Tom Lendacky (1):
> crypto: ccp: Move direct access to some PSP registers out of TEE
>
> drivers/crypto/ccp/dbc.c | 72 ++++++++++++++-------
> drivers/crypto/ccp/dbc.h | 29 +++------
> drivers/crypto/ccp/psp-dev.c | 122 ++++++++++++++++++++++++++++-------
> drivers/crypto/ccp/psp-dev.h | 55 ++++++++++++++++
> drivers/crypto/ccp/sp-dev.h | 4 ++
> drivers/crypto/ccp/sp-pci.c | 22 ++++---
> drivers/crypto/ccp/tee-dev.c | 48 +++-----------
> drivers/crypto/ccp/tee-dev.h | 15 +----
> 8 files changed, 241 insertions(+), 126 deletions(-)
>
>
> base-commit: 7ba2090ca64ea1aa435744884124387db1fac70f
> prerequisite-patch-id: 4bcf7f3ea21472e4e28c2457cc9827f6023ec6ca
> prerequisite-patch-id: 903be53a20306f0188e52015dbfe5196738bb2eb
> prerequisite-patch-id: af396bafb6acaa9c203c1a2c5f4665171cb45e4f
> prerequisite-patch-id: abe450d4bf1de4a5664a41dbf84e72b1d4bfdae7
> prerequisite-patch-id: b0b9cf55fcb73a11de6f3da73412fb090562857a
> --
> 2.34.1
All applied. Thanks.
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply [flat|nested] 10+ messages in thread