From: <Ryan.Wanner@microchip.com>
To: <herbert@gondor.apana.org.au>, <davem@davemloft.net>,
<robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<claudiu.beznea@tuxon.dev>, <olivia@selenic.com>
Cc: <linux-crypto@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
"Ryan Wanner" <Ryan.Wanner@microchip.com>
Subject: [PATCH v2 06/10] ARM: dts: microchip: sama7d65: Add crypto support
Date: Wed, 11 Jun 2025 12:47:30 -0700 [thread overview]
Message-ID: <fc791949c97f368f32a710e64d8db4018e45e70f.1749666053.git.Ryan.Wanner@microchip.com> (raw)
In-Reply-To: <cover.1749666053.git.Ryan.Wanner@microchip.com>
From: Ryan Wanner <Ryan.Wanner@microchip.com>
Add and enable SHA, AES, TDES, and TRNG for SAMA7D65 SoC.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
---
arch/arm/boot/dts/microchip/sama7d65.dtsi | 39 +++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
index d08d773b1cc5..90cbea576d91 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -186,6 +186,45 @@ sdmmc1: mmc@e1208000 {
status = "disabled";
};
+ aes: crypto@e1600000 {
+ compatible = "microchip,sama7d65-aes", "atmel,at91sam9g46-aes";
+ reg = <0xe1600000 0x100>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
+ clock-names = "aes_clk";
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>,
+ <&dma0 AT91_XDMAC_DT_PERID(2)>;
+ dma-names = "tx", "rx";
+ };
+
+ sha: crypto@e1604000 {
+ compatible = "microchip,sama7d65-sha", "atmel,at91sam9g46-sha";
+ reg = <0xe1604000 0x100>;
+ interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 78>;
+ clock-names = "sha_clk";
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>;
+ dma-names = "tx";
+ };
+
+ tdes: crypto@e1608000 {
+ compatible = "microchip,sama7d65-tdes", "atmel,at91sam9g46-tdes";
+ reg = <0xe1608000 0x100>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 91>;
+ clock-names = "tdes_clk";
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(54)>,
+ <&dma0 AT91_XDMAC_DT_PERID(53)>;
+ dma-names = "tx", "rx";
+ };
+
+ trng: rng@e160c000 {
+ compatible = "microchip,sama7d65-trng", "microchip,sam9x60-trng";
+ reg = <0xe160c000 0x100>;
+ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 92>;
+ };
+
dma0: dma-controller@e1610000 {
compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma";
reg = <0xe1610000 0x1000>;
--
2.43.0
next prev parent reply other threads:[~2025-06-11 19:48 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-11 19:47 [PATCH v2 00/10] SAMA7D65 Add support for Crypto, CAN and PWM Ryan.Wanner
2025-06-11 19:47 ` [PATCH v2 01/10] dt-bindings: crypto: add sama7d65 in Atmel AES Ryan.Wanner
2025-06-12 7:33 ` Krzysztof Kozlowski
2025-06-11 19:47 ` [PATCH v2 02/10] dt-bindings: crypto: add sama7d65 in Atmel SHA Ryan.Wanner
2025-06-12 7:33 ` Krzysztof Kozlowski
2025-06-11 19:47 ` [PATCH v2 03/10] dt-bindings: crypto: add sama7d65 in Atmel TDES Ryan.Wanner
2025-06-12 7:34 ` Krzysztof Kozlowski
2025-06-11 19:47 ` [PATCH v2 04/10] dt-bindings: rng: atmel,at91-trng: add sama7d65 TRNG Ryan.Wanner
2025-06-11 19:47 ` [PATCH v2 05/10] crypto: atmel - add support for AES and SHA IPs available on sama7d65 SoC Ryan.Wanner
2025-06-11 19:47 ` Ryan.Wanner [this message]
2025-06-11 19:47 ` [PATCH v2 07/10] ARM: dts: microchip: sama7d65: Add PWM support Ryan.Wanner
2025-06-11 19:47 ` [PATCH v2 08/10] ARM: dts: microchip: sama7d65: Add CAN bus support Ryan.Wanner
2025-06-11 19:47 ` [PATCH v2 09/10] ARM: dts: microchip: sama7d65: Clean up extra space Ryan.Wanner
2025-06-11 19:47 ` [PATCH v2 10/10] ARM: dts: microchip: sama7d65: Enable CAN bus Ryan.Wanner
2025-06-23 9:18 ` [PATCH v2 00/10] SAMA7D65 Add support for Crypto, CAN and PWM Herbert Xu
2025-06-24 7:18 ` Claudiu Beznea
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