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From: Neeraj Kumar <s.neeraj@samsung.com>
To: dan.j.williams@intel.com, dave@stgolabs.net,
	jonathan.cameron@huawei.com, dave.jiang@intel.com,
	alison.schofield@intel.com, vishal.l.verma@intel.com,
	ira.weiny@intel.com
Cc: a.manzanares@samsung.com, nifan.cxl@gmail.com,
	anisa.su@samsung.com, vishak.g@samsung.com,
	krish.reddy@samsung.com, arun.george@samsung.com,
	alok.rathore@samsung.com, s.neeraj@samsung.com,
	neeraj.kernel@gmail.com, linux-kernel@vger.kernel.org,
	linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev,
	gost.dev@samsung.com, cpgs@samsung.com
Subject: [RFC PATCH 05/20] nvdimm/region_label: Add region label updation routine
Date: Tue, 17 Jun 2025 18:09:29 +0530	[thread overview]
Message-ID: <1690859824.141750165204442.JavaMail.epsvc@epcpadp1new> (raw)
In-Reply-To: <20250617123944.78345-1-s.neeraj@samsung.com>

Added __pmem_region_label_update region label update routine to update
region label

Signed-off-by: Neeraj Kumar <s.neeraj@samsung.com>
---
 drivers/nvdimm/label.c          | 142 ++++++++++++++++++++++++++++++++
 drivers/nvdimm/label.h          |   2 +
 drivers/nvdimm/namespace_devs.c |  12 +++
 drivers/nvdimm/nd.h             |  20 +++++
 include/linux/libnvdimm.h       |   8 ++
 5 files changed, 184 insertions(+)

diff --git a/drivers/nvdimm/label.c b/drivers/nvdimm/label.c
index d5cfaa99f976..7f33d14ce0ef 100644
--- a/drivers/nvdimm/label.c
+++ b/drivers/nvdimm/label.c
@@ -381,6 +381,16 @@ static void nsl_calculate_checksum(struct nvdimm_drvdata *ndd,
 	nsl_set_checksum(ndd, nd_label, sum);
 }
 
+static void rgl_calculate_checksum(struct nvdimm_drvdata *ndd,
+				   struct cxl_region_label *rg_label)
+{
+	u64 sum;
+
+	rgl_set_checksum(rg_label, 0);
+	sum = nd_fletcher64(rg_label, sizeof_namespace_label(ndd), 1);
+	rgl_set_checksum(rg_label, sum);
+}
+
 static bool slot_valid(struct nvdimm_drvdata *ndd,
 		struct nd_lsa_label *nd_label, u32 slot)
 {
@@ -1117,6 +1127,138 @@ int nd_pmem_namespace_label_update(struct nd_region *nd_region,
 	return 0;
 }
 
+static int __pmem_region_label_update(struct nd_region *nd_region,
+		struct nd_mapping *nd_mapping, int pos, unsigned long flags)
+{
+	struct nd_interleave_set *nd_set = nd_region->nd_set;
+	struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
+	struct nd_lsa_label *nd_label;
+	struct cxl_region_label *rg_label;
+	struct nd_namespace_index *nsindex;
+	struct nd_label_ent *label_ent;
+	unsigned long *free;
+	u32 nslot, slot;
+	size_t offset;
+	int rc;
+	uuid_t tmp;
+
+	if (!preamble_next(ndd, &nsindex, &free, &nslot))
+		return -ENXIO;
+
+	/* allocate and write the label to the staging (next) index */
+	slot = nd_label_alloc_slot(ndd);
+	if (slot == UINT_MAX)
+		return -ENXIO;
+	dev_dbg(ndd->dev, "allocated: %d\n", slot);
+
+	nd_label = to_label(ndd, slot);
+
+	memset(nd_label, 0, sizeof_namespace_label(ndd));
+	rg_label = &nd_label->rg_label;
+
+	/* Set Region Label Format identification UUID */
+	uuid_parse(CXL_REGION_UUID, &tmp);
+	export_uuid(nd_label->rg_label.type, &tmp);
+
+	/* Set Current Region Label UUID */
+	export_uuid(nd_label->rg_label.uuid, &nd_set->uuid);
+
+	rg_label->flags = __cpu_to_le32(flags);
+	rg_label->nlabel = __cpu_to_le16(nd_region->ndr_mappings);
+	rg_label->position = __cpu_to_le16(pos);
+	rg_label->dpa = __cpu_to_le64(nd_mapping->start);
+	rg_label->rawsize = __cpu_to_le64(nd_mapping->size);
+	rg_label->hpa = __cpu_to_le64(nd_set->res->start);
+	rg_label->slot = __cpu_to_le32(slot);
+	rg_label->ig = __cpu_to_le32(nd_set->interleave_granularity);
+	rg_label->align = __cpu_to_le16(0);
+
+	/* Update fletcher64 Checksum */
+	rgl_calculate_checksum(ndd, rg_label);
+
+	/* update label */
+	offset = nd_label_offset(ndd, nd_label);
+	rc = nvdimm_set_config_data(ndd, offset, nd_label,
+			sizeof_namespace_label(ndd));
+	if (rc < 0) {
+		nd_label_free_slot(ndd, slot);
+		return rc;
+	}
+
+	/* Garbage collect the previous label */
+	mutex_lock(&nd_mapping->lock);
+	list_for_each_entry(label_ent, &nd_mapping->labels, list) {
+		if (!label_ent->label)
+			continue;
+		if (rgl_uuid_equal(&label_ent->label->rg_label, &nd_set->uuid))
+			reap_victim(nd_mapping, label_ent);
+	}
+
+	/* update index */
+	rc = nd_label_write_index(ndd, ndd->ns_next,
+			nd_inc_seq(__le32_to_cpu(nsindex->seq)), 0);
+
+	if (rc == 0) {
+		list_for_each_entry(label_ent, &nd_mapping->labels, list)
+			if (!label_ent->label) {
+				label_ent->label = nd_label;
+				nd_label = NULL;
+				break;
+			}
+		dev_WARN_ONCE(&nd_region->dev, nd_label,
+				"failed to track label: %d\n",
+				to_slot(ndd, nd_label));
+		if (nd_label)
+			rc = -ENXIO;
+	}
+	mutex_unlock(&nd_mapping->lock);
+
+	return rc;
+}
+
+int nd_pmem_region_label_update(struct nd_region *nd_region)
+{
+	int i, rc;
+
+	for (i = 0; i < nd_region->ndr_mappings; i++) {
+		struct nd_mapping *nd_mapping = &nd_region->mapping[i];
+		struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
+
+		/* No need to update region label for non cxl format */
+		if (!ndd->cxl)
+			continue;
+
+		/* Init labels to include region label */
+		rc = init_labels(nd_mapping, 1);
+
+		if (rc < 0)
+			return rc;
+
+		rc = __pmem_region_label_update(nd_region, nd_mapping, i,
+					NSLABEL_FLAG_UPDATING);
+
+		if (rc)
+			return rc;
+	}
+
+	/* Clear the UPDATING flag per UEFI 2.7 expectations */
+	for (i = 0; i < nd_region->ndr_mappings; i++) {
+		struct nd_mapping *nd_mapping = &nd_region->mapping[i];
+		struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
+
+		/* No need to update region label for non cxl format */
+		if (!ndd->cxl)
+			continue;
+
+		rc = __pmem_region_label_update(nd_region, nd_mapping, i, 0);
+
+		if (rc)
+			return rc;
+	}
+
+	return 0;
+}
+
 int __init nd_label_init(void)
 {
 	WARN_ON(guid_parse(NVDIMM_BTT_GUID, &nvdimm_btt_guid));
diff --git a/drivers/nvdimm/label.h b/drivers/nvdimm/label.h
index 4883b3a1320f..0f428695017d 100644
--- a/drivers/nvdimm/label.h
+++ b/drivers/nvdimm/label.h
@@ -190,6 +190,7 @@ struct nd_namespace_label {
 struct nd_lsa_label {
 	union {
 		struct nd_namespace_label ns_label;
+		struct cxl_region_label rg_label;
 	};
 };
 
@@ -233,4 +234,5 @@ struct nd_region;
 struct nd_namespace_pmem;
 int nd_pmem_namespace_label_update(struct nd_region *nd_region,
 		struct nd_namespace_pmem *nspm, resource_size_t size);
+int nd_pmem_region_label_update(struct nd_region *nd_region);
 #endif /* __LABEL_H__ */
diff --git a/drivers/nvdimm/namespace_devs.c b/drivers/nvdimm/namespace_devs.c
index 23b9def71012..6cccb4d2fc7b 100644
--- a/drivers/nvdimm/namespace_devs.c
+++ b/drivers/nvdimm/namespace_devs.c
@@ -232,6 +232,18 @@ static ssize_t __alt_name_store(struct device *dev, const char *buf,
 	return rc;
 }
 
+int nd_region_label_update(struct nd_region *nd_region)
+{
+	int rc;
+
+	nvdimm_bus_lock(&nd_region->dev);
+	rc = nd_pmem_region_label_update(nd_region);
+	nvdimm_bus_unlock(&nd_region->dev);
+
+	return rc;
+}
+EXPORT_SYMBOL_GPL(nd_region_label_update);
+
 static int nd_namespace_label_update(struct nd_region *nd_region,
 		struct device *dev)
 {
diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h
index 07d665f18bf6..2fdc92b29e8a 100644
--- a/drivers/nvdimm/nd.h
+++ b/drivers/nvdimm/nd.h
@@ -322,6 +322,26 @@ static inline void nsl_set_region_uuid(struct nvdimm_drvdata *ndd,
 		export_uuid(ns_label->cxl.region_uuid, uuid);
 }
 
+static inline bool rgl_uuid_equal(struct cxl_region_label *rg_label,
+				  const uuid_t *uuid)
+{
+	uuid_t tmp;
+
+	import_uuid(&tmp, rg_label->uuid);
+	return uuid_equal(&tmp, uuid);
+}
+
+static inline u64 rgl_get_checksum(struct cxl_region_label *rg_label)
+{
+	return __le64_to_cpu(rg_label->checksum);
+}
+
+static inline void rgl_set_checksum(struct cxl_region_label *rg_label,
+				    u64 checksum)
+{
+	rg_label->checksum = __cpu_to_le64(checksum);
+}
+
 bool nsl_validate_type_guid(struct nvdimm_drvdata *ndd,
 			    struct nd_namespace_label *nd_label, guid_t *guid);
 enum nvdimm_claim_class nsl_get_claim_class(struct nvdimm_drvdata *ndd,
diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h
index 0a55900842c8..b06bd45373f4 100644
--- a/include/linux/libnvdimm.h
+++ b/include/linux/libnvdimm.h
@@ -115,6 +115,13 @@ struct nd_interleave_set {
 	u64 altcookie;
 
 	guid_t type_guid;
+
+	/* v2.1 region label info */
+	uuid_t uuid;
+	int interleave_ways;
+	int interleave_granularity;
+	struct resource *res;
+	int nr_targets;
 };
 
 struct nd_mapping_desc {
@@ -302,6 +309,7 @@ int nvdimm_has_flush(struct nd_region *nd_region);
 int nvdimm_has_cache(struct nd_region *nd_region);
 int nvdimm_in_overwrite(struct nvdimm *nvdimm);
 bool is_nvdimm_sync(struct nd_region *nd_region);
+int nd_region_label_update(struct nd_region *nd_region);
 
 static inline int nvdimm_ctl(struct nvdimm *nvdimm, unsigned int cmd, void *buf,
 		unsigned int buf_len, int *cmd_rc)
-- 
2.34.1



  parent reply	other threads:[~2025-06-17 13:00 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20250617124008epcas5p2e702f786645d44ceb1cdd980a914ce8e@epcas5p2.samsung.com>
     [not found] ` <20250617123944.78345-1-s.neeraj@samsung.com>
2025-06-17 12:39   ` [RFC PATCH 01/20] nvdimm/label: Introduce NDD_CXL_LABEL flag to set cxl label format Neeraj Kumar
2025-06-20 16:40     ` Jonathan Cameron
2025-06-26  9:48       ` Neeraj Kumar
2025-07-02 18:02     ` Ira Weiny
2025-07-03  9:58       ` Neeraj Kumar
2025-07-09 22:57     ` Dave Jiang
2025-07-18 12:13       ` Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 02/20] nvdimm/label: Prep patch to accommodate cxl lsa 2.1 support Neeraj Kumar
2025-06-23 10:53     ` Jonathan Cameron
2025-06-26  9:51       ` Neeraj Kumar
2025-07-02 17:55     ` Ira Weiny
2025-07-03 10:04       ` Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 03/20] nvdimm/namespace_label: Add namespace label changes as per CXL LSA v2.1 Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 04/20] nvdimm/label: CXL labels skip the need for 'interleave-set cookie' Neeraj Kumar
2025-06-17 12:39   ` Neeraj Kumar [this message]
2025-06-23  9:05     ` [RFC PATCH 05/20] nvdimm/region_label: Add region label updation routine Jonathan Cameron
2025-06-26  9:54       ` Neeraj Kumar
2025-07-17 22:53     ` Fabio M. De Francesco
2025-07-18 13:00       ` Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 06/20] nvdimm/region_label: Add region label deletion routine Neeraj Kumar
2025-06-23  9:09     ` Jonathan Cameron
2025-06-26  9:55       ` Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 07/20] nvdimm/namespace_label: Update namespace init_labels and its region_uuid Neeraj Kumar
2025-06-23  9:11     ` Jonathan Cameron
2025-06-26  9:58       ` Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 08/20] nvdimm/label: Include region label in slot validation Neeraj Kumar
2025-06-23  9:13     ` Jonathan Cameron
2025-06-26 10:00       ` Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 09/20] nvdimm/namespace_label: Skip region label during ns label DPA reservation Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 10/20] nvdimm/region_label: Preserve cxl region information from region label Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 11/20] nvdimm/region_label: Export routine to fetch region information Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 12/20] nvdimm/namespace_label: Skip region label during namespace creation Neeraj Kumar
2025-06-23  9:17     ` Jonathan Cameron
2025-06-26 10:02       ` Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 13/20] cxl/mem: Refactor cxl pmem region auto-assembling Neeraj Kumar
2025-06-23  9:20     ` Jonathan Cameron
2025-06-26 10:03       ` Neeraj Kumar
2025-07-10  0:38     ` Dave Jiang
2025-07-18 12:30       ` Neeraj Kumar
2025-07-21 18:11         ` Dave Jiang
2025-06-17 12:39   ` [RFC PATCH 14/20] cxl/region: Add cxl pmem region creation routine for region persistency Neeraj Kumar
2025-06-23  9:43     ` Jonathan Cameron
2025-06-26 10:23       ` Neeraj Kumar
2025-07-10 15:59     ` Dave Jiang
2025-07-18 12:45       ` Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 15/20] cxl: Add a routine to find cxl root decoder on cxl bus Neeraj Kumar
2025-06-23  9:44     ` Jonathan Cameron
2025-06-26 10:38       ` Neeraj Kumar
2025-06-26 19:19     ` Alison Schofield
2025-06-27  9:03       ` Neeraj Kumar
2025-07-10 16:23     ` Dave Jiang
2025-07-18 12:48       ` Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 16/20] cxl/mem: Preserve cxl root decoder during mem probe Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 17/20] cxl/pmem: Preserve region information into nd_set Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 18/20] cxl/pmem: Add support of cxl lsa 2.1 support in cxl pmem Neeraj Kumar
2025-06-23  9:48     ` Jonathan Cameron
2025-06-26 10:41       ` Neeraj Kumar
2025-07-10 17:18     ` Dave Jiang
2025-07-18 12:51       ` Neeraj Kumar
2025-07-21 17:44         ` Dave Jiang
2025-06-17 12:39   ` [RFC PATCH 19/20] cxl/pmem_region: Prep patch to accommodate pmem_region attributes Neeraj Kumar
2025-06-23  9:53     ` Jonathan Cameron
2025-06-26 10:45       ` Neeraj Kumar
2025-06-17 12:39   ` [RFC PATCH 20/20] cxl/pmem_region: Add cxl region label updation and deletion device attributes Neeraj Kumar
2025-06-23  9:56     ` Jonathan Cameron
2025-06-26 10:48       ` Neeraj Kumar

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