From: Alejandro Lucero Palau <alucerop@amd.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>,
alejandro.lucero-palau@amd.com
Cc: linux-cxl@vger.kernel.org, netdev@vger.kernel.org,
dan.j.williams@intel.com, martin.habets@xilinx.com,
edward.cree@amd.com, davem@davemloft.net, kuba@kernel.org,
pabeni@redhat.com, edumazet@google.com, dave.jiang@intel.com
Subject: Re: [PATCH v8 02/27] sfc: add cxl support using new CXL API
Date: Fri, 27 Dec 2024 07:00:50 +0000 [thread overview]
Message-ID: <1eeea670-4599-cd13-1d2b-7989c2544338@amd.com> (raw)
In-Reply-To: <20241224170416.00000541@huawei.com>
On 12/24/24 17:04, Jonathan Cameron wrote:
> On Mon, 16 Dec 2024 16:10:17 +0000
> <alejandro.lucero-palau@amd.com> wrote:
>
>> From: Alejandro Lucero <alucerop@amd.com>
>>
>> Add CXL initialization based on new CXL API for accel drivers and make
>> it dependent on kernel CXL configuration.
>>
>> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
>> Reviewed-by: Martin Habets <habetsm.xilinx@gmail.com>
>> Acked-by: Edward Cree <ecree.xilinx@gmail.com>
> Hi Alejandro
>
> A few minor comments inline. Assuming those are tidied up.
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>
>> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
>> new file mode 100644
>> index 000000000000..356d7a977e1c
>> --- /dev/null
>> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
>> @@ -0,0 +1,87 @@
>> +// SPDX-License-Identifier: GPL-2.0-only
>> +/****************************************************************************
>> + *
>> + * Driver for AMD network controllers and boards
>> + * Copyright (C) 2024, Advanced Micro Devices, Inc.
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms of the GNU General Public License version 2 as published
>> + * by the Free Software Foundation, incorporated herein by reference.
>> + */
>> +
>> +#include <cxl/cxl.h>
>> +#include <cxl/pci.h>
>> +#include <linux/pci.h>
>> +
>> +#include "net_driver.h"
>> +#include "efx_cxl.h"
>> +
>> +#define EFX_CTPIO_BUFFER_SIZE SZ_256M
>> +
>> +int efx_cxl_init(struct efx_probe_data *probe_data)
>> +{
>> + struct efx_nic *efx = &probe_data->efx;
>> + struct pci_dev *pci_dev;
>> + struct efx_cxl *cxl;
>> + struct resource res;
>> + u16 dvsec;
>> + int rc;
>> +
>> + pci_dev = efx->pci_dev;
> Trivial, but maybe put that one inline at the declaration above.
Sure.
>> + probe_data->cxl_pio_initialised = false;
>> +
>> + dvsec = pci_find_dvsec_capability(pci_dev, PCI_VENDOR_ID_CXL,
>> + CXL_DVSEC_PCIE_DEVICE);
>> + if (!dvsec)
>> + return 0;
>> +
>> + pci_dbg(pci_dev, "CXL_DVSEC_PCIE_DEVICE capability found\n");
>> +
>> + cxl = kzalloc(sizeof(*cxl), GFP_KERNEL);
>> + if (!cxl)
>> + return -ENOMEM;
>> +
>> + cxl->cxlds = cxl_accel_state_create(&pci_dev->dev);
>> + if (IS_ERR(cxl->cxlds)) {
>> + pci_err(pci_dev, "CXL accel device state failed");
>> + rc = -ENOMEM;
>> + goto err_state;
>> + }
>> +
>> + cxl_set_dvsec(cxl->cxlds, dvsec);
>> + cxl_set_serial(cxl->cxlds, pci_dev->dev.id);
>> +
>> + res = DEFINE_RES_MEM(0, EFX_CTPIO_BUFFER_SIZE);
>> + if (cxl_set_resource(cxl->cxlds, res, CXL_RES_DPA)) {
>> + pci_err(pci_dev, "cxl_set_resource DPA failed\n");
>> + rc = -EINVAL;
>> + goto err_resource_set;
>> + }
>> +
>> + res = DEFINE_RES_MEM_NAMED(0, EFX_CTPIO_BUFFER_SIZE, "ram");
>> + if (cxl_set_resource(cxl->cxlds, res, CXL_RES_RAM)) {
>> + pci_err(pci_dev, "cxl_set_resource RAM failed\n");
>> + rc = -EINVAL;
>> + goto err_resource_set;
>> + }
>> +
>> + probe_data->cxl = cxl;
>> +
>> + return 0;
>> +
>> +err_resource_set:
>> + kfree(cxl->cxlds);
>> +err_state:
>> + kfree(cxl);
>> + return rc;
>> +}
>> +
>> +void efx_cxl_exit(struct efx_probe_data *probe_data)
>> +{
>> + if (probe_data->cxl) {
>> + kfree(probe_data->cxl->cxlds);
>> + kfree(probe_data->cxl);
>> + }
>> +}
>> +
>> +MODULE_IMPORT_NS("CXL");
>> diff --git a/drivers/net/ethernet/sfc/efx_cxl.h b/drivers/net/ethernet/sfc/efx_cxl.h
>> new file mode 100644
>> index 000000000000..90fa46bc94db
>> --- /dev/null
>> +++ b/drivers/net/ethernet/sfc/efx_cxl.h
>> @@ -0,0 +1,28 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/****************************************************************************
>> + * Driver for AMD network controllers and boards
>> + * Copyright (C) 2024, Advanced Micro Devices, Inc.
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms of the GNU General Public License version 2 as published
>> + * by the Free Software Foundation, incorporated herein by reference.
>> + */
>> +
>> +#ifndef EFX_CXL_H
>> +#define EFX_CXL_H
>> +
>> +struct efx_nic;
> Not sure why you need this one, but...
I forgot to remove it after using efx_probe_data instead of efx_nic.
Good catch. I'll remove it.
> struct efx_probe_data;
> struct cxl_dev_state;
> struct cxl_memdev;
>
> etc.
>
> are probably a good idea to avoid potential issues with
> include reorderings in the future.
Yes.
Thanks
>
>> +
>> +struct efx_cxl {
>> + struct cxl_dev_state *cxlds;
>> + struct cxl_memdev *cxlmd;
>> + struct cxl_root_decoder *cxlrd;
>> + struct cxl_port *endpoint;
>> + struct cxl_endpoint_decoder *cxled;
>> + struct cxl_region *efx_region;
>> + void __iomem *ctpio_cxl;
>> +};
>> +
>> +int efx_cxl_init(struct efx_probe_data *probe_data);
>> +void efx_cxl_exit(struct efx_probe_data *probe_data);
>> +#endif
next prev parent reply other threads:[~2024-12-27 7:01 UTC|newest]
Thread overview: 102+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-16 16:10 [PATCH v8 00/27] cxl: add type2 device basic support alejandro.lucero-palau
2024-12-16 16:10 ` [PATCH v8 01/27] " alejandro.lucero-palau
2024-12-24 16:35 ` Jonathan Cameron
2024-12-27 6:56 ` Alejandro Lucero Palau
2025-01-07 16:35 ` Alison Schofield
2025-01-07 23:42 ` Dan Williams
2025-01-08 1:33 ` Dan Williams
2025-01-08 14:32 ` Alejandro Lucero Palau
2025-01-14 14:35 ` Alejandro Lucero Palau
2025-01-14 16:40 ` Alejandro Lucero Palau
2025-01-14 22:52 ` Dan Williams
2025-01-15 16:01 ` Alejandro Lucero Palau
2025-01-16 6:16 ` Dan Williams
2025-01-16 10:02 ` Alejandro Lucero Palau
2025-02-05 20:05 ` Dan Williams
2025-02-06 17:37 ` Alejandro Lucero Palau
2025-02-07 1:57 ` Dan Williams
2025-01-24 13:38 ` Alejandro Lucero Palau
2025-01-08 14:11 ` Alejandro Lucero Palau
2025-01-14 23:48 ` Dan Williams
2024-12-16 16:10 ` [PATCH v8 02/27] sfc: add cxl support using new CXL API alejandro.lucero-palau
2024-12-24 17:04 ` Jonathan Cameron
2024-12-27 7:00 ` Alejandro Lucero Palau [this message]
2025-01-08 1:56 ` Dan Williams
2025-01-08 14:53 ` Alejandro Lucero Palau
2025-01-14 23:59 ` Dan Williams
2024-12-16 16:10 ` [PATCH v8 03/27] cxl: add capabilities field to cxl_dev_state and cxl_port alejandro.lucero-palau
2024-12-24 17:08 ` Jonathan Cameron
2024-12-27 7:07 ` Alejandro Lucero Palau
2025-01-02 12:49 ` Jonathan Cameron
2025-01-03 7:16 ` Alejandro Lucero Palau
2025-01-03 10:47 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 04/27] cxl/pci: add check for validating capabilities alejandro.lucero-palau
2024-12-24 17:15 ` Jonathan Cameron
2024-12-27 7:47 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 05/27] cxl: move pci generic code alejandro.lucero-palau
2024-12-24 17:19 ` Jonathan Cameron
2024-12-27 7:53 ` Alejandro Lucero Palau
2025-01-08 5:19 ` Dan Williams
2025-01-08 14:39 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 06/27] cxl: add function for type2 cxl regs setup alejandro.lucero-palau
2024-12-24 17:22 ` Jonathan Cameron
2024-12-27 8:04 ` Alejandro Lucero Palau
2024-12-30 9:01 ` Alejandro Lucero Palau
2025-01-06 10:41 ` Dan Carpenter
2025-01-06 15:19 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 07/27] sfc: use cxl api for regs setup and checking alejandro.lucero-palau
2024-12-24 17:23 ` Jonathan Cameron
2024-12-27 8:05 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 08/27] cxl: add functions for resource request/release by a driver alejandro.lucero-palau
2024-12-24 17:25 ` Jonathan Cameron
2024-12-27 8:06 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 09/27] sfc: request cxl ram resource alejandro.lucero-palau
2024-12-24 17:27 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 10/27] resource: harden resource_contains alejandro.lucero-palau
2024-12-24 17:27 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 11/27] cxl: add function for setting media ready by a driver alejandro.lucero-palau
2024-12-24 17:29 ` Jonathan Cameron
2024-12-27 8:08 ` Alejandro Lucero Palau
2025-01-02 12:45 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 12/27] sfc: set cxl media ready alejandro.lucero-palau
2024-12-16 16:10 ` [PATCH v8 13/27] cxl: prepare memdev creation for type2 alejandro.lucero-palau
2024-12-24 17:32 ` Jonathan Cameron
2024-12-27 8:28 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 14/27] sfc: create type2 cxl memdev alejandro.lucero-palau
2024-12-24 17:33 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 15/27] cxl: define a driver interface for HPA free space enumeration alejandro.lucero-palau
2024-12-24 17:42 ` Jonathan Cameron
2024-12-27 10:05 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 16/27] sfc: obtain root decoder with enough HPA free space alejandro.lucero-palau
2024-12-18 11:17 ` Edward Cree
2024-12-24 17:43 ` Jonathan Cameron
2024-12-25 20:21 ` kernel test robot
2024-12-16 16:10 ` [PATCH v8 17/27] cxl: define a driver interface for DPA allocation alejandro.lucero-palau
2024-12-24 17:53 ` Jonathan Cameron
2024-12-27 10:23 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 18/27] sfc: get endpoint decoder alejandro.lucero-palau
2024-12-17 10:42 ` Simon Horman
2024-12-18 8:22 ` Alejandro Lucero Palau
2025-01-07 11:34 ` Simon Horman
2024-12-16 16:10 ` [PATCH v8 19/27] cxl: make region type based on endpoint type alejandro.lucero-palau
2024-12-24 17:54 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 20/27] cxl/region: factor out interleave ways setup alejandro.lucero-palau
2024-12-24 17:56 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 21/27] cxl/region: factor out interleave granularity setup alejandro.lucero-palau
2024-12-24 17:56 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 22/27] cxl: allow region creation by type2 drivers alejandro.lucero-palau
2024-12-24 18:01 ` Jonathan Cameron
2024-12-27 10:27 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 23/27] cxl: add region flag for precluding a device memory to be used for dax alejandro.lucero-palau
2024-12-24 18:04 ` Jonathan Cameron
2024-12-27 8:46 ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 24/27] sfc: create cxl region alejandro.lucero-palau
2024-12-24 18:05 ` Jonathan Cameron
2024-12-25 23:58 ` kernel test robot
2024-12-16 16:10 ` [PATCH v8 25/27] cxl: add function for obtaining region range alejandro.lucero-palau
2024-12-24 18:07 ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 26/27] sfc: update MCDI protocol headers alejandro.lucero-palau
2024-12-16 16:10 ` [PATCH v8 27/27] sfc: support pio mapping based on cxl alejandro.lucero-palau
2024-12-17 10:47 ` Simon Horman
2024-12-18 8:32 ` Alejandro Lucero Palau
2024-12-30 12:16 ` Alejandro Lucero Palau
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