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From: Alejandro Lucero Palau <alucerop@amd.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	alejandro.lucero-palau@amd.com
Cc: linux-cxl@vger.kernel.org, netdev@vger.kernel.org,
	dan.j.williams@intel.com, martin.habets@xilinx.com,
	edward.cree@amd.com, davem@davemloft.net, kuba@kernel.org,
	pabeni@redhat.com, edumazet@google.com, dave.jiang@intel.com
Subject: Re: [PATCH v8 13/27] cxl: prepare memdev creation for type2
Date: Fri, 27 Dec 2024 08:28:05 +0000	[thread overview]
Message-ID: <ca3159ce-6063-f10d-a445-1ffaf6560435@amd.com> (raw)
In-Reply-To: <20241224173245.000028aa@huawei.com>


On 12/24/24 17:32, Jonathan Cameron wrote:
> On Mon, 16 Dec 2024 16:10:28 +0000
> alejandro.lucero-palau@amd.com wrote:
>
>> From: Alejandro Lucero <alucerop@amd.com>
>>
>> Current cxl core is relying on a CXL_DEVTYPE_CLASSMEM type device when
>> creating a memdev leading to problems when obtaining cxl_memdev_state
>> references from a CXL_DEVTYPE_DEVMEM type. This last device type is
>> managed by a specific vendor driver and does not need same sysfs files
>> since not userspace intervention is expected.
>>
>> Create a new cxl_mem device type with no attributes for Type2.
>>
>> Avoid debugfs files relying on existence of cxl_memdev_state.
>>
>> Make devm_cxl_add_memdev accesible from a accel driver.
> You've added it to a header, but not removed it from a different
> one. That is generally a bad plan.


That's true. I'll remove it from cxlmem.h


>
> I'm curious on the poison part.  Does your device support the command?
> If so we probably want to think about what is needed to enable that long term.
>
> Jonathan
>

Our device has not a mailbox ...


But you are right. The problem is the structs which, I think, requires a 
refactoring.


This patch is the fastpath for initial type2 support. I hope with new 
clients, and likely with the qemu patch from Zhi for type2, the 
refactoring can be properly done with more exposure to type2 cases.



>> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
>> ---
>>   drivers/cxl/core/cdat.c   |  3 +++
>>   drivers/cxl/core/memdev.c | 14 ++++++++++++--
>>   drivers/cxl/core/region.c |  3 ++-
>>   drivers/cxl/mem.c         | 25 +++++++++++++++++++------
>>   include/cxl/cxl.h         |  2 ++
>>   5 files changed, 38 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/cxl/core/cdat.c b/drivers/cxl/core/cdat.c
>> index 8153f8d83a16..c57bc83e79ee 100644
>> --- a/drivers/cxl/core/cdat.c
>> +++ b/drivers/cxl/core/cdat.c
>> @@ -577,6 +577,9 @@ static struct cxl_dpa_perf *cxled_get_dpa_perf(struct cxl_endpoint_decoder *cxle
>>   	struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds);
>>   	struct cxl_dpa_perf *perf;
>>   
>> +	if (!mds)
>> +		return ERR_PTR(-EINVAL);
>> +
>>   	switch (mode) {
>>   	case CXL_DECODER_RAM:
>>   		perf = &mds->ram_perf;
>> diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c
>> index 82c354b1375e..4d24305624e0 100644
>> --- a/drivers/cxl/core/memdev.c
>> +++ b/drivers/cxl/core/memdev.c
>> @@ -547,9 +547,16 @@ static const struct device_type cxl_memdev_type = {
>>   	.groups = cxl_memdev_attribute_groups,
>>   };
>>   
>> +static const struct device_type cxl_accel_memdev_type = {
>> +	.name = "cxl_accel_memdev",
>> +	.release = cxl_memdev_release,
>> +	.devnode = cxl_memdev_devnode,
>> +};
>> +
>>   bool is_cxl_memdev(const struct device *dev)
>>   {
>> -	return dev->type == &cxl_memdev_type;
>> +	return (dev->type == &cxl_memdev_type ||
>> +		dev->type == &cxl_accel_memdev_type);
>>   }
>>   EXPORT_SYMBOL_NS_GPL(is_cxl_memdev, "CXL");
>>   
>> @@ -660,7 +667,10 @@ static struct cxl_memdev *cxl_memdev_alloc(struct cxl_dev_state *cxlds,
>>   	dev->parent = cxlds->dev;
>>   	dev->bus = &cxl_bus_type;
>>   	dev->devt = MKDEV(cxl_mem_major, cxlmd->id);
>> -	dev->type = &cxl_memdev_type;
>> +	if (cxlds->type == CXL_DEVTYPE_DEVMEM)
>> +		dev->type = &cxl_accel_memdev_type;
>> +	else
>> +		dev->type = &cxl_memdev_type;
>>   	device_set_pm_not_required(dev);
>>   	INIT_WORK(&cxlmd->detach_work, detach_memdev);
>>   
>> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
>> index d77899650798..967132b49832 100644
>> --- a/drivers/cxl/core/region.c
>> +++ b/drivers/cxl/core/region.c
>> @@ -1948,7 +1948,8 @@ static int cxl_region_attach(struct cxl_region *cxlr,
>>   		return -EINVAL;
>>   	}
>>   
>> -	cxl_region_perf_data_calculate(cxlr, cxled);
>> +	if (cxlr->type == CXL_DECODER_HOSTONLYMEM)
>> +		cxl_region_perf_data_calculate(cxlr, cxled);
>>   
>>   	if (test_bit(CXL_REGION_F_AUTO, &cxlr->flags)) {
>>   		int i;
>> diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
>> index 2f03a4d5606e..93106a43990b 100644
>> --- a/drivers/cxl/mem.c
>> +++ b/drivers/cxl/mem.c
>> @@ -130,12 +130,18 @@ static int cxl_mem_probe(struct device *dev)
>>   	dentry = cxl_debugfs_create_dir(dev_name(dev));
>>   	debugfs_create_devm_seqfile(dev, "dpamem", dentry, cxl_mem_dpa_show);
>>   
>> -	if (test_bit(CXL_POISON_ENABLED_INJECT, mds->poison.enabled_cmds))
>> -		debugfs_create_file("inject_poison", 0200, dentry, cxlmd,
>> -				    &cxl_poison_inject_fops);
>> -	if (test_bit(CXL_POISON_ENABLED_CLEAR, mds->poison.enabled_cmds))
>> -		debugfs_create_file("clear_poison", 0200, dentry, cxlmd,
>> -				    &cxl_poison_clear_fops);
>> +	/*
>> +	 * Avoid poison debugfs files for Type2 devices as they rely on
>> +	 * cxl_memdev_state.
>> +	 */
>> +	if (mds) {
>> +		if (test_bit(CXL_POISON_ENABLED_INJECT, mds->poison.enabled_cmds))
>> +			debugfs_create_file("inject_poison", 0200, dentry, cxlmd,
>> +					    &cxl_poison_inject_fops);
>> +		if (test_bit(CXL_POISON_ENABLED_CLEAR, mds->poison.enabled_cmds))
>> +			debugfs_create_file("clear_poison", 0200, dentry, cxlmd,
>> +					    &cxl_poison_clear_fops);
>> +	}
>>   
>>   	rc = devm_add_action_or_reset(dev, remove_debugfs, dentry);
>>   	if (rc)
>> @@ -219,6 +225,13 @@ static umode_t cxl_mem_visible(struct kobject *kobj, struct attribute *a, int n)
>>   	struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
>>   	struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds);
>>   
>> +	/*
>> +	 * Avoid poison sysfs files for Type2 devices as they rely on
>> +	 * cxl_memdev_state.
>> +	 */
>> +	if (!mds)
>> +		return 0;
>> +
>>   	if (a == &dev_attr_trigger_poison_list.attr)
>>   		if (!test_bit(CXL_POISON_ENABLED_LIST,
>>   			      mds->poison.enabled_cmds))
>> diff --git a/include/cxl/cxl.h b/include/cxl/cxl.h
>> index 473128fdfb22..26d7735b5f31 100644
>> --- a/include/cxl/cxl.h
>> +++ b/include/cxl/cxl.h
>> @@ -45,4 +45,6 @@ int cxl_pci_accel_setup_regs(struct pci_dev *pdev, struct cxl_dev_state *cxlds);
>>   int cxl_request_resource(struct cxl_dev_state *cxlds, enum cxl_resource type);
>>   int cxl_release_resource(struct cxl_dev_state *cxlds, enum cxl_resource type);
>>   void cxl_set_media_ready(struct cxl_dev_state *cxlds);
>> +struct cxl_memdev *devm_cxl_add_memdev(struct device *host,
>> +				       struct cxl_dev_state *cxlds);
>>   #endif

  reply	other threads:[~2024-12-27  8:28 UTC|newest]

Thread overview: 102+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-16 16:10 [PATCH v8 00/27] cxl: add type2 device basic support alejandro.lucero-palau
2024-12-16 16:10 ` [PATCH v8 01/27] " alejandro.lucero-palau
2024-12-24 16:35   ` Jonathan Cameron
2024-12-27  6:56     ` Alejandro Lucero Palau
2025-01-07 16:35   ` Alison Schofield
2025-01-07 23:42   ` Dan Williams
2025-01-08  1:33     ` Dan Williams
2025-01-08 14:32       ` Alejandro Lucero Palau
2025-01-14 14:35         ` Alejandro Lucero Palau
2025-01-14 16:40           ` Alejandro Lucero Palau
2025-01-14 22:52           ` Dan Williams
2025-01-15 16:01             ` Alejandro Lucero Palau
2025-01-16  6:16               ` Dan Williams
2025-01-16 10:02                 ` Alejandro Lucero Palau
2025-02-05 20:05             ` Dan Williams
2025-02-06 17:37               ` Alejandro Lucero Palau
2025-02-07  1:57                 ` Dan Williams
2025-01-24 13:38       ` Alejandro Lucero Palau
2025-01-08 14:11     ` Alejandro Lucero Palau
2025-01-14 23:48       ` Dan Williams
2024-12-16 16:10 ` [PATCH v8 02/27] sfc: add cxl support using new CXL API alejandro.lucero-palau
2024-12-24 17:04   ` Jonathan Cameron
2024-12-27  7:00     ` Alejandro Lucero Palau
2025-01-08  1:56   ` Dan Williams
2025-01-08 14:53     ` Alejandro Lucero Palau
2025-01-14 23:59       ` Dan Williams
2024-12-16 16:10 ` [PATCH v8 03/27] cxl: add capabilities field to cxl_dev_state and cxl_port alejandro.lucero-palau
2024-12-24 17:08   ` Jonathan Cameron
2024-12-27  7:07     ` Alejandro Lucero Palau
2025-01-02 12:49       ` Jonathan Cameron
2025-01-03  7:16         ` Alejandro Lucero Palau
2025-01-03 10:47           ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 04/27] cxl/pci: add check for validating capabilities alejandro.lucero-palau
2024-12-24 17:15   ` Jonathan Cameron
2024-12-27  7:47     ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 05/27] cxl: move pci generic code alejandro.lucero-palau
2024-12-24 17:19   ` Jonathan Cameron
2024-12-27  7:53     ` Alejandro Lucero Palau
2025-01-08  5:19   ` Dan Williams
2025-01-08 14:39     ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 06/27] cxl: add function for type2 cxl regs setup alejandro.lucero-palau
2024-12-24 17:22   ` Jonathan Cameron
2024-12-27  8:04     ` Alejandro Lucero Palau
2024-12-30  9:01       ` Alejandro Lucero Palau
2025-01-06 10:41   ` Dan Carpenter
2025-01-06 15:19     ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 07/27] sfc: use cxl api for regs setup and checking alejandro.lucero-palau
2024-12-24 17:23   ` Jonathan Cameron
2024-12-27  8:05     ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 08/27] cxl: add functions for resource request/release by a driver alejandro.lucero-palau
2024-12-24 17:25   ` Jonathan Cameron
2024-12-27  8:06     ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 09/27] sfc: request cxl ram resource alejandro.lucero-palau
2024-12-24 17:27   ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 10/27] resource: harden resource_contains alejandro.lucero-palau
2024-12-24 17:27   ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 11/27] cxl: add function for setting media ready by a driver alejandro.lucero-palau
2024-12-24 17:29   ` Jonathan Cameron
2024-12-27  8:08     ` Alejandro Lucero Palau
2025-01-02 12:45       ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 12/27] sfc: set cxl media ready alejandro.lucero-palau
2024-12-16 16:10 ` [PATCH v8 13/27] cxl: prepare memdev creation for type2 alejandro.lucero-palau
2024-12-24 17:32   ` Jonathan Cameron
2024-12-27  8:28     ` Alejandro Lucero Palau [this message]
2024-12-16 16:10 ` [PATCH v8 14/27] sfc: create type2 cxl memdev alejandro.lucero-palau
2024-12-24 17:33   ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 15/27] cxl: define a driver interface for HPA free space enumeration alejandro.lucero-palau
2024-12-24 17:42   ` Jonathan Cameron
2024-12-27 10:05     ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 16/27] sfc: obtain root decoder with enough HPA free space alejandro.lucero-palau
2024-12-18 11:17   ` Edward Cree
2024-12-24 17:43   ` Jonathan Cameron
2024-12-25 20:21   ` kernel test robot
2024-12-16 16:10 ` [PATCH v8 17/27] cxl: define a driver interface for DPA allocation alejandro.lucero-palau
2024-12-24 17:53   ` Jonathan Cameron
2024-12-27 10:23     ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 18/27] sfc: get endpoint decoder alejandro.lucero-palau
2024-12-17 10:42   ` Simon Horman
2024-12-18  8:22     ` Alejandro Lucero Palau
2025-01-07 11:34       ` Simon Horman
2024-12-16 16:10 ` [PATCH v8 19/27] cxl: make region type based on endpoint type alejandro.lucero-palau
2024-12-24 17:54   ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 20/27] cxl/region: factor out interleave ways setup alejandro.lucero-palau
2024-12-24 17:56   ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 21/27] cxl/region: factor out interleave granularity setup alejandro.lucero-palau
2024-12-24 17:56   ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 22/27] cxl: allow region creation by type2 drivers alejandro.lucero-palau
2024-12-24 18:01   ` Jonathan Cameron
2024-12-27 10:27     ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 23/27] cxl: add region flag for precluding a device memory to be used for dax alejandro.lucero-palau
2024-12-24 18:04   ` Jonathan Cameron
2024-12-27  8:46     ` Alejandro Lucero Palau
2024-12-16 16:10 ` [PATCH v8 24/27] sfc: create cxl region alejandro.lucero-palau
2024-12-24 18:05   ` Jonathan Cameron
2024-12-25 23:58   ` kernel test robot
2024-12-16 16:10 ` [PATCH v8 25/27] cxl: add function for obtaining region range alejandro.lucero-palau
2024-12-24 18:07   ` Jonathan Cameron
2024-12-16 16:10 ` [PATCH v8 26/27] sfc: update MCDI protocol headers alejandro.lucero-palau
2024-12-16 16:10 ` [PATCH v8 27/27] sfc: support pio mapping based on cxl alejandro.lucero-palau
2024-12-17 10:47   ` Simon Horman
2024-12-18  8:32     ` Alejandro Lucero Palau
2024-12-30 12:16       ` Alejandro Lucero Palau

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