Re: [PATCH 1/3] cxl/pci: Store memory capacity values

[Ben Widawsky <ben.widawsky@intel.com>]

On 21-06-11 10:26:34, Dan Williams wrote:
> On Thu, Jun 10, 2021 at 5:22 PM <ira.weiny@intel.com> wrote:
> >
> > From: Ira Weiny <ira.weiny@intel.com>
> >
> > The Identify Memory Device command returns information about the
> > volatile and persistent memory capacities.  Store those values in the
> > cxl_mem structure for later use.  While at it, reuse the calculation of
> > the volatile and persistent memory byte values to calculate the ram and
> > pmem ranges.
> >
> > Signed-off-by: Ira Weiny <ira.weiny@intel.com>
> > ---
> >  drivers/cxl/mem.h |  4 ++++
> >  drivers/cxl/pci.c | 36 +++++++++++++++++++++++++++++++++---
> >  2 files changed, 37 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/cxl/mem.h b/drivers/cxl/mem.h
> > index 13868ff7cadf..8bd0d0506b97 100644
> > --- a/drivers/cxl/mem.h
> > +++ b/drivers/cxl/mem.h
> > @@ -75,5 +75,9 @@ struct cxl_mem {
> >
> >         struct range pmem_range;
> >         struct range ram_range;
> > +       u64 total_cap_bytes;
> > +       u64 volatile_cap_bytes;
> > +       u64 persistent_cap_bytes;
> 
> Hmm, why these fields?
> 
> I would expect pmem_range and ram_range can already represent these
> values and range_len(pmem_range) + range_len(ram_range) == total
> capacity.

So the way Ira described it (AIUI), pmem_range will be the total partitioned
amount, while persistent_cap_bytes is min(info.persistent capacity, pmem_range)
(same for volatile). But perhaps I misunderstood.