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From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <ben.widawsky@intel.com>,
	<ira.weiny@intel.com>, <vishal.l.verma@intel.com>,
	<alison.schofield@intel.com>
Subject: Re: [PATCH v2 3/6] cxl/mem: Make cxl_dvsec_range() init failure fatal
Date: Fri, 25 Mar 2022 11:39:35 +0000	[thread overview]
Message-ID: <20220325113935.00004dcb@huawei.com> (raw)
In-Reply-To: <164730735324.3806189.4167509857771192422.stgit@dwillia2-desk3.amr.corp.intel.com>

On Mon, 14 Mar 2022 18:22:33 -0700
Dan Williams <dan.j.williams@intel.com> wrote:

> In preparation for the cxl_pci driver to continue operation after
> cxl_dvsec_range() failure, update cxl_mem to check for negative error
> codes in info->ranges. Treat that condition as fatal regardless of the
> state of the HDM configuration since cxl_mem needs positive confirmation
> that legacy ranges were not established by platform firmware or another
> agent.
> 
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com.

> ---
>  drivers/cxl/mem.c |    3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
> index cd4e8bba82aa..50704deb2ff0 100644
> --- a/drivers/cxl/mem.c
> +++ b/drivers/cxl/mem.c
> @@ -88,6 +88,9 @@ __mock bool cxl_dvsec_decode_init(struct cxl_dev_state *cxlds)
>  	void __iomem *crb;
>  	u32 global_ctrl;
>  
> +	if (info->ranges < 0)
> +		return false;
> +
>  	/* map hdm decoder */
>  	crb = ioremap(cxlds->component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE);
>  	if (!crb) {
> 


  parent reply	other threads:[~2022-03-25 11:39 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-15  1:22 [PATCH v2 0/6] cxl: Handle DVSEC range init failures Dan Williams
2022-03-15  1:22 ` [PATCH v2 1/6] cxl/mem: Drop DVSEC vs EFI Memory Map sanity check Dan Williams
2022-03-17 17:33   ` Ben Widawsky
2022-03-25 11:34   ` Jonathan Cameron
2022-03-15  1:22 ` [PATCH v2 2/6] cxl/pci: Add debug for DVSEC range init failures Dan Williams
2022-03-17 17:36   ` Ben Widawsky
2022-03-25 11:38   ` Jonathan Cameron
2022-03-15  1:22 ` [PATCH v2 3/6] cxl/mem: Make cxl_dvsec_range() init failure fatal Dan Williams
2022-03-16  2:00   ` Davidlohr Bueso
2022-03-16  2:14     ` Dan Williams
2022-03-17 17:49   ` Ben Widawsky
2022-03-25 11:39   ` Jonathan Cameron [this message]
2022-03-15  1:22 ` [PATCH v2 4/6] cxl/pci: Make cxl_dvsec_ranges() failure not fatal to cxl_pci Dan Williams
2022-03-17 17:52   ` Ben Widawsky
2022-03-17 18:20     ` Dan Williams
2022-03-17 18:29       ` Ben Widawsky
2022-03-17 18:30         ` Dan Williams
2022-03-25 11:47   ` Jonathan Cameron
2022-03-15  1:22 ` [PATCH v2 5/6] cxl/mem: Rename cxl_dvsec_decode_init() to cxl_hdm_decode_init() Dan Williams
2022-03-17 17:54   ` Ben Widawsky
2022-03-17 18:45     ` Dan Williams
2022-03-25 11:50   ` Jonathan Cameron
2022-03-15  1:22 ` [PATCH v2 6/6] cxl/mem: Replace redundant debug message with a comment Dan Williams
2022-03-25 11:54   ` Jonathan Cameron
2022-04-08 19:30   ` [PATCH v3 " Dan Williams
2022-03-17  0:39 ` [PATCH v2 0/6] cxl: Handle DVSEC range init failures Davidlohr Bueso

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