Re: [PATCH v2 0/2] CXL XOR Interleave Arithmetic

[Alison Schofield <alison.schofield@intel.com>]

On Thu, Aug 11, 2022 at 01:49:10PM -0700, Schofield, Alison wrote:
> From: Alison Schofield <alison.schofield@intel.com>
> 
> Changes in v2:
> - Use ilog2() of the decoded interleave ways to determine number
> of xormaps, instead of using encoded ways directly. This fixes
> 3, 6, and 12 way interleaves. (Dan)
> 

Dan - Thanks for the message about this breaking 3-6-12.
New version in the works.

> 
> Add support for the new 'XOR' Interleave Arithmetic as defined
> in the CXL 3.0 Specification [1].
> 
> A linux-ized ACPI patch is included here for reference. The actual
> pull request is pending at https://github.com/acpica/acpica/pull/787
> 
> [1]: https://www.computeexpresslink.org/download-the-specification
> 
> 
> Alison Schofield (2):
>   For ACPICA: Add the CXIMS structure definition to the CEDT table
>   cxl/acpi: Support CXL XOR Interleave Math (CXIMS)
> 
>  include/acpi/actbl1.h | 14 ++++++-
>  drivers/cxl/cxl.h     |  2 +
>  drivers/cxl/acpi.c    | 94 ++++++++++++++++++++++++++++++++++++++++---
>  3 files changed, 104 insertions(+), 6 deletions(-)
> 
> 
> base-commit: 1cd8a2537eb07751d405ab7e2223f20338a90506
> -- 
> 2.31.1
>