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From: alison.schofield@intel.com
To: Dan Williams <dan.j.williams@intel.com>,
	Ira Weiny <ira.weiny@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	Ben Widawsky <bwidawsk@kernel.org>,
	Dave Jiang <dave.jiang@intel.com>
Cc: Alison Schofield <alison.schofield@intel.com>, linux-cxl@vger.kernel.org
Subject: [PATCH v2 0/2] CXL XOR Interleave Arithmetic
Date: Thu, 11 Aug 2022 13:49:10 -0700	[thread overview]
Message-ID: <cover.1660250360.git.alison.schofield@intel.com> (raw)

From: Alison Schofield <alison.schofield@intel.com>

Changes in v2:
- Use ilog2() of the decoded interleave ways to determine number
of xormaps, instead of using encoded ways directly. This fixes
3, 6, and 12 way interleaves. (Dan)


Add support for the new 'XOR' Interleave Arithmetic as defined
in the CXL 3.0 Specification [1].

A linux-ized ACPI patch is included here for reference. The actual
pull request is pending at https://github.com/acpica/acpica/pull/787

[1]: https://www.computeexpresslink.org/download-the-specification


Alison Schofield (2):
  For ACPICA: Add the CXIMS structure definition to the CEDT table
  cxl/acpi: Support CXL XOR Interleave Math (CXIMS)

 include/acpi/actbl1.h | 14 ++++++-
 drivers/cxl/cxl.h     |  2 +
 drivers/cxl/acpi.c    | 94 ++++++++++++++++++++++++++++++++++++++++---
 3 files changed, 104 insertions(+), 6 deletions(-)


base-commit: 1cd8a2537eb07751d405ab7e2223f20338a90506
-- 
2.31.1


             reply	other threads:[~2022-08-11 20:51 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-11 20:49 alison.schofield [this message]
2022-08-11 20:49 ` [PATCH v2 1/2] For ACPICA: Add the CXIMS structure definition to the CEDT table alison.schofield
2022-08-11 20:49 ` [PATCH v2 2/2] cxl/acpi: Support CXL XOR Interleave Math (CXIMS) alison.schofield
2022-08-12  4:30 ` [PATCH v2 0/2] CXL XOR Interleave Arithmetic Alison Schofield

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