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* [PATCH v2] cxl: update names for interleave granularity conversion macros
@ 2022-10-12 17:23 Dave Jiang
  2022-10-13 12:21 ` Jonathan Cameron
  0 siblings, 1 reply; 6+ messages in thread
From: Dave Jiang @ 2022-10-12 17:23 UTC (permalink / raw)
  To: linux-cxl; +Cc: dan.j.williams, ira.weiny, vishal.l.verma, alison.schofield

Change names for granularity macros to clearly indicate which
variable is encoded and which is the actual granularity.

granularity == interleave granularity
enig == encoded interleave granularity

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---

v2:
- change ig to granularity for better clarificiation (Alison)

 drivers/cxl/acpi.c        |    2 +-
 drivers/cxl/core/hdm.c    |    6 +++---
 drivers/cxl/core/region.c |    6 +++---
 drivers/cxl/cxl.h         |   12 ++++++------
 4 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
index fb649683dd3a..5664411c3198 100644
--- a/drivers/cxl/acpi.c
+++ b/drivers/cxl/acpi.c
@@ -105,7 +105,7 @@ static int cxl_parse_cfmws(union acpi_subtable_headers *header, void *arg,
 	rc = cxl_to_ways(cfmws->interleave_ways, &ways);
 	if (rc)
 		return rc;
-	rc = cxl_to_granularity(cfmws->granularity, &ig);
+	rc = enig_to_granularity(cfmws->granularity, &ig);
 	if (rc)
 		return rc;
 	for (i = 0; i < ways; i++)
diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
index d1d2caea5c62..626cb7d66194 100644
--- a/drivers/cxl/core/hdm.c
+++ b/drivers/cxl/core/hdm.c
@@ -492,7 +492,7 @@ static void cxld_set_interleave(struct cxl_decoder *cxld, u32 *ctrl)
 	if (WARN_ONCE(ways_to_cxl(cxld->interleave_ways, &eiw),
 		      "invalid interleave_ways: %d\n", cxld->interleave_ways))
 		return;
-	if (WARN_ONCE(granularity_to_cxl(cxld->interleave_granularity, &eig),
+	if (WARN_ONCE(granularity_to_enig(cxld->interleave_granularity, &eig),
 		      "invalid interleave_granularity: %d\n",
 		      cxld->interleave_granularity))
 		return;
@@ -744,8 +744,8 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
 			 port->id, cxld->id, ctrl);
 		return rc;
 	}
-	rc = cxl_to_granularity(FIELD_GET(CXL_HDM_DECODER0_CTRL_IG_MASK, ctrl),
-				&cxld->interleave_granularity);
+	rc = enig_to_granularity(FIELD_GET(CXL_HDM_DECODER0_CTRL_IG_MASK, ctrl),
+				 &cxld->interleave_granularity);
 	if (rc)
 		return rc;
 
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index 401148016978..34590f961740 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -390,7 +390,7 @@ static ssize_t interleave_granularity_store(struct device *dev,
 	if (rc)
 		return rc;
 
-	rc = granularity_to_cxl(val, &ig);
+	rc = granularity_to_enig(val, &ig);
 	if (rc)
 		return rc;
 
@@ -1002,7 +1002,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
 		parent_iw = parent_cxld->interleave_ways;
 	}
 
-	rc = granularity_to_cxl(parent_ig, &peig);
+	rc = granularity_to_enig(parent_ig, &peig);
 	if (rc) {
 		dev_dbg(&cxlr->dev, "%s:%s: invalid parent granularity: %d\n",
 			dev_name(parent_port->uport),
@@ -1039,7 +1039,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
 		eig = peig;
 	}
 
-	rc = cxl_to_granularity(eig, &ig);
+	rc = enig_to_granularity(eig, &ig);
 	if (rc) {
 		dev_dbg(&cxlr->dev, "%s:%s: invalid interleave: %d\n",
 			dev_name(port->uport), dev_name(&port->dev),
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index f680450f0b16..ef6cc63c06ef 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -69,11 +69,11 @@ static inline int cxl_hdm_decoder_count(u32 cap_hdr)
 }
 
 /* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */
-static inline int cxl_to_granularity(u16 ig, unsigned int *val)
+static inline int enig_to_granularity(u16 enig, unsigned int *granularity)
 {
-	if (ig > 6)
+	if (enig > 6)
 		return -EINVAL;
-	*val = 256 << ig;
+	*granularity = 256 << enig;
 	return 0;
 }
 
@@ -94,11 +94,11 @@ static inline int cxl_to_ways(u8 eniw, unsigned int *val)
 	return 0;
 }
 
-static inline int granularity_to_cxl(int g, u16 *ig)
+static inline int granularity_to_enig(int granularity, u16 *enig)
 {
-	if (g > SZ_16K || g < 256 || !is_power_of_2(g))
+	if (granularity > SZ_16K || granularity < 256 || !is_power_of_2(granularity))
 		return -EINVAL;
-	*ig = ilog2(g) - 8;
+	*enig = ilog2(granularity) - 8;
 	return 0;
 }
 



^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] cxl: update names for interleave granularity conversion macros
  2022-10-12 17:23 [PATCH v2] cxl: update names for interleave granularity conversion macros Dave Jiang
@ 2022-10-13 12:21 ` Jonathan Cameron
  2022-10-22 21:49   ` Dan Williams
  0 siblings, 1 reply; 6+ messages in thread
From: Jonathan Cameron @ 2022-10-13 12:21 UTC (permalink / raw)
  To: Dave Jiang
  Cc: linux-cxl, dan.j.williams, ira.weiny, vishal.l.verma,
	alison.schofield

On Wed, 12 Oct 2022 10:23:23 -0700
Dave Jiang <dave.jiang@intel.com> wrote:

> Change names for granularity macros to clearly indicate which
> variable is encoded and which is the actual granularity.
> 
> granularity == interleave granularity
> enig == encoded interleave granularity

I'm not that bothered, but just wanted to note we have uses
of eig for this already.  Maybe better to pick either enig or
eig throughout ?

Either way it's an improvement ;)

> 
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

> ---
> 
> v2:
> - change ig to granularity for better clarificiation (Alison)
> 
>  drivers/cxl/acpi.c        |    2 +-
>  drivers/cxl/core/hdm.c    |    6 +++---
>  drivers/cxl/core/region.c |    6 +++---
>  drivers/cxl/cxl.h         |   12 ++++++------
>  4 files changed, 13 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
> index fb649683dd3a..5664411c3198 100644
> --- a/drivers/cxl/acpi.c
> +++ b/drivers/cxl/acpi.c
> @@ -105,7 +105,7 @@ static int cxl_parse_cfmws(union acpi_subtable_headers *header, void *arg,
>  	rc = cxl_to_ways(cfmws->interleave_ways, &ways);
>  	if (rc)
>  		return rc;
> -	rc = cxl_to_granularity(cfmws->granularity, &ig);
> +	rc = enig_to_granularity(cfmws->granularity, &ig);
>  	if (rc)
>  		return rc;
>  	for (i = 0; i < ways; i++)
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index d1d2caea5c62..626cb7d66194 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -492,7 +492,7 @@ static void cxld_set_interleave(struct cxl_decoder *cxld, u32 *ctrl)
>  	if (WARN_ONCE(ways_to_cxl(cxld->interleave_ways, &eiw),
>  		      "invalid interleave_ways: %d\n", cxld->interleave_ways))
>  		return;
> -	if (WARN_ONCE(granularity_to_cxl(cxld->interleave_granularity, &eig),
> +	if (WARN_ONCE(granularity_to_enig(cxld->interleave_granularity, &eig),
>  		      "invalid interleave_granularity: %d\n",
>  		      cxld->interleave_granularity))
>  		return;
> @@ -744,8 +744,8 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
>  			 port->id, cxld->id, ctrl);
>  		return rc;
>  	}
> -	rc = cxl_to_granularity(FIELD_GET(CXL_HDM_DECODER0_CTRL_IG_MASK, ctrl),
> -				&cxld->interleave_granularity);
> +	rc = enig_to_granularity(FIELD_GET(CXL_HDM_DECODER0_CTRL_IG_MASK, ctrl),
> +				 &cxld->interleave_granularity);
>  	if (rc)
>  		return rc;
>  
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index 401148016978..34590f961740 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -390,7 +390,7 @@ static ssize_t interleave_granularity_store(struct device *dev,
>  	if (rc)
>  		return rc;
>  
> -	rc = granularity_to_cxl(val, &ig);
> +	rc = granularity_to_enig(val, &ig);
>  	if (rc)
>  		return rc;
>  
> @@ -1002,7 +1002,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
>  		parent_iw = parent_cxld->interleave_ways;
>  	}
>  
> -	rc = granularity_to_cxl(parent_ig, &peig);
> +	rc = granularity_to_enig(parent_ig, &peig);
>  	if (rc) {
>  		dev_dbg(&cxlr->dev, "%s:%s: invalid parent granularity: %d\n",
>  			dev_name(parent_port->uport),
> @@ -1039,7 +1039,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
>  		eig = peig;
>  	}
>  
> -	rc = cxl_to_granularity(eig, &ig);
> +	rc = enig_to_granularity(eig, &ig);
>  	if (rc) {
>  		dev_dbg(&cxlr->dev, "%s:%s: invalid interleave: %d\n",
>  			dev_name(port->uport), dev_name(&port->dev),
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index f680450f0b16..ef6cc63c06ef 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -69,11 +69,11 @@ static inline int cxl_hdm_decoder_count(u32 cap_hdr)
>  }
>  
>  /* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */
> -static inline int cxl_to_granularity(u16 ig, unsigned int *val)
> +static inline int enig_to_granularity(u16 enig, unsigned int *granularity)
>  {
> -	if (ig > 6)
> +	if (enig > 6)
>  		return -EINVAL;
> -	*val = 256 << ig;
> +	*granularity = 256 << enig;
>  	return 0;
>  }
>  
> @@ -94,11 +94,11 @@ static inline int cxl_to_ways(u8 eniw, unsigned int *val)
>  	return 0;
>  }
>  
> -static inline int granularity_to_cxl(int g, u16 *ig)
> +static inline int granularity_to_enig(int granularity, u16 *enig)
>  {
> -	if (g > SZ_16K || g < 256 || !is_power_of_2(g))
> +	if (granularity > SZ_16K || granularity < 256 || !is_power_of_2(granularity))
>  		return -EINVAL;
> -	*ig = ilog2(g) - 8;
> +	*enig = ilog2(granularity) - 8;
>  	return 0;
>  }
>  
> 
> 


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] cxl: update names for interleave granularity conversion macros
  2022-10-13 12:21 ` Jonathan Cameron
@ 2022-10-22 21:49   ` Dan Williams
  2022-10-24 15:49     ` Dave Jiang
  0 siblings, 1 reply; 6+ messages in thread
From: Dan Williams @ 2022-10-22 21:49 UTC (permalink / raw)
  To: Jonathan Cameron, Dave Jiang
  Cc: linux-cxl, dan.j.williams, ira.weiny, vishal.l.verma,
	alison.schofield

Jonathan Cameron wrote:
> On Wed, 12 Oct 2022 10:23:23 -0700
> Dave Jiang <dave.jiang@intel.com> wrote:
> 
> > Change names for granularity macros to clearly indicate which
> > variable is encoded and which is the actual granularity.
> > 
> > granularity == interleave granularity
> > enig == encoded interleave granularity
> 
> I'm not that bothered, but just wanted to note we have uses
> of eig for this already.  Maybe better to pick either enig or
> eig throughout ?

Yes, please 'eig' already exists for this purpose, and I would keep the
cxl_ prefix. Same on the 'eiw' patch.

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] cxl: update names for interleave granularity conversion macros
  2022-10-22 21:49   ` Dan Williams
@ 2022-10-24 15:49     ` Dave Jiang
  0 siblings, 0 replies; 6+ messages in thread
From: Dave Jiang @ 2022-10-24 15:49 UTC (permalink / raw)
  To: Dan Williams, Jonathan Cameron
  Cc: linux-cxl, ira.weiny, vishal.l.verma, alison.schofield


On 10/22/2022 2:49 PM, Dan Williams wrote:
> Jonathan Cameron wrote:
>> On Wed, 12 Oct 2022 10:23:23 -0700
>> Dave Jiang <dave.jiang@intel.com> wrote:
>>
>>> Change names for granularity macros to clearly indicate which
>>> variable is encoded and which is the actual granularity.
>>>
>>> granularity == interleave granularity
>>> enig == encoded interleave granularity
>> I'm not that bothered, but just wanted to note we have uses
>> of eig for this already.  Maybe better to pick either enig or
>> eig throughout ?
> Yes, please 'eig' already exists for this purpose, and I would keep the
> cxl_ prefix. Same on the 'eiw' patch.

Ok I'll update those. Seems like my mail client ate Jonathan's response 
on these. :(


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH v2] cxl: update names for interleave granularity conversion macros
@ 2022-10-24 16:54 Dave Jiang
  2022-10-24 21:41 ` Dave Jiang
  0 siblings, 1 reply; 6+ messages in thread
From: Dave Jiang @ 2022-10-24 16:54 UTC (permalink / raw)
  To: linux-cxl
  Cc: dan.j.williams, ira.weiny, vishal.l.verma, alison.schofield,
	Jonathan.Cameron

Change names for granularity macros to clearly indicate which
variable is encoded and which is the actual granularity.

granularity == interleave granularity
eig == encoded interleave granularity

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---

v2:
- Change enig to eig. (Jonathan, Dan)

 drivers/cxl/acpi.c        |    2 +-
 drivers/cxl/core/hdm.c    |    6 +++---
 drivers/cxl/core/region.c |    6 +++---
 drivers/cxl/cxl.h         |   12 ++++++------
 4 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
index fb649683dd3a..9434f8333287 100644
--- a/drivers/cxl/acpi.c
+++ b/drivers/cxl/acpi.c
@@ -105,7 +105,7 @@ static int cxl_parse_cfmws(union acpi_subtable_headers *header, void *arg,
 	rc = cxl_to_ways(cfmws->interleave_ways, &ways);
 	if (rc)
 		return rc;
-	rc = cxl_to_granularity(cfmws->granularity, &ig);
+	rc = eig_to_granularity(cfmws->granularity, &ig);
 	if (rc)
 		return rc;
 	for (i = 0; i < ways; i++)
diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
index d1d2caea5c62..a04ce9e6e186 100644
--- a/drivers/cxl/core/hdm.c
+++ b/drivers/cxl/core/hdm.c
@@ -492,7 +492,7 @@ static void cxld_set_interleave(struct cxl_decoder *cxld, u32 *ctrl)
 	if (WARN_ONCE(ways_to_cxl(cxld->interleave_ways, &eiw),
 		      "invalid interleave_ways: %d\n", cxld->interleave_ways))
 		return;
-	if (WARN_ONCE(granularity_to_cxl(cxld->interleave_granularity, &eig),
+	if (WARN_ONCE(granularity_to_eig(cxld->interleave_granularity, &eig),
 		      "invalid interleave_granularity: %d\n",
 		      cxld->interleave_granularity))
 		return;
@@ -744,8 +744,8 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
 			 port->id, cxld->id, ctrl);
 		return rc;
 	}
-	rc = cxl_to_granularity(FIELD_GET(CXL_HDM_DECODER0_CTRL_IG_MASK, ctrl),
-				&cxld->interleave_granularity);
+	rc = eig_to_granularity(FIELD_GET(CXL_HDM_DECODER0_CTRL_IG_MASK, ctrl),
+				 &cxld->interleave_granularity);
 	if (rc)
 		return rc;
 
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index 401148016978..df294a6fd2c9 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -390,7 +390,7 @@ static ssize_t interleave_granularity_store(struct device *dev,
 	if (rc)
 		return rc;
 
-	rc = granularity_to_cxl(val, &ig);
+	rc = granularity_to_eig(val, &ig);
 	if (rc)
 		return rc;
 
@@ -1002,7 +1002,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
 		parent_iw = parent_cxld->interleave_ways;
 	}
 
-	rc = granularity_to_cxl(parent_ig, &peig);
+	rc = granularity_to_eig(parent_ig, &peig);
 	if (rc) {
 		dev_dbg(&cxlr->dev, "%s:%s: invalid parent granularity: %d\n",
 			dev_name(parent_port->uport),
@@ -1039,7 +1039,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
 		eig = peig;
 	}
 
-	rc = cxl_to_granularity(eig, &ig);
+	rc = eig_to_granularity(eig, &ig);
 	if (rc) {
 		dev_dbg(&cxlr->dev, "%s:%s: invalid interleave: %d\n",
 			dev_name(port->uport), dev_name(&port->dev),
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index f680450f0b16..dacb1d769dae 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -69,11 +69,11 @@ static inline int cxl_hdm_decoder_count(u32 cap_hdr)
 }
 
 /* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */
-static inline int cxl_to_granularity(u16 ig, unsigned int *val)
+static inline int eig_to_granularity(u16 eig, unsigned int *granularity)
 {
-	if (ig > 6)
+	if (eig > 6)
 		return -EINVAL;
-	*val = 256 << ig;
+	*granularity = 256 << eig;
 	return 0;
 }
 
@@ -94,11 +94,11 @@ static inline int cxl_to_ways(u8 eniw, unsigned int *val)
 	return 0;
 }
 
-static inline int granularity_to_cxl(int g, u16 *ig)
+static inline int granularity_to_eig(int granularity, u16 *eig)
 {
-	if (g > SZ_16K || g < 256 || !is_power_of_2(g))
+	if (granularity > SZ_16K || granularity < 256 || !is_power_of_2(granularity))
 		return -EINVAL;
-	*ig = ilog2(g) - 8;
+	*eig = ilog2(granularity) - 8;
 	return 0;
 }
 



^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] cxl: update names for interleave granularity conversion macros
  2022-10-24 16:54 Dave Jiang
@ 2022-10-24 21:41 ` Dave Jiang
  0 siblings, 0 replies; 6+ messages in thread
From: Dave Jiang @ 2022-10-24 21:41 UTC (permalink / raw)
  To: linux-cxl
  Cc: dan.j.williams, ira.weiny, vishal.l.verma, alison.schofield,
	Jonathan.Cameron


On 10/24/2022 9:54 AM, Dave Jiang wrote:
> Change names for granularity macros to clearly indicate which
> variable is encoded and which is the actual granularity.
>
> granularity == interleave granularity
> eig == encoded interleave granularity
>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> ---
>
> v2:
> - Change enig to eig. (Jonathan, Dan)

Sigh. This should be v3. And I need to pick up Jonathan's review tags 
that I didn't see. Will send fixed.


>
>   drivers/cxl/acpi.c        |    2 +-
>   drivers/cxl/core/hdm.c    |    6 +++---
>   drivers/cxl/core/region.c |    6 +++---
>   drivers/cxl/cxl.h         |   12 ++++++------
>   4 files changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
> index fb649683dd3a..9434f8333287 100644
> --- a/drivers/cxl/acpi.c
> +++ b/drivers/cxl/acpi.c
> @@ -105,7 +105,7 @@ static int cxl_parse_cfmws(union acpi_subtable_headers *header, void *arg,
>   	rc = cxl_to_ways(cfmws->interleave_ways, &ways);
>   	if (rc)
>   		return rc;
> -	rc = cxl_to_granularity(cfmws->granularity, &ig);
> +	rc = eig_to_granularity(cfmws->granularity, &ig);
>   	if (rc)
>   		return rc;
>   	for (i = 0; i < ways; i++)
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index d1d2caea5c62..a04ce9e6e186 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -492,7 +492,7 @@ static void cxld_set_interleave(struct cxl_decoder *cxld, u32 *ctrl)
>   	if (WARN_ONCE(ways_to_cxl(cxld->interleave_ways, &eiw),
>   		      "invalid interleave_ways: %d\n", cxld->interleave_ways))
>   		return;
> -	if (WARN_ONCE(granularity_to_cxl(cxld->interleave_granularity, &eig),
> +	if (WARN_ONCE(granularity_to_eig(cxld->interleave_granularity, &eig),
>   		      "invalid interleave_granularity: %d\n",
>   		      cxld->interleave_granularity))
>   		return;
> @@ -744,8 +744,8 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
>   			 port->id, cxld->id, ctrl);
>   		return rc;
>   	}
> -	rc = cxl_to_granularity(FIELD_GET(CXL_HDM_DECODER0_CTRL_IG_MASK, ctrl),
> -				&cxld->interleave_granularity);
> +	rc = eig_to_granularity(FIELD_GET(CXL_HDM_DECODER0_CTRL_IG_MASK, ctrl),
> +				 &cxld->interleave_granularity);
>   	if (rc)
>   		return rc;
>   
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index 401148016978..df294a6fd2c9 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -390,7 +390,7 @@ static ssize_t interleave_granularity_store(struct device *dev,
>   	if (rc)
>   		return rc;
>   
> -	rc = granularity_to_cxl(val, &ig);
> +	rc = granularity_to_eig(val, &ig);
>   	if (rc)
>   		return rc;
>   
> @@ -1002,7 +1002,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
>   		parent_iw = parent_cxld->interleave_ways;
>   	}
>   
> -	rc = granularity_to_cxl(parent_ig, &peig);
> +	rc = granularity_to_eig(parent_ig, &peig);
>   	if (rc) {
>   		dev_dbg(&cxlr->dev, "%s:%s: invalid parent granularity: %d\n",
>   			dev_name(parent_port->uport),
> @@ -1039,7 +1039,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
>   		eig = peig;
>   	}
>   
> -	rc = cxl_to_granularity(eig, &ig);
> +	rc = eig_to_granularity(eig, &ig);
>   	if (rc) {
>   		dev_dbg(&cxlr->dev, "%s:%s: invalid interleave: %d\n",
>   			dev_name(port->uport), dev_name(&port->dev),
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index f680450f0b16..dacb1d769dae 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -69,11 +69,11 @@ static inline int cxl_hdm_decoder_count(u32 cap_hdr)
>   }
>   
>   /* Encode defined in CXL 2.0 8.2.5.12.7 HDM Decoder Control Register */
> -static inline int cxl_to_granularity(u16 ig, unsigned int *val)
> +static inline int eig_to_granularity(u16 eig, unsigned int *granularity)
>   {
> -	if (ig > 6)
> +	if (eig > 6)
>   		return -EINVAL;
> -	*val = 256 << ig;
> +	*granularity = 256 << eig;
>   	return 0;
>   }
>   
> @@ -94,11 +94,11 @@ static inline int cxl_to_ways(u8 eniw, unsigned int *val)
>   	return 0;
>   }
>   
> -static inline int granularity_to_cxl(int g, u16 *ig)
> +static inline int granularity_to_eig(int granularity, u16 *eig)
>   {
> -	if (g > SZ_16K || g < 256 || !is_power_of_2(g))
> +	if (granularity > SZ_16K || granularity < 256 || !is_power_of_2(granularity))
>   		return -EINVAL;
> -	*ig = ilog2(g) - 8;
> +	*eig = ilog2(granularity) - 8;
>   	return 0;
>   }
>   
>
>

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2022-10-24 23:21 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-10-12 17:23 [PATCH v2] cxl: update names for interleave granularity conversion macros Dave Jiang
2022-10-13 12:21 ` Jonathan Cameron
2022-10-22 21:49   ` Dan Williams
2022-10-24 15:49     ` Dave Jiang
  -- strict thread matches above, loose matches on Subject: below --
2022-10-24 16:54 Dave Jiang
2022-10-24 21:41 ` Dave Jiang

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