From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <nvdimm@lists.linux.dev>,
<dan.j.williams@intel.com>, <ira.weiny@intel.com>,
<vishal.l.verma@intel.com>, <alison.schofield@intel.com>,
<dave@stgolabs.net>
Subject: Re: [PATCH v3 14/18] cxl/pmem: add id attribute to CXL based nvdimm
Date: Fri, 11 Nov 2022 10:39:52 +0000 [thread overview]
Message-ID: <20221111103952.00005560@Huawei.com> (raw)
In-Reply-To: <166792840255.3767969.7931186352678182941.stgit@djiang5-desk3.ch.intel.com>
On Tue, 08 Nov 2022 10:26:42 -0700
Dave Jiang <dave.jiang@intel.com> wrote:
> Add an id group attribute for CXL based nvdimm object. The addition allows
> ndctl to display the "unique id" for the nvdimm. The serial number for the
> CXL memory device will be used for this id.
>
> [
> {
> "dev":"nmem10",
> "id":"0x4",
> "security":"disabled"
> },
> ]
>
> The id attribute is needed by the ndctl security key management to setup a
> keyblob with a unique file name tied to the mem device.
>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---
> Documentation/ABI/testing/sysfs-bus-nvdimm | 6 ++++++
> drivers/cxl/pmem.c | 28 +++++++++++++++++++++++++++-
> 2 files changed, 33 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/ABI/testing/sysfs-bus-nvdimm b/Documentation/ABI/testing/sysfs-bus-nvdimm
> index 1c1f5acbf53d..91945211e53b 100644
> --- a/Documentation/ABI/testing/sysfs-bus-nvdimm
> +++ b/Documentation/ABI/testing/sysfs-bus-nvdimm
> @@ -41,3 +41,9 @@ KernelVersion: 5.18
> Contact: Kajol Jain <kjain@linux.ibm.com>
> Description: (RO) This sysfs file exposes the cpumask which is designated to
> to retrieve nvdimm pmu event counter data.
> +
> +What: /sys/bus/nd/devices/nmemX/id
> +Date: November 2022
> +KernelVersion: 6.2
> +Contact: Dave Jiang <dave.jiang@intel.com>
> +Description: (RO) Show the id (serial) of the device.
> diff --git a/drivers/cxl/pmem.c b/drivers/cxl/pmem.c
> index 24bec4ca3866..9209c7dd72d0 100644
> --- a/drivers/cxl/pmem.c
> +++ b/drivers/cxl/pmem.c
> @@ -48,6 +48,31 @@ static void unregister_nvdimm(void *nvdimm)
> cxl_nvd->bridge = NULL;
> }
>
> +static ssize_t id_show(struct device *dev, struct device_attribute *attr, char *buf)
> +{
> + struct nvdimm *nvdimm = to_nvdimm(dev);
> + struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
> + struct cxl_dev_state *cxlds = cxl_nvd->cxlmd->cxlds;
> +
> + return sysfs_emit(buf, "%lld\n", cxlds->serial);
> +}
> +static DEVICE_ATTR_RO(id);
> +
> +static struct attribute *cxl_dimm_attributes[] = {
> + &dev_attr_id.attr,
> + NULL
> +};
> +
> +static const struct attribute_group cxl_dimm_attribute_group = {
> + .name = "cxl",
> + .attrs = cxl_dimm_attributes,
> +};
> +
> +static const struct attribute_group *cxl_dimm_attribute_groups[] = {
> + &cxl_dimm_attribute_group,
> + NULL
> +};
> +
> static int cxl_nvdimm_probe(struct device *dev)
> {
> struct cxl_nvdimm *cxl_nvd = to_cxl_nvdimm(dev);
> @@ -77,7 +102,8 @@ static int cxl_nvdimm_probe(struct device *dev)
> set_bit(ND_CMD_GET_CONFIG_SIZE, &cmd_mask);
> set_bit(ND_CMD_GET_CONFIG_DATA, &cmd_mask);
> set_bit(ND_CMD_SET_CONFIG_DATA, &cmd_mask);
> - nvdimm = __nvdimm_create(cxl_nvb->nvdimm_bus, cxl_nvd, NULL, flags,
> + nvdimm = __nvdimm_create(cxl_nvb->nvdimm_bus, cxl_nvd,
> + cxl_dimm_attribute_groups, flags,
> cmd_mask, 0, NULL, NULL, cxl_security_ops, NULL);
> if (!nvdimm) {
> rc = -ENOMEM;
>
>
next prev parent reply other threads:[~2022-11-11 10:40 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-08 17:25 [PATCH v3 00/18] Introduce security commands for CXL pmem device Dave Jiang
2022-11-08 17:25 ` [PATCH v3 01/18] cxl/pmem: Introduce nvdimm_security_ops with ->get_flags() operation Dave Jiang
2022-11-08 17:25 ` [PATCH v3 02/18] tools/testing/cxl: Add "Get Security State" opcode support Dave Jiang
2022-11-08 17:25 ` [PATCH v3 03/18] cxl/pmem: Add "Set Passphrase" security command support Dave Jiang
2022-11-08 17:25 ` [PATCH v3 04/18] tools/testing/cxl: Add "Set Passphrase" opcode support Dave Jiang
2022-11-08 17:25 ` [PATCH v3 05/18] cxl/pmem: Add Disable Passphrase security command support Dave Jiang
2022-11-08 17:25 ` [PATCH v3 06/18] tools/testing/cxl: Add "Disable" security opcode support Dave Jiang
2022-11-08 17:26 ` [PATCH v3 07/18] cxl/pmem: Add "Freeze Security State" security command support Dave Jiang
2022-11-08 17:26 ` [PATCH v3 08/18] tools/testing/cxl: Add "Freeze Security State" security opcode support Dave Jiang
2022-11-11 10:31 ` Jonathan Cameron
2022-11-08 17:26 ` [PATCH v3 09/18] cxl/pmem: Add "Unlock" security command support Dave Jiang
2022-11-08 17:26 ` [PATCH v3 10/18] tools/testing/cxl: Add "Unlock" security opcode support Dave Jiang
2022-11-08 17:26 ` [PATCH v3 11/18] cxl/pmem: Add "Passphrase Secure Erase" security command support Dave Jiang
2022-11-11 10:33 ` Jonathan Cameron
2022-11-08 17:26 ` [PATCH v3 12/18] tools/testing/cxl: Add "passphrase secure erase" opcode support Dave Jiang
2022-11-11 10:37 ` Jonathan Cameron
2022-11-14 18:15 ` Dave Jiang
2022-11-08 17:26 ` [PATCH v3 13/18] nvdimm/cxl/pmem: Add support for master passphrase disable security command Dave Jiang
2022-11-11 10:39 ` Jonathan Cameron
2022-11-08 17:26 ` [PATCH v3 14/18] cxl/pmem: add id attribute to CXL based nvdimm Dave Jiang
2022-11-11 10:39 ` Jonathan Cameron [this message]
2022-11-08 17:26 ` [PATCH v3 15/18] tools/testing/cxl: add mechanism to lock mem device for testing Dave Jiang
2022-11-11 10:40 ` Jonathan Cameron
2022-11-08 17:26 ` [PATCH v3 16/18] cxl/pmem: add provider name to cxl pmem dimm attribute group Dave Jiang
2022-11-11 10:41 ` Jonathan Cameron
2022-11-08 17:27 ` [PATCH v3 17/18] libnvdimm: Introduce CONFIG_NVDIMM_SECURITY_TEST flag Dave Jiang
2022-11-11 10:43 ` Jonathan Cameron
2022-11-08 17:27 ` [PATCH v3 18/18] cxl: add dimm_id support for __nvdimm_create() Dave Jiang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221111103952.00005560@Huawei.com \
--to=jonathan.cameron@huawei.com \
--cc=alison.schofield@intel.com \
--cc=dan.j.williams@intel.com \
--cc=dave.jiang@intel.com \
--cc=dave@stgolabs.net \
--cc=ira.weiny@intel.com \
--cc=linux-cxl@vger.kernel.org \
--cc=nvdimm@lists.linux.dev \
--cc=vishal.l.verma@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox