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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <dan.j.williams@intel.com>,
	<ira.weiny@intel.com>, <vishal.l.verma@intel.com>,
	<alison.schofield@intel.com>
Subject: Re: [PATCH v3 6/8] cxl: create emulated decoders for devices without HDM decoders
Date: Mon, 23 Jan 2023 14:07:51 +0000	[thread overview]
Message-ID: <20230123140751.00007fe4@Huawei.com> (raw)
In-Reply-To: <167406535137.1455071.12470540886828540377.stgit@djiang5-mobl3.local>

On Wed, 18 Jan 2023 11:09:12 -0700
Dave Jiang <dave.jiang@intel.com> wrote:

> CXL rev3.0 spec 8.1.3
> 
> RCDs may not have HDM register blocks. Create fake decoders based on CXL
> PCIe DVSEC registers. The DVSEC Range Registers provide the memory range
> for these decoder structs. For the RCD, there can be up to 2 decoders
> depending on the DVSEC Capability register HDM_count.
> 
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
FWIW
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> 
> ---
> v3:
> - Drop unrelated bits from patch. (Jonathan)
> ---
>  drivers/cxl/core/hdm.c |    7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index 86fe1be2e961..cbec955db4c9 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -748,6 +748,13 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
>  	if (is_endpoint_decoder(&cxld->dev))
>  		cxled = to_cxl_endpoint_decoder(&cxld->dev);
>  
> +	if (!hdm) {
> +		if (!cxled)
> +			return -EINVAL;
> +
> +		return cxl_setup_hdm_decoder_from_dvsec(port, cxld, which, info);
> +	}
> +
>  	ctrl = readl(hdm + CXL_HDM_DECODER0_CTRL_OFFSET(which));
>  	base = ioread64_hi_lo(hdm + CXL_HDM_DECODER0_BASE_LOW_OFFSET(which));
>  	size = ioread64_hi_lo(hdm + CXL_HDM_DECODER0_SIZE_LOW_OFFSET(which));
> 
> 


  reply	other threads:[~2023-01-23 14:08 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-18 18:08 [PATCH v3 0/8] cxl: Introduce HDM decoder emulation from DVSEC range registers Dave Jiang
2023-01-18 18:08 ` [PATCH v3 1/8] cxl: break out range register decoding from cxl_hdm_decode_init() Dave Jiang
2023-02-07 21:55   ` Dan Williams
2023-02-07 21:58     ` Dan Williams
2023-02-07 22:22       ` Dave Jiang
2023-01-18 18:08 ` [PATCH v3 2/8] cxl: export cxl_dvsec_rr_decode() to cxl_port Dave Jiang
2023-02-07 22:26   ` Dan Williams
2023-01-18 18:08 ` [PATCH v3 3/8] cxl: refactor cxl_hdm_decode_init() Dave Jiang
2023-02-07 22:30   ` Dan Williams
2023-01-18 18:08 ` [PATCH v3 4/8] cxl: emulate HDM decoder from DVSEC range registers Dave Jiang
2023-02-07 22:39   ` Dan Williams
2023-02-07 22:48     ` Dave Jiang
2023-01-18 18:09 ` [PATCH v3 5/8] cxl: create emulated cxl_hdm for devices that do not have HDM decoders Dave Jiang
2023-02-08  0:53   ` Dan Williams
2023-01-18 18:09 ` [PATCH v3 6/8] cxl: create emulated decoders for devices without " Dave Jiang
2023-01-23 14:07   ` Jonathan Cameron [this message]
2023-02-08  0:55   ` Dan Williams
2023-01-18 18:09 ` [PATCH v3 7/8] cxl: Add emulation when HDM decoders are not committed Dave Jiang
2023-02-08  1:04   ` Dan Williams
2023-01-18 18:09 ` [PATCH v3 8/8] cxl: remove locked check for dvsec_range_allowed() Dave Jiang
2023-02-08  1:37   ` Dan Williams

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