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From: Dave Jiang <dave.jiang@intel.com>
To: Dan Williams <dan.j.williams@intel.com>, linux-cxl@vger.kernel.org
Cc: ira.weiny@intel.com, vishal.l.verma@intel.com,
	alison.schofield@intel.com, jonathan.cameron@huawei.com
Subject: Re: [PATCH v3 1/8] cxl: break out range register decoding from cxl_hdm_decode_init()
Date: Tue, 7 Feb 2023 15:22:51 -0700	[thread overview]
Message-ID: <3ef63f7b-7ea0-607d-0a16-f6f3fbb94905@intel.com> (raw)
In-Reply-To: <63e2c9933a27e_e3dae29415@dwillia2-xfh.jf.intel.com.notmuch>



On 2/7/23 2:58 PM, Dan Williams wrote:
> Dan Williams wrote:
>> Dave Jiang wrote:
>>> There are 2 scenarios that requires additional handling. 1. A device that
>>> has active ranges in DVSEC range registers (RR) but no HDM decoder register
>>> block. 2. A device that has both RR active and HDM, but the HDM decoders
>>> are not programmed. The goal is to create emulated decoder software structs
>>> based on the RR.
>>>
>>> Move the CXL DVSEC range register decoding code block from
>>> cxl_hdm_decode_init() to its own function. Refactor code in preparation for
>>> the HDM decoder emulation.  There is no functionality change to the code.
>>> Name the new function to cxl_dvsec_rr_decode().
>>>
>>> The only change is to set range->start and range->end to CXL_RESOURCE_NONE
>>> and skipping the reading of base registers if the range size is 0, which
>>> equates to range not active.
>>>
>>> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>>> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
>>>
>>> ---
>>> v2:
>>> - Refactor to continue when size is 0. (Jonathan)
>>> ---
>>>   drivers/cxl/core/pci.c |   63 ++++++++++++++++++++++++++++++------------------
>>>   1 file changed, 40 insertions(+), 23 deletions(-)
>>>
>>> diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
>>> index 57764e9cd19d..a8ecc6ddb3d7 100644
>>> --- a/drivers/cxl/core/pci.c
>>> +++ b/drivers/cxl/core/pci.c
>> [..]
>>> @@ -410,6 +400,13 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm)
>>>   			return rc;
>>>   
>>>   		size |= temp & CXL_DVSEC_MEM_SIZE_LOW_MASK;
>>> +		if (!size) {
>>> +			info->dvsec_range[i] = (struct range) {
>>> +				.start = CXL_RESOURCE_NONE,
>>> +				.end = CXL_RESOURCE_NONE,
>>> +			};
>>
>> This should just be .start = 0, and .end = -1, or .start =
>> CXL_RESOURCE_NONE, and .end = CXL_RESOURCE_NONE - 1, right? Otherwise,
>> range_len() on this range will be non-zero. Likely moot because the
>> range will be skipped because @ranges++ gets skipped, but it looks
>> strange written this way.
> 
> Actually, IIUC, this update can just be deleted altogether because
> @ranges++ being skipped already invalidates this entry.

Ok, I'll remove and fix the follow on code bits that relies on this.

  reply	other threads:[~2023-02-07 22:23 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-18 18:08 [PATCH v3 0/8] cxl: Introduce HDM decoder emulation from DVSEC range registers Dave Jiang
2023-01-18 18:08 ` [PATCH v3 1/8] cxl: break out range register decoding from cxl_hdm_decode_init() Dave Jiang
2023-02-07 21:55   ` Dan Williams
2023-02-07 21:58     ` Dan Williams
2023-02-07 22:22       ` Dave Jiang [this message]
2023-01-18 18:08 ` [PATCH v3 2/8] cxl: export cxl_dvsec_rr_decode() to cxl_port Dave Jiang
2023-02-07 22:26   ` Dan Williams
2023-01-18 18:08 ` [PATCH v3 3/8] cxl: refactor cxl_hdm_decode_init() Dave Jiang
2023-02-07 22:30   ` Dan Williams
2023-01-18 18:08 ` [PATCH v3 4/8] cxl: emulate HDM decoder from DVSEC range registers Dave Jiang
2023-02-07 22:39   ` Dan Williams
2023-02-07 22:48     ` Dave Jiang
2023-01-18 18:09 ` [PATCH v3 5/8] cxl: create emulated cxl_hdm for devices that do not have HDM decoders Dave Jiang
2023-02-08  0:53   ` Dan Williams
2023-01-18 18:09 ` [PATCH v3 6/8] cxl: create emulated decoders for devices without " Dave Jiang
2023-01-23 14:07   ` Jonathan Cameron
2023-02-08  0:55   ` Dan Williams
2023-01-18 18:09 ` [PATCH v3 7/8] cxl: Add emulation when HDM decoders are not committed Dave Jiang
2023-02-08  1:04   ` Dan Williams
2023-01-18 18:09 ` [PATCH v3 8/8] cxl: remove locked check for dvsec_range_allowed() Dave Jiang
2023-02-08  1:37   ` Dan Williams

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