* [PATCH] cxl/hdm: Avoid NULL deref when component registers are missing
@ 2023-03-29 21:35 Dan Williams
2023-03-29 23:59 ` Dave Jiang
2023-03-30 17:19 ` Jonathan Cameron
0 siblings, 2 replies; 7+ messages in thread
From: Dan Williams @ 2023-03-29 21:35 UTC (permalink / raw)
To: linux-cxl; +Cc: Dave Jiang
The cxl_port driver attempts to support endpoint devices that do not
advertise a component register block, but by inspection
devm_cxl_setup_hdm() passes a NULL @crb to helper functions that should
be skipped.
Return early and skip setting target_count since that is only relevant
for switch decoders, not endpoint decoders.
Fixes: 757f6448b100 ("cxl/hdm: Fix double allocation of @cxlhdm")
Tested-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
---
drivers/cxl/core/hdm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
index 5293fe13fce3..cc123996b1a4 100644
--- a/drivers/cxl/core/hdm.c
+++ b/drivers/cxl/core/hdm.c
@@ -123,7 +123,7 @@ struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port,
crb = ioremap(port->component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE);
if (!crb && info && info->mem_enabled) {
cxlhdm->decoder_count = info->ranges;
- cxlhdm->target_count = info->ranges;
+ return cxlhdm;
} else if (!crb) {
dev_err(dev, "No component registers mapped\n");
return ERR_PTR(-ENXIO);
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] cxl/hdm: Avoid NULL deref when component registers are missing
2023-03-29 21:35 [PATCH] cxl/hdm: Avoid NULL deref when component registers are missing Dan Williams
@ 2023-03-29 23:59 ` Dave Jiang
2023-03-30 17:19 ` Jonathan Cameron
1 sibling, 0 replies; 7+ messages in thread
From: Dave Jiang @ 2023-03-29 23:59 UTC (permalink / raw)
To: Dan Williams, linux-cxl
On 3/29/23 2:35 PM, Dan Williams wrote:
> The cxl_port driver attempts to support endpoint devices that do not
> advertise a component register block, but by inspection
> devm_cxl_setup_hdm() passes a NULL @crb to helper functions that should
> be skipped.
>
> Return early and skip setting target_count since that is only relevant
> for switch decoders, not endpoint decoders.
>
> Fixes: 757f6448b100 ("cxl/hdm: Fix double allocation of @cxlhdm")
> Tested-by: Dave Jiang <dave.jiang@intel.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> ---
> drivers/cxl/core/hdm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index 5293fe13fce3..cc123996b1a4 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -123,7 +123,7 @@ struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port,
> crb = ioremap(port->component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE);
> if (!crb && info && info->mem_enabled) {
> cxlhdm->decoder_count = info->ranges;
> - cxlhdm->target_count = info->ranges;
> + return cxlhdm;
> } else if (!crb) {
> dev_err(dev, "No component registers mapped\n");
> return ERR_PTR(-ENXIO);
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] cxl/hdm: Avoid NULL deref when component registers are missing
2023-03-29 21:35 [PATCH] cxl/hdm: Avoid NULL deref when component registers are missing Dan Williams
2023-03-29 23:59 ` Dave Jiang
@ 2023-03-30 17:19 ` Jonathan Cameron
2023-03-30 18:19 ` Dan Williams
1 sibling, 1 reply; 7+ messages in thread
From: Jonathan Cameron @ 2023-03-30 17:19 UTC (permalink / raw)
To: Dan Williams; +Cc: linux-cxl, Dave Jiang
On Wed, 29 Mar 2023 14:35:43 -0700
Dan Williams <dan.j.williams@intel.com> wrote:
> The cxl_port driver attempts to support endpoint devices that do not
> advertise a component register block, but by inspection
> devm_cxl_setup_hdm() passes a NULL @crb to helper functions that should
> be skipped.
>
> Return early and skip setting target_count since that is only relevant
> for switch decoders, not endpoint decoders.
This is a good observation. It would be nice to not read it for the
HDM decoder path either. Obviously we don't use it so that doesn't do
any harm, but to someone reading the code it looks like we care about the
value. I'm not immediately sure how we'd establish at this layer that
the HDM decoder is a switch or HB one though..
>
> Fixes: 757f6448b100 ("cxl/hdm: Fix double allocation of @cxlhdm")
> Tested-by: Dave Jiang <dave.jiang@intel.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Patch looks fine to me.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---
> drivers/cxl/core/hdm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index 5293fe13fce3..cc123996b1a4 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -123,7 +123,7 @@ struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port,
> crb = ioremap(port->component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE);
> if (!crb && info && info->mem_enabled) {
> cxlhdm->decoder_count = info->ranges;
> - cxlhdm->target_count = info->ranges;
> + return cxlhdm;
> } else if (!crb) {
> dev_err(dev, "No component registers mapped\n");
> return ERR_PTR(-ENXIO);
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] cxl/hdm: Avoid NULL deref when component registers are missing
2023-03-30 17:19 ` Jonathan Cameron
@ 2023-03-30 18:19 ` Dan Williams
2023-03-30 18:27 ` Jonathan Cameron
0 siblings, 1 reply; 7+ messages in thread
From: Dan Williams @ 2023-03-30 18:19 UTC (permalink / raw)
To: Jonathan Cameron, Dan Williams; +Cc: linux-cxl, Dave Jiang
Jonathan Cameron wrote:
> On Wed, 29 Mar 2023 14:35:43 -0700
> Dan Williams <dan.j.williams@intel.com> wrote:
>
> > The cxl_port driver attempts to support endpoint devices that do not
> > advertise a component register block, but by inspection
> > devm_cxl_setup_hdm() passes a NULL @crb to helper functions that should
> > be skipped.
> >
> > Return early and skip setting target_count since that is only relevant
> > for switch decoders, not endpoint decoders.
>
> This is a good observation. It would be nice to not read it for the
> HDM decoder path either. Obviously we don't use it so that doesn't do
> any harm, but to someone reading the code it looks like we care about the
> value. I'm not immediately sure how we'd establish at this layer that
> the HDM decoder is a switch or HB one though..
@info is NULL when this routine is called for non-endpoint decoders.
> > Fixes: 757f6448b100 ("cxl/hdm: Fix double allocation of @cxlhdm")
> > Tested-by: Dave Jiang <dave.jiang@intel.com>
> > Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> Patch looks fine to me.
>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] cxl/hdm: Avoid NULL deref when component registers are missing
2023-03-30 18:19 ` Dan Williams
@ 2023-03-30 18:27 ` Jonathan Cameron
2023-03-30 18:49 ` Dan Williams
0 siblings, 1 reply; 7+ messages in thread
From: Jonathan Cameron @ 2023-03-30 18:27 UTC (permalink / raw)
To: Dan Williams; +Cc: linux-cxl, Dave Jiang
On Thu, 30 Mar 2023 11:19:42 -0700
Dan Williams <dan.j.williams@intel.com> wrote:
> Jonathan Cameron wrote:
> > On Wed, 29 Mar 2023 14:35:43 -0700
> > Dan Williams <dan.j.williams@intel.com> wrote:
> >
> > > The cxl_port driver attempts to support endpoint devices that do not
> > > advertise a component register block, but by inspection
> > > devm_cxl_setup_hdm() passes a NULL @crb to helper functions that should
> > > be skipped.
> > >
> > > Return early and skip setting target_count since that is only relevant
> > > for switch decoders, not endpoint decoders.
> >
> > This is a good observation. It would be nice to not read it for the
> > HDM decoder path either. Obviously we don't use it so that doesn't do
> > any harm, but to someone reading the code it looks like we care about the
> > value. I'm not immediately sure how we'd establish at this layer that
> > the HDM decoder is a switch or HB one though..
>
> @info is NULL when this routine is called for non-endpoint decoders.
Ah, so we could pass a flag into parse_hdm_decoder_caps() and not read
the value if it has no meaning for the particular decoder.
>
> > > Fixes: 757f6448b100 ("cxl/hdm: Fix double allocation of @cxlhdm")
> > > Tested-by: Dave Jiang <dave.jiang@intel.com>
> > > Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> > Patch looks fine to me.
> >
> > Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] cxl/hdm: Avoid NULL deref when component registers are missing
2023-03-30 18:27 ` Jonathan Cameron
@ 2023-03-30 18:49 ` Dan Williams
2023-03-30 19:04 ` Jonathan Cameron
0 siblings, 1 reply; 7+ messages in thread
From: Dan Williams @ 2023-03-30 18:49 UTC (permalink / raw)
To: Jonathan Cameron, Dan Williams; +Cc: linux-cxl, Dave Jiang
Jonathan Cameron wrote:
> On Thu, 30 Mar 2023 11:19:42 -0700
> Dan Williams <dan.j.williams@intel.com> wrote:
>
> > Jonathan Cameron wrote:
> > > On Wed, 29 Mar 2023 14:35:43 -0700
> > > Dan Williams <dan.j.williams@intel.com> wrote:
> > >
> > > > The cxl_port driver attempts to support endpoint devices that do not
> > > > advertise a component register block, but by inspection
> > > > devm_cxl_setup_hdm() passes a NULL @crb to helper functions that should
> > > > be skipped.
> > > >
> > > > Return early and skip setting target_count since that is only relevant
> > > > for switch decoders, not endpoint decoders.
> > >
> > > This is a good observation. It would be nice to not read it for the
> > > HDM decoder path either. Obviously we don't use it so that doesn't do
> > > any harm, but to someone reading the code it looks like we care about the
> > > value. I'm not immediately sure how we'd establish at this layer that
> > > the HDM decoder is a switch or HB one though..
> >
> > @info is NULL when this routine is called for non-endpoint decoders.
>
> Ah, so we could pass a flag into parse_hdm_decoder_caps() and not read
> the value if it has no meaning for the particular decoder.
How about kerneldoc on 'struct cxl_hdm' clarifying @target_count and
other fields, because I don't see the benefit of logic to skip parsing
that field. The overhead of an MMIO cycle to read the capability
register has already been spent.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] cxl/hdm: Avoid NULL deref when component registers are missing
2023-03-30 18:49 ` Dan Williams
@ 2023-03-30 19:04 ` Jonathan Cameron
0 siblings, 0 replies; 7+ messages in thread
From: Jonathan Cameron @ 2023-03-30 19:04 UTC (permalink / raw)
To: Dan Williams; +Cc: linux-cxl, Dave Jiang
On Thu, 30 Mar 2023 11:49:26 -0700
Dan Williams <dan.j.williams@intel.com> wrote:
> Jonathan Cameron wrote:
> > On Thu, 30 Mar 2023 11:19:42 -0700
> > Dan Williams <dan.j.williams@intel.com> wrote:
> >
> > > Jonathan Cameron wrote:
> > > > On Wed, 29 Mar 2023 14:35:43 -0700
> > > > Dan Williams <dan.j.williams@intel.com> wrote:
> > > >
> > > > > The cxl_port driver attempts to support endpoint devices that do not
> > > > > advertise a component register block, but by inspection
> > > > > devm_cxl_setup_hdm() passes a NULL @crb to helper functions that should
> > > > > be skipped.
> > > > >
> > > > > Return early and skip setting target_count since that is only relevant
> > > > > for switch decoders, not endpoint decoders.
> > > >
> > > > This is a good observation. It would be nice to not read it for the
> > > > HDM decoder path either. Obviously we don't use it so that doesn't do
> > > > any harm, but to someone reading the code it looks like we care about the
> > > > value. I'm not immediately sure how we'd establish at this layer that
> > > > the HDM decoder is a switch or HB one though..
> > >
> > > @info is NULL when this routine is called for non-endpoint decoders.
> >
> > Ah, so we could pass a flag into parse_hdm_decoder_caps() and not read
> > the value if it has no meaning for the particular decoder.
>
> How about kerneldoc on 'struct cxl_hdm' clarifying @target_count and
> other fields, because I don't see the benefit of logic to skip parsing
> that field. The overhead of an MMIO cycle to read the capability
> register has already been spent.
>
Ok. I guess it's harmless even it if gains meaning in some later spec
version as we don't use it for anything.
Jonathan
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-03-30 19:04 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-03-29 21:35 [PATCH] cxl/hdm: Avoid NULL deref when component registers are missing Dan Williams
2023-03-29 23:59 ` Dave Jiang
2023-03-30 17:19 ` Jonathan Cameron
2023-03-30 18:19 ` Dan Williams
2023-03-30 18:27 ` Jonathan Cameron
2023-03-30 18:49 ` Dan Williams
2023-03-30 19:04 ` Jonathan Cameron
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox