From: Huang Ying <ying.huang@intel.com>
To: Dan Williams <dan.j.williams@intel.com>,
Dave Jiang <dave.jiang@intel.com>
Cc: linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
Huang Ying <ying.huang@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Alejandro Lucero <alucerop@amd.com>,
Gregory Price <gourry@gourry.net>,
Ben Cheatham <benjamin.cheatham@amd.com>
Subject: [PATCH 0/5] cxl: Some preparation work for type2 accelerators support
Date: Tue, 15 Oct 2024 14:57:08 +0800 [thread overview]
Message-ID: <20241015065713.308671-1-ying.huang@intel.com> (raw)
This series implement some preparation work for the type2 accelerators
support.
We have tested the series with cxl_test via mocking a type2
accelerator as in [1]. Because we need more type2 accelerators
support to simulate a type2 device, we don't include the cxl_test
patch in the series.
[1] https://lore.kernel.org/linux-cxl/168592149709.1948938.8663425987110396027.stgit@dwillia2-xfh.jf.intel.com/
Changes:
RFC->v1:
- Collected Reviewed-by, Thanks Davidlohr and Gregory.
- Some minor fixes, Thanks Ben and others
- Thanks Jonathan to suggest to revise type2/type3 and coherence naming.
- Rebased to latest upstream
- Link to RFC: https://lore.kernel.org/linux-cxl/20240925024647.46735-1-ying.huang@intel.com/
Huang Ying (5):
cxl: Rename ACPI_CEDT_CFMWS_RESTRICT_TYPE2/TYPE3
cxl: Rename CXL_DECODER_HOSTONLYMEM/DEVMEM
cxl: Separate coherence from target type
cxl: Set type of region to that of the first endpoint
cxl: Avoid to create dax regions for type2 accelerators
drivers/cxl/acpi.c | 9 +++---
drivers/cxl/core/hdm.c | 38 +++++++++++++----------
drivers/cxl/core/mbox.c | 1 +
drivers/cxl/core/port.c | 17 ++++++-----
drivers/cxl/core/region.c | 58 ++++++++++++++++++++++++++++++------
drivers/cxl/cxl.h | 29 ++++++++++++------
drivers/cxl/cxlmem.h | 12 ++++++++
include/acpi/actbl1.h | 10 +++----
tools/testing/cxl/test/cxl.c | 24 +++++++--------
9 files changed, 135 insertions(+), 63 deletions(-)
Best Regards,
Huang, Ying
next reply other threads:[~2024-10-15 6:58 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-15 6:57 Huang Ying [this message]
2024-10-15 6:57 ` [PATCH 1/5] cxl: Rename ACPI_CEDT_CFMWS_RESTRICT_TYPE2/TYPE3 Huang Ying
2024-10-15 6:57 ` [PATCH 2/5] cxl: Rename CXL_DECODER_HOSTONLYMEM/DEVMEM Huang Ying
2024-10-17 22:21 ` Dan Williams
2024-10-18 6:18 ` Huang, Ying
2024-10-18 21:17 ` Dan Williams
2024-10-21 4:40 ` Huang, Ying
2024-10-15 6:57 ` [PATCH 3/5] cxl: Separate coherence from target type Huang Ying
2024-10-17 22:25 ` Dan Williams
2024-10-15 6:57 ` [PATCH 4/5] cxl: Set type of region to that of the first endpoint Huang Ying
2024-10-17 22:33 ` Dan Williams
2024-10-18 6:50 ` Huang, Ying
2024-10-18 21:19 ` Dan Williams
2024-10-21 6:33 ` Huang, Ying
2024-10-21 9:47 ` Alejandro Lucero Palau
2024-10-15 6:57 ` [PATCH 5/5] cxl: Avoid to create dax regions for type2 accelerators Huang Ying
2024-10-15 8:51 ` Alejandro Lucero Palau
2024-10-17 6:29 ` Huang, Ying
2024-10-17 7:27 ` Alejandro Lucero Palau
2024-10-17 7:48 ` Huang, Ying
2024-10-18 9:57 ` Jonathan Cameron
2024-10-21 11:37 ` Huang, Ying
2024-10-17 23:15 ` Dan Williams
2024-10-21 11:52 ` Huang, Ying
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