From: Huang Ying <ying.huang@intel.com>
To: Dan Williams <dan.j.williams@intel.com>,
Dave Jiang <dave.jiang@intel.com>
Cc: linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org,
Huang Ying <ying.huang@intel.com>,
Gregory Price <gourry@gourry.net>,
Davidlohr Bueso <dave@stgolabs.net>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Alejandro Lucero <alucerop@amd.com>,
Ben Cheatham <benjamin.cheatham@amd.com>
Subject: [PATCH 5/5] cxl: Avoid to create dax regions for type2 accelerators
Date: Tue, 15 Oct 2024 14:57:13 +0800 [thread overview]
Message-ID: <20241015065713.308671-6-ying.huang@intel.com> (raw)
In-Reply-To: <20241015065713.308671-1-ying.huang@intel.com>
The memory range of a type2 accelerator should be managed by the type2
accelerator specific driver instead of the common dax region drivers,
as discussed in [1].
[1] https://lore.kernel.org/linux-cxl/66469ff1b8fbc_2c2629427@dwillia2-xfh.jf.intel.com.notmuch/
So, the patch skips dax regions creation for type2 accelerator device
memory regions.
Based on: https://lore.kernel.org/linux-cxl/168592159835.1948938.1647215579839222774.stgit@dwillia2-xfh.jf.intel.com/
Signed-off-by: "Huang, Ying" <ying.huang@intel.com>
Co-developed-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Gregory Price <gourry@gourry.net>
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: Jonathan Cameron <jonathan.cameron@huawei.com>
Cc: Dave Jiang <dave.jiang@intel.com>
Cc: Alison Schofield <alison.schofield@intel.com>
Cc: Vishal Verma <vishal.l.verma@intel.com>
Cc: Ira Weiny <ira.weiny@intel.com>
Cc: Alejandro Lucero <alucerop@amd.com>
Cc: Ben Cheatham <benjamin.cheatham@amd.com>
---
drivers/cxl/core/region.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index d709738ada61..708be236c9a2 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -3473,6 +3473,14 @@ static int cxl_region_probe(struct device *dev)
p->res->start, p->res->end, cxlr,
is_system_ram) > 0)
return 0;
+ /*
+ * Accelerator regions have specific usage, skip
+ * device-dax registration.
+ */
+ if (cxlr->type == CXL_DECODER_ACCEL)
+ return 0;
+
+ /* Expander routes to device-dax */
return devm_cxl_add_dax_region(cxlr);
default:
dev_dbg(&cxlr->dev, "unsupported region mode: %d\n",
--
2.39.2
next prev parent reply other threads:[~2024-10-15 6:58 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-15 6:57 [PATCH 0/5] cxl: Some preparation work for type2 accelerators support Huang Ying
2024-10-15 6:57 ` [PATCH 1/5] cxl: Rename ACPI_CEDT_CFMWS_RESTRICT_TYPE2/TYPE3 Huang Ying
2024-10-15 6:57 ` [PATCH 2/5] cxl: Rename CXL_DECODER_HOSTONLYMEM/DEVMEM Huang Ying
2024-10-17 22:21 ` Dan Williams
2024-10-18 6:18 ` Huang, Ying
2024-10-18 21:17 ` Dan Williams
2024-10-21 4:40 ` Huang, Ying
2024-10-15 6:57 ` [PATCH 3/5] cxl: Separate coherence from target type Huang Ying
2024-10-17 22:25 ` Dan Williams
2024-10-15 6:57 ` [PATCH 4/5] cxl: Set type of region to that of the first endpoint Huang Ying
2024-10-17 22:33 ` Dan Williams
2024-10-18 6:50 ` Huang, Ying
2024-10-18 21:19 ` Dan Williams
2024-10-21 6:33 ` Huang, Ying
2024-10-21 9:47 ` Alejandro Lucero Palau
2024-10-15 6:57 ` Huang Ying [this message]
2024-10-15 8:51 ` [PATCH 5/5] cxl: Avoid to create dax regions for type2 accelerators Alejandro Lucero Palau
2024-10-17 6:29 ` Huang, Ying
2024-10-17 7:27 ` Alejandro Lucero Palau
2024-10-17 7:48 ` Huang, Ying
2024-10-18 9:57 ` Jonathan Cameron
2024-10-21 11:37 ` Huang, Ying
2024-10-17 23:15 ` Dan Williams
2024-10-21 11:52 ` Huang, Ying
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