Linux CXL
 help / color / mirror / Atom feed
From: "Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>
To: Davidlohr Bueso <dave@stgolabs.net>,
	Jonathan Cameron <jonathan.cameron@huawei.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Alison Schofield <alison.schofield@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	Ira Weiny <ira.weiny@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	"Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>,
	Huang Ying <ying.huang@intel.com>,
	Yao Xingtao <yaoxt.fnst@fujitsu.com>,
	Li Ming <ming4.li@intel.com>,
	linux-kernel@vger.kernel.org, linux-cxl@vger.kernel.org
Subject: [PATCH 0/3] cxl/core: Enable Region creation on x86 with Low Mem Hole
Date: Fri, 22 Nov 2024 16:51:51 +0100	[thread overview]
Message-ID: <20241122155226.2068287-1-fabio.m.de.francesco@linux.intel.com> (raw)

The CXL Fixed Memory Window Structure (CFMWS) describes zero or more Host
Physical Address (HPA) windows that are associated with each CXL Host
Bridge. Each window represents a contiguous HPA that may be interleaved
with one or more targets (CXL v3.1 - 9.18.1.3).

The Low Memory Hole (LMH) of x86 is a range of addresses of physical low
memory to which systems cannot send transactions. On those systems, BIOS
publishes CFMWS which communicate the active System Physical Address (SPA)
ranges that map to a subset of the Host Physical Address (HPA) ranges. The
SPA range trims out the hole, and capacity in the endpoint is lost with no
SPA to map to CXL HPA in that hole.

In the early stages of CXL Regions construction and attach on platforms
with Low Memory Holes, the driver fails and returns an error because it
expects that the CXL Endpoint Decoder range is a subset of the Root
Decoder's.

Then detect SPA/HPA misalignment and allow CXL Regions construction and 
attach if and only if the misalignment is due to x86 Low Memory Holes.

- Patch 1/3 changes the calling conventions of three match_*_by_range()
  helpers in preparation of 2/3.
- Patch 2/3 detects x86 LMH and enables CXL Regions construction and
  attach by trimming HPA by SPA.
- Patch 3/3 simulates a LMH for running the CXL tests on patched driver.

Many thanks to Alison, Dan, and Ira for their help and for their reviews
of my RFC on Intel's internal ML.

Fabio M. De Francesco (3):
  cxl/core: Change match_*_by_range() calling convention
  cxl/core: Enable Region creation on x86 with Low Memory Hole
  cxl/test: Simulate an x86 Low Memory Hole for tests

 drivers/cxl/Kconfig          |  5 +++
 drivers/cxl/core/Makefile    |  1 +
 drivers/cxl/core/lmh.c       | 58 ++++++++++++++++++++++++++
 drivers/cxl/core/region.c    | 80 ++++++++++++++++++++++++++++--------
 drivers/cxl/cxl.h            | 32 +++++++++++++++
 tools/testing/cxl/Kbuild     |  1 +
 tools/testing/cxl/test/cxl.c |  4 +-
 7 files changed, 161 insertions(+), 20 deletions(-)
 create mode 100644 drivers/cxl/core/lmh.c

-- 
2.46.2


             reply	other threads:[~2024-11-22 15:52 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-22 15:51 Fabio M. De Francesco [this message]
2024-11-22 15:51 ` [PATCH 1/3] cxl/core: Change match_*_by_range() calling convention Fabio M. De Francesco
2024-11-22 17:28   ` Ira Weiny
2024-11-25 21:10   ` Alison Schofield
2024-11-22 15:51 ` [PATCH 2/3] cxl/core: Enable Region creation on x86 with Low Memory Hole Fabio M. De Francesco
2024-11-22 17:25   ` Ira Weiny
2024-11-25 11:23     ` Li Ming
2024-11-25  8:41   ` kernel test robot
2024-11-25  8:42   ` Li Ming
2024-11-25 17:22     ` Fabio M. De Francesco
2024-11-26  2:13       ` Li Ming
2024-11-25 13:37   ` kernel test robot
2024-11-25 20:35   ` Alison Schofield
2024-11-25 22:44   ` kernel test robot
2024-12-16 21:30   ` Robert Richter
2025-01-08 14:48     ` Fabio M. De Francesco
2025-01-09 10:58       ` Robert Richter
2025-01-10 16:06         ` Fabio M. De Francesco
2024-11-22 15:51 ` [PATCH 3/3] cxl/test: Simulate an x86 Low Memory Hole for tests Fabio M. De Francesco
2024-11-22 17:26   ` Ira Weiny
2024-11-25 20:46   ` Alison Schofield
2024-11-26 15:00   ` Jonathan Cameron
2024-11-22 19:46 ` [PATCH 0/3] cxl/core: Enable Region creation on x86 with Low Mem Hole Gregory Price
2024-11-25 22:00 ` Alison Schofield
2024-12-03 18:23   ` Fabio M. De Francesco

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20241122155226.2068287-1-fabio.m.de.francesco@linux.intel.com \
    --to=fabio.m.de.francesco@linux.intel.com \
    --cc=alison.schofield@intel.com \
    --cc=dan.j.williams@intel.com \
    --cc=dave.jiang@intel.com \
    --cc=dave@stgolabs.net \
    --cc=ira.weiny@intel.com \
    --cc=jonathan.cameron@huawei.com \
    --cc=linux-cxl@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=ming4.li@intel.com \
    --cc=vishal.l.verma@intel.com \
    --cc=yaoxt.fnst@fujitsu.com \
    --cc=ying.huang@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox