From: Alison Schofield <alison.schofield@intel.com>
To: "Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>
Cc: Davidlohr Bueso <dave@stgolabs.net>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Dave Jiang <dave.jiang@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Huang Ying <ying.huang@intel.com>,
Yao Xingtao <yaoxt.fnst@fujitsu.com>,
Li Ming <ming4.li@intel.com>,
linux-kernel@vger.kernel.org, linux-cxl@vger.kernel.org
Subject: Re: [PATCH 3/3] cxl/test: Simulate an x86 Low Memory Hole for tests
Date: Mon, 25 Nov 2024 12:46:10 -0800 [thread overview]
Message-ID: <Z0TiEq2xExrejxTD@aschofie-mobl2.lan> (raw)
In-Reply-To: <20241122155226.2068287-4-fabio.m.de.francesco@linux.intel.com>
On Fri, Nov 22, 2024 at 04:51:54PM +0100, Fabio M. De Francesco wrote:
> Simulate an x86 Low Memory Hole for the CXL tests by changing
> mock_cfmws[0] range size to 768MB and CXL Endpoint Decoder HPA range size
> to 1GB and have get_cfmws_range_start() return two different addresses
> which depend on whether the passed device is real or mock.
How about adding:
Since the auto-created region of cxl-test uses mock_cfmws[0], the
LMH path in the CXL Driver will be exercised every time the cxl-test
module is loaded. Executing unit test: cxl-topology.sh, confirms the
region created succesfully with a LMH.
>
> Cc: Alison Schofield <alison.schofield@intel.com>
> Cc: Dan Williams <dan.j.williams@intel.com>
> Cc: Ira Weiny <ira.weiny@intel.com>
> Signed-off-by: Fabio M. De Francesco <fabio.m.de.francesco@linux.intel.com>
> ---
> drivers/cxl/core/lmh.c | 21 +++++++++++++--------
> drivers/cxl/cxl.h | 7 +++++++
> tools/testing/cxl/Kbuild | 1 +
> tools/testing/cxl/test/cxl.c | 4 ++--
> 4 files changed, 23 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/cxl/core/lmh.c b/drivers/cxl/core/lmh.c
> index da76b2a534ec..350008324bdc 100644
> --- a/drivers/cxl/core/lmh.c
> +++ b/drivers/cxl/core/lmh.c
> @@ -1,10 +1,15 @@
> // SPDX-License-Identifier: GPL-2.0-only
>
> #include <linux/range.h>
> +#include <linux/pci.h>
> #include "cxl.h"
>
> -/* In x86 with memory hole, misaligned CFMWS range starts at 0x0 */
> -#define MISALIGNED_CFMWS_RANGE_BASE 0x0
> +u64 get_cfmws_range_start(struct device *dev)
Can this func be static, and then keep the #defines here, in lmh.c,
rather than move to cxl.h ?
> +{
> + if (dev_is_pci(dev))
> + return MISALIGNED_CFMWS_RANGE_START;
space before final return please
> + return MISALIGNED_MOCK_CFMWS_RANGE_START;
> +}
>
snip
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index a5ad4499381e..51dc80f8e50c 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -903,12 +903,19 @@ void cxl_coordinates_combine(struct access_coordinate *out,
> bool cxl_endpoint_decoder_reset_detected(struct cxl_port *port);
>
> #ifdef CONFIG_CXL_ARCH_LOW_MEMORY_HOLE
> +
> +/* Range start address of misaligned CFMWS in x86 with LMH */
> +#define MISALIGNED_CFMWS_RANGE_START 0x0
> +/* Range start address of mock misaligned CFMWS for tests */
> +#define MISALIGNED_MOCK_CFMWS_RANGE_START 0xf010000000
> +
As noted above, wondering why these need to be in cxl.h
Why 'MISALIGNED_ and not 'LMH_' , especially if you can move to lmh.c.
Is it guaranteed that MOCK_CFMWS_RANGE_START is at 0xf010000000?
-- Alison
snip to end
next prev parent reply other threads:[~2024-11-25 20:46 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-22 15:51 [PATCH 0/3] cxl/core: Enable Region creation on x86 with Low Mem Hole Fabio M. De Francesco
2024-11-22 15:51 ` [PATCH 1/3] cxl/core: Change match_*_by_range() calling convention Fabio M. De Francesco
2024-11-22 17:28 ` Ira Weiny
2024-11-25 21:10 ` Alison Schofield
2024-11-22 15:51 ` [PATCH 2/3] cxl/core: Enable Region creation on x86 with Low Memory Hole Fabio M. De Francesco
2024-11-22 17:25 ` Ira Weiny
2024-11-25 11:23 ` Li Ming
2024-11-25 8:41 ` kernel test robot
2024-11-25 8:42 ` Li Ming
2024-11-25 17:22 ` Fabio M. De Francesco
2024-11-26 2:13 ` Li Ming
2024-11-25 13:37 ` kernel test robot
2024-11-25 20:35 ` Alison Schofield
2024-11-25 22:44 ` kernel test robot
2024-12-16 21:30 ` Robert Richter
2025-01-08 14:48 ` Fabio M. De Francesco
2025-01-09 10:58 ` Robert Richter
2025-01-10 16:06 ` Fabio M. De Francesco
2024-11-22 15:51 ` [PATCH 3/3] cxl/test: Simulate an x86 Low Memory Hole for tests Fabio M. De Francesco
2024-11-22 17:26 ` Ira Weiny
2024-11-25 20:46 ` Alison Schofield [this message]
2024-11-26 15:00 ` Jonathan Cameron
2024-11-22 19:46 ` [PATCH 0/3] cxl/core: Enable Region creation on x86 with Low Mem Hole Gregory Price
2024-11-25 22:00 ` Alison Schofield
2024-12-03 18:23 ` Fabio M. De Francesco
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