From: kernel test robot <lkp@intel.com>
To: alejandro.lucero-palau@amd.com, linux-cxl@vger.kernel.org,
netdev@vger.kernel.org, dan.j.williams@intel.com,
martin.habets@xilinx.com, edward.cree@amd.com,
davem@davemloft.net, kuba@kernel.org, pabeni@redhat.com,
edumazet@google.com, dave.jiang@intel.com
Cc: oe-kbuild-all@lists.linux.dev, Alejandro Lucero <alucerop@amd.com>
Subject: Re: [PATCH v6 16/28] sfc: obtain root decoder with enough HPA free space
Date: Tue, 3 Dec 2024 10:34:47 +0800 [thread overview]
Message-ID: <202412031010.o6gZQgE3-lkp@intel.com> (raw)
In-Reply-To: <20241202171222.62595-17-alejandro.lucero-palau@amd.com>
Hi,
kernel test robot noticed the following build warnings:
[auto build test WARNING on e70140ba0d2b1a30467d4af6bcfe761327b9ec95]
url: https://github.com/intel-lab-lkp/linux/commits/alejandro-lucero-palau-amd-com/cxl-add-type2-device-basic-support/20241203-031134
base: e70140ba0d2b1a30467d4af6bcfe761327b9ec95
patch link: https://lore.kernel.org/r/20241202171222.62595-17-alejandro.lucero-palau%40amd.com
patch subject: [PATCH v6 16/28] sfc: obtain root decoder with enough HPA free space
config: openrisc-allyesconfig (https://download.01.org/0day-ci/archive/20241203/202412031010.o6gZQgE3-lkp@intel.com/config)
compiler: or1k-linux-gcc (GCC) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241203/202412031010.o6gZQgE3-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202412031010.o6gZQgE3-lkp@intel.com/
All warnings (new ones prefixed by >>):
In file included from include/linux/device.h:15,
from include/linux/pci.h:37,
from include/cxl/cxl.h:8,
from drivers/net/ethernet/sfc/efx_cxl.c:12:
drivers/net/ethernet/sfc/efx_cxl.c: In function 'efx_cxl_init':
>> drivers/net/ethernet/sfc/efx_cxl.c:117:34: warning: format '%llu' expects argument of type 'long long unsigned int', but argument 4 has type 'resource_size_t' {aka 'unsigned int'} [-Wformat=]
117 | pci_err(pci_dev, "%s: no enough free HPA space %llu < %u\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/dev_printk.h:110:30: note: in definition of macro 'dev_printk_index_wrap'
110 | _p_func(dev, fmt, ##__VA_ARGS__); \
| ^~~
include/linux/dev_printk.h:154:56: note: in expansion of macro 'dev_fmt'
154 | dev_printk_index_wrap(_dev_err, KERN_ERR, dev, dev_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~
include/linux/pci.h:2694:41: note: in expansion of macro 'dev_err'
2694 | #define pci_err(pdev, fmt, arg...) dev_err(&(pdev)->dev, fmt, ##arg)
| ^~~~~~~
drivers/net/ethernet/sfc/efx_cxl.c:117:17: note: in expansion of macro 'pci_err'
117 | pci_err(pci_dev, "%s: no enough free HPA space %llu < %u\n",
| ^~~~~~~
drivers/net/ethernet/sfc/efx_cxl.c:117:67: note: format string is defined here
117 | pci_err(pci_dev, "%s: no enough free HPA space %llu < %u\n",
| ~~~^
| |
| long long unsigned int
| %u
vim +117 drivers/net/ethernet/sfc/efx_cxl.c
20
21 int efx_cxl_init(struct efx_probe_data *probe_data)
22 {
23 struct efx_nic *efx = &probe_data->efx;
24 DECLARE_BITMAP(expected, CXL_MAX_CAPS);
25 DECLARE_BITMAP(found, CXL_MAX_CAPS);
26 struct pci_dev *pci_dev;
27 struct efx_cxl *cxl;
28 struct resource res;
29 resource_size_t max;
30 u16 dvsec;
31 int rc;
32
33 pci_dev = efx->pci_dev;
34 probe_data->cxl_pio_initialised = false;
35
36 dvsec = pci_find_dvsec_capability(pci_dev, PCI_VENDOR_ID_CXL,
37 CXL_DVSEC_PCIE_DEVICE);
38 if (!dvsec)
39 return 0;
40
41 pci_dbg(pci_dev, "CXL_DVSEC_PCIE_DEVICE capability found\n");
42
43 cxl = kzalloc(sizeof(*cxl), GFP_KERNEL);
44 if (!cxl)
45 return -ENOMEM;
46
47 cxl->cxlds = cxl_accel_state_create(&pci_dev->dev);
48 if (IS_ERR(cxl->cxlds)) {
49 pci_err(pci_dev, "CXL accel device state failed");
50 rc = -ENOMEM;
51 goto err1;
52 }
53
54 cxl_set_dvsec(cxl->cxlds, dvsec);
55 cxl_set_serial(cxl->cxlds, pci_dev->dev.id);
56
57 res = DEFINE_RES_MEM(0, EFX_CTPIO_BUFFER_SIZE);
58 if (cxl_set_resource(cxl->cxlds, res, CXL_RES_DPA)) {
59 pci_err(pci_dev, "cxl_set_resource DPA failed\n");
60 rc = -EINVAL;
61 goto err2;
62 }
63
64 res = DEFINE_RES_MEM_NAMED(0, EFX_CTPIO_BUFFER_SIZE, "ram");
65 if (cxl_set_resource(cxl->cxlds, res, CXL_RES_RAM)) {
66 pci_err(pci_dev, "cxl_set_resource RAM failed\n");
67 rc = -EINVAL;
68 goto err2;
69 }
70
71 rc = cxl_pci_accel_setup_regs(pci_dev, cxl->cxlds);
72 if (rc) {
73 pci_err(pci_dev, "CXL accel setup regs failed");
74 goto err2;
75 }
76
77 bitmap_clear(expected, 0, CXL_MAX_CAPS);
78 bitmap_set(expected, CXL_DEV_CAP_HDM, 1);
79 bitmap_set(expected, CXL_DEV_CAP_RAS, 1);
80
81 if (!cxl_pci_check_caps(cxl->cxlds, expected, found)) {
82 pci_err(pci_dev,
83 "CXL device capabilities found(%08lx) not as expected(%08lx)",
84 *found, *expected);
85 goto err2;
86 }
87
88 rc = cxl_request_resource(cxl->cxlds, CXL_RES_RAM);
89 if (rc) {
90 pci_err(pci_dev, "CXL request resource failed");
91 goto err2;
92 }
93
94 /* We do not have the register about media status. Hardware design
95 * implies it is ready.
96 */
97 cxl_set_media_ready(cxl->cxlds);
98
99 cxl->cxlmd = devm_cxl_add_memdev(&pci_dev->dev, cxl->cxlds);
100 if (IS_ERR(cxl->cxlmd)) {
101 pci_err(pci_dev, "CXL accel memdev creation failed");
102 rc = PTR_ERR(cxl->cxlmd);
103 goto err3;
104 }
105
106 cxl->cxlrd = cxl_get_hpa_freespace(cxl->cxlmd,
107 CXL_DECODER_F_RAM | CXL_DECODER_F_TYPE2,
108 &max);
109
110 if (IS_ERR(cxl->cxlrd)) {
111 pci_err(pci_dev, "cxl_get_hpa_freespace failed\n");
112 rc = PTR_ERR(cxl->cxlrd);
113 goto err3;
114 }
115
116 if (max < EFX_CTPIO_BUFFER_SIZE) {
> 117 pci_err(pci_dev, "%s: no enough free HPA space %llu < %u\n",
118 __func__, max, EFX_CTPIO_BUFFER_SIZE);
119 rc = -ENOSPC;
120 goto err3;
121 }
122
123 probe_data->cxl = cxl;
124
125 return 0;
126
127 err3:
128 cxl_release_resource(cxl->cxlds, CXL_RES_RAM);
129 err2:
130 kfree(cxl->cxlds);
131 err1:
132 kfree(cxl);
133 return rc;
134 }
135
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
next prev parent reply other threads:[~2024-12-03 2:35 UTC|newest]
Thread overview: 79+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-02 17:11 [PATCH v6 00/28] cxl: add type2 device basic support alejandro.lucero-palau
2024-12-02 17:11 ` [PATCH v6 01/28] " alejandro.lucero-palau
2024-12-02 17:11 ` [PATCH v6 02/28] sfc: add cxl support using new CXL API alejandro.lucero-palau
2024-12-03 14:21 ` Martin Habets
2024-12-03 20:33 ` Edward Cree
2024-12-04 9:30 ` Alejandro Lucero Palau
2024-12-02 17:11 ` [PATCH v6 03/28] cxl: add capabilities field to cxl_dev_state and cxl_port alejandro.lucero-palau
2024-12-03 4:50 ` kernel test robot
2024-12-03 22:24 ` Fan Ni
2024-12-02 17:11 ` [PATCH v6 04/28] cxl/pci: add check for validating capabilities alejandro.lucero-palau
2024-12-03 18:37 ` Zhi Wang
2024-12-03 18:55 ` Alejandro Lucero Palau
2024-12-03 22:55 ` Fan Ni
2024-12-04 8:58 ` Alejandro Lucero Palau
2024-12-02 17:11 ` [PATCH v6 05/28] cxl: move pci generic code alejandro.lucero-palau
2024-12-03 22:59 ` Fan Ni
2024-12-02 17:12 ` [PATCH v6 06/28] cxl: add function for type2 cxl regs setup alejandro.lucero-palau
2024-12-04 2:27 ` Fan Ni
2024-12-02 17:12 ` [PATCH v6 07/28] sfc: use cxl api for regs setup and checking alejandro.lucero-palau
2024-12-03 14:24 ` Martin Habets
2024-12-03 18:41 ` Zhi Wang
2024-12-02 17:12 ` [PATCH v6 08/28] cxl: add functions for resource request/release by a driver alejandro.lucero-palau
2024-12-03 18:42 ` Zhi Wang
2024-12-06 3:35 ` Fan Ni
2024-12-06 4:00 ` Kalesh Anakkur Purayil
2024-12-09 9:07 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 09/28] sfc: request cxl ram resource alejandro.lucero-palau
2024-12-03 14:25 ` Martin Habets
2024-12-06 4:10 ` Fan Ni
2024-12-06 4:28 ` Kalesh Anakkur Purayil
2024-12-09 9:12 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 10/28] cxl: harden resource_contains checks to handle zero size resources alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 11/28] cxl: add function for setting media ready by a driver alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 12/28] sfc: set cxl media ready alejandro.lucero-palau
2024-12-03 14:26 ` Martin Habets
2024-12-02 17:12 ` [PATCH v6 13/28] cxl: prepare memdev creation for type2 alejandro.lucero-palau
2024-12-06 16:56 ` Fan Ni
2024-12-09 9:14 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 14/28] sfc: create type2 cxl memdev alejandro.lucero-palau
2024-12-03 14:27 ` Martin Habets
2024-12-06 17:12 ` Fan Ni
2024-12-02 17:12 ` [PATCH v6 15/28] cxl: define a driver interface for HPA free space enumeration alejandro.lucero-palau
2024-12-03 9:44 ` kernel test robot
2024-12-06 19:48 ` Fan Ni
2024-12-09 9:22 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 16/28] sfc: obtain root decoder with enough HPA free space alejandro.lucero-palau
2024-12-03 2:34 ` kernel test robot [this message]
2024-12-03 14:34 ` Martin Habets
2024-12-03 15:24 ` Alejandro Lucero Palau
2024-12-06 21:36 ` Fan Ni
2024-12-09 9:24 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 17/28] cxl: define a driver interface for DPA allocation alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 18/28] sfc: get endpoint decoder alejandro.lucero-palau
2024-12-03 14:35 ` Martin Habets
2024-12-09 17:39 ` Fan Ni
2024-12-02 17:12 ` [PATCH v6 19/28] cxl: make region type based on endpoint type alejandro.lucero-palau
2024-12-09 18:03 ` Fan Ni
2024-12-02 17:12 ` [PATCH v6 20/28] cxl/region: factor out interleave ways setup alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 21/28] cxl/region: factor out interleave granularity setup alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 22/28] cxl: allow region creation by type2 drivers alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 23/28] sfc: create cxl region alejandro.lucero-palau
2024-12-03 14:37 ` Martin Habets
2024-12-03 15:25 ` Alejandro Lucero Palau
2024-12-04 8:33 ` Martin Habets
2024-12-02 17:12 ` [PATCH v6 24/28] cxl: add region flag for precluding a device memory to be used for dax alejandro.lucero-palau
2024-12-03 18:50 ` Zhi Wang
2024-12-02 17:12 ` [PATCH v6 25/28] sfc: specify no dax when cxl region is created alejandro.lucero-palau
2024-12-03 14:38 ` Martin Habets
2024-12-02 17:12 ` [PATCH v6 26/28] cxl: add function for obtaining region range alejandro.lucero-palau
2024-12-03 18:53 ` Zhi Wang
2024-12-09 9:48 ` Alejandro Lucero Palau
2024-12-09 16:29 ` Zhi Wang
2024-12-09 17:47 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 27/28] sfc: update MCDI protocol headers alejandro.lucero-palau
2024-12-03 14:41 ` Martin Habets
2024-12-03 17:38 ` Edward Cree
2024-12-02 17:12 ` [PATCH v6 28/28] sfc: support pio mapping based on cxl alejandro.lucero-palau
2024-12-03 14:52 ` Martin Habets
2024-12-03 15:30 ` Alejandro Lucero Palau
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