From: Alejandro Lucero Palau <alucerop@amd.com>
To: Fan Ni <nifan.cxl@gmail.com>, alejandro.lucero-palau@amd.com
Cc: linux-cxl@vger.kernel.org, netdev@vger.kernel.org,
dan.j.williams@intel.com, martin.habets@xilinx.com,
edward.cree@amd.com, davem@davemloft.net, kuba@kernel.org,
pabeni@redhat.com, edumazet@google.com, dave.jiang@intel.com
Subject: Re: [PATCH v6 13/28] cxl: prepare memdev creation for type2
Date: Mon, 9 Dec 2024 09:14:08 +0000 [thread overview]
Message-ID: <6b3147ab-99ae-b5a3-df5e-0db611229356@amd.com> (raw)
In-Reply-To: <Z1Ms2YRAMFxmd11Y@fan>
On 12/6/24 16:56, Fan Ni wrote:
> On Mon, Dec 02, 2024 at 05:12:07PM +0000, alejandro.lucero-palau@amd.com wrote:
>> From: Alejandro Lucero <alucerop@amd.com>
>>
>> Current cxl core is relying on a CXL_DEVTYPE_CLASSMEM type device when
>> creating a memdev leading to problems when obtaining cxl_memdev_state
>> references from a CXL_DEVTYPE_DEVMEM type. This last device type is
>> managed by a specific vendor driver and does not need same sysfs files
>> since not userspace intervention is expected.
>>
>> Create a new cxl_mem device type with no attributes for Type2.
>>
>> Avoid debugfs files relying on existence of clx_memdev_state.
>>
>> Make devm_cxl_add_memdev accesible from a accel driver.
>>
>> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
>> ---
>> drivers/cxl/core/cdat.c | 3 +++
>> drivers/cxl/core/memdev.c | 15 +++++++++++++--
>> drivers/cxl/core/region.c | 3 ++-
>> drivers/cxl/mem.c | 25 +++++++++++++++++++------
>> include/cxl/cxl.h | 2 ++
>> 5 files changed, 39 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/cxl/core/cdat.c b/drivers/cxl/core/cdat.c
>> index 2a1f164db98e..f1c5b77cb6a0 100644
>> --- a/drivers/cxl/core/cdat.c
>> +++ b/drivers/cxl/core/cdat.c
>> @@ -577,6 +577,9 @@ static struct cxl_dpa_perf *cxled_get_dpa_perf(struct cxl_endpoint_decoder *cxle
>> struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds);
>> struct cxl_dpa_perf *perf;
>>
>> + if (!mds)
>> + return ERR_PTR(-EINVAL);
>> +
>> switch (mode) {
>> case CXL_DECODER_RAM:
>> perf = &mds->ram_perf;
>> diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c
>> index b14193eae5fb..4bc946388384 100644
>> --- a/drivers/cxl/core/memdev.c
>> +++ b/drivers/cxl/core/memdev.c
>> @@ -547,9 +547,17 @@ static const struct device_type cxl_memdev_type = {
>> .groups = cxl_memdev_attribute_groups,
>> };
>>
>> +static const struct device_type cxl_accel_memdev_type = {
>> + .name = "cxl_accel_memdev",
>> + .release = cxl_memdev_release,
>> + .devnode = cxl_memdev_devnode,
>> +};
>> +
>> bool is_cxl_memdev(const struct device *dev)
>> {
>> - return dev->type == &cxl_memdev_type;
>> + return (dev->type == &cxl_memdev_type ||
>> + dev->type == &cxl_accel_memdev_type);
>> +
> Unwanted blank line.
>
> Fan
I'll fix it.
Thanks!
>> }
>> EXPORT_SYMBOL_NS_GPL(is_cxl_memdev, CXL);
>>
>> @@ -660,7 +668,10 @@ static struct cxl_memdev *cxl_memdev_alloc(struct cxl_dev_state *cxlds,
>> dev->parent = cxlds->dev;
>> dev->bus = &cxl_bus_type;
>> dev->devt = MKDEV(cxl_mem_major, cxlmd->id);
>> - dev->type = &cxl_memdev_type;
>> + if (cxlds->type == CXL_DEVTYPE_DEVMEM)
>> + dev->type = &cxl_accel_memdev_type;
>> + else
>> + dev->type = &cxl_memdev_type;
>> device_set_pm_not_required(dev);
>> INIT_WORK(&cxlmd->detach_work, detach_memdev);
>>
>> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
>> index 70d0a017e99c..2a34393e216d 100644
>> --- a/drivers/cxl/core/region.c
>> +++ b/drivers/cxl/core/region.c
>> @@ -1948,7 +1948,8 @@ static int cxl_region_attach(struct cxl_region *cxlr,
>> return -EINVAL;
>> }
>>
>> - cxl_region_perf_data_calculate(cxlr, cxled);
>> + if (cxlr->type == CXL_DECODER_HOSTONLYMEM)
>> + cxl_region_perf_data_calculate(cxlr, cxled);
>>
>> if (test_bit(CXL_REGION_F_AUTO, &cxlr->flags)) {
>> int i;
>> diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
>> index a9fd5cd5a0d2..cb771bf196cd 100644
>> --- a/drivers/cxl/mem.c
>> +++ b/drivers/cxl/mem.c
>> @@ -130,12 +130,18 @@ static int cxl_mem_probe(struct device *dev)
>> dentry = cxl_debugfs_create_dir(dev_name(dev));
>> debugfs_create_devm_seqfile(dev, "dpamem", dentry, cxl_mem_dpa_show);
>>
>> - if (test_bit(CXL_POISON_ENABLED_INJECT, mds->poison.enabled_cmds))
>> - debugfs_create_file("inject_poison", 0200, dentry, cxlmd,
>> - &cxl_poison_inject_fops);
>> - if (test_bit(CXL_POISON_ENABLED_CLEAR, mds->poison.enabled_cmds))
>> - debugfs_create_file("clear_poison", 0200, dentry, cxlmd,
>> - &cxl_poison_clear_fops);
>> + /*
>> + * Avoid poison debugfs files for Type2 devices as they rely on
>> + * cxl_memdev_state.
>> + */
>> + if (mds) {
>> + if (test_bit(CXL_POISON_ENABLED_INJECT, mds->poison.enabled_cmds))
>> + debugfs_create_file("inject_poison", 0200, dentry, cxlmd,
>> + &cxl_poison_inject_fops);
>> + if (test_bit(CXL_POISON_ENABLED_CLEAR, mds->poison.enabled_cmds))
>> + debugfs_create_file("clear_poison", 0200, dentry, cxlmd,
>> + &cxl_poison_clear_fops);
>> + }
>>
>> rc = devm_add_action_or_reset(dev, remove_debugfs, dentry);
>> if (rc)
>> @@ -219,6 +225,13 @@ static umode_t cxl_mem_visible(struct kobject *kobj, struct attribute *a, int n)
>> struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
>> struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds);
>>
>> + /*
>> + * Avoid poison sysfs files for Type2 devices as they rely on
>> + * cxl_memdev_state.
>> + */
>> + if (!mds)
>> + return 0;
>> +
>> if (a == &dev_attr_trigger_poison_list.attr)
>> if (!test_bit(CXL_POISON_ENABLED_LIST,
>> mds->poison.enabled_cmds))
>> diff --git a/include/cxl/cxl.h b/include/cxl/cxl.h
>> index 473128fdfb22..26d7735b5f31 100644
>> --- a/include/cxl/cxl.h
>> +++ b/include/cxl/cxl.h
>> @@ -45,4 +45,6 @@ int cxl_pci_accel_setup_regs(struct pci_dev *pdev, struct cxl_dev_state *cxlds);
>> int cxl_request_resource(struct cxl_dev_state *cxlds, enum cxl_resource type);
>> int cxl_release_resource(struct cxl_dev_state *cxlds, enum cxl_resource type);
>> void cxl_set_media_ready(struct cxl_dev_state *cxlds);
>> +struct cxl_memdev *devm_cxl_add_memdev(struct device *host,
>> + struct cxl_dev_state *cxlds);
>> #endif
>> --
>> 2.17.1
>>
next prev parent reply other threads:[~2024-12-09 9:14 UTC|newest]
Thread overview: 79+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-02 17:11 [PATCH v6 00/28] cxl: add type2 device basic support alejandro.lucero-palau
2024-12-02 17:11 ` [PATCH v6 01/28] " alejandro.lucero-palau
2024-12-02 17:11 ` [PATCH v6 02/28] sfc: add cxl support using new CXL API alejandro.lucero-palau
2024-12-03 14:21 ` Martin Habets
2024-12-03 20:33 ` Edward Cree
2024-12-04 9:30 ` Alejandro Lucero Palau
2024-12-02 17:11 ` [PATCH v6 03/28] cxl: add capabilities field to cxl_dev_state and cxl_port alejandro.lucero-palau
2024-12-03 4:50 ` kernel test robot
2024-12-03 22:24 ` Fan Ni
2024-12-02 17:11 ` [PATCH v6 04/28] cxl/pci: add check for validating capabilities alejandro.lucero-palau
2024-12-03 18:37 ` Zhi Wang
2024-12-03 18:55 ` Alejandro Lucero Palau
2024-12-03 22:55 ` Fan Ni
2024-12-04 8:58 ` Alejandro Lucero Palau
2024-12-02 17:11 ` [PATCH v6 05/28] cxl: move pci generic code alejandro.lucero-palau
2024-12-03 22:59 ` Fan Ni
2024-12-02 17:12 ` [PATCH v6 06/28] cxl: add function for type2 cxl regs setup alejandro.lucero-palau
2024-12-04 2:27 ` Fan Ni
2024-12-02 17:12 ` [PATCH v6 07/28] sfc: use cxl api for regs setup and checking alejandro.lucero-palau
2024-12-03 14:24 ` Martin Habets
2024-12-03 18:41 ` Zhi Wang
2024-12-02 17:12 ` [PATCH v6 08/28] cxl: add functions for resource request/release by a driver alejandro.lucero-palau
2024-12-03 18:42 ` Zhi Wang
2024-12-06 3:35 ` Fan Ni
2024-12-06 4:00 ` Kalesh Anakkur Purayil
2024-12-09 9:07 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 09/28] sfc: request cxl ram resource alejandro.lucero-palau
2024-12-03 14:25 ` Martin Habets
2024-12-06 4:10 ` Fan Ni
2024-12-06 4:28 ` Kalesh Anakkur Purayil
2024-12-09 9:12 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 10/28] cxl: harden resource_contains checks to handle zero size resources alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 11/28] cxl: add function for setting media ready by a driver alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 12/28] sfc: set cxl media ready alejandro.lucero-palau
2024-12-03 14:26 ` Martin Habets
2024-12-02 17:12 ` [PATCH v6 13/28] cxl: prepare memdev creation for type2 alejandro.lucero-palau
2024-12-06 16:56 ` Fan Ni
2024-12-09 9:14 ` Alejandro Lucero Palau [this message]
2024-12-02 17:12 ` [PATCH v6 14/28] sfc: create type2 cxl memdev alejandro.lucero-palau
2024-12-03 14:27 ` Martin Habets
2024-12-06 17:12 ` Fan Ni
2024-12-02 17:12 ` [PATCH v6 15/28] cxl: define a driver interface for HPA free space enumeration alejandro.lucero-palau
2024-12-03 9:44 ` kernel test robot
2024-12-06 19:48 ` Fan Ni
2024-12-09 9:22 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 16/28] sfc: obtain root decoder with enough HPA free space alejandro.lucero-palau
2024-12-03 2:34 ` kernel test robot
2024-12-03 14:34 ` Martin Habets
2024-12-03 15:24 ` Alejandro Lucero Palau
2024-12-06 21:36 ` Fan Ni
2024-12-09 9:24 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 17/28] cxl: define a driver interface for DPA allocation alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 18/28] sfc: get endpoint decoder alejandro.lucero-palau
2024-12-03 14:35 ` Martin Habets
2024-12-09 17:39 ` Fan Ni
2024-12-02 17:12 ` [PATCH v6 19/28] cxl: make region type based on endpoint type alejandro.lucero-palau
2024-12-09 18:03 ` Fan Ni
2024-12-02 17:12 ` [PATCH v6 20/28] cxl/region: factor out interleave ways setup alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 21/28] cxl/region: factor out interleave granularity setup alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 22/28] cxl: allow region creation by type2 drivers alejandro.lucero-palau
2024-12-02 17:12 ` [PATCH v6 23/28] sfc: create cxl region alejandro.lucero-palau
2024-12-03 14:37 ` Martin Habets
2024-12-03 15:25 ` Alejandro Lucero Palau
2024-12-04 8:33 ` Martin Habets
2024-12-02 17:12 ` [PATCH v6 24/28] cxl: add region flag for precluding a device memory to be used for dax alejandro.lucero-palau
2024-12-03 18:50 ` Zhi Wang
2024-12-02 17:12 ` [PATCH v6 25/28] sfc: specify no dax when cxl region is created alejandro.lucero-palau
2024-12-03 14:38 ` Martin Habets
2024-12-02 17:12 ` [PATCH v6 26/28] cxl: add function for obtaining region range alejandro.lucero-palau
2024-12-03 18:53 ` Zhi Wang
2024-12-09 9:48 ` Alejandro Lucero Palau
2024-12-09 16:29 ` Zhi Wang
2024-12-09 17:47 ` Alejandro Lucero Palau
2024-12-02 17:12 ` [PATCH v6 27/28] sfc: update MCDI protocol headers alejandro.lucero-palau
2024-12-03 14:41 ` Martin Habets
2024-12-03 17:38 ` Edward Cree
2024-12-02 17:12 ` [PATCH v6 28/28] sfc: support pio mapping based on cxl alejandro.lucero-palau
2024-12-03 14:52 ` Martin Habets
2024-12-03 15:30 ` Alejandro Lucero Palau
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