From: Robert Richter <rrichter@amd.com>
To: Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Dave Jiang <dave.jiang@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>
Cc: <linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Gregory Price <gourry@gourry.net>,
"Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>,
Terry Bowman <terry.bowman@amd.com>,
Robert Richter <rrichter@amd.com>
Subject: [PATCH v1 12/29] cxl: Modify address translation callback for generic use
Date: Tue, 7 Jan 2025 15:09:58 +0100 [thread overview]
Message-ID: <20250107141015.3367194-13-rrichter@amd.com> (raw)
In-Reply-To: <20250107141015.3367194-1-rrichter@amd.com>
The root decoder address translation callback could be reused for
other decoders too. For generic use of the callback, change the
function interface to use a decoder argument instead of the root
decoder.
Signed-off-by: Robert Richter <rrichter@amd.com>
---
drivers/cxl/acpi.c | 4 ++--
drivers/cxl/core/region.c | 2 +-
drivers/cxl/cxl.h | 5 ++---
3 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
index cb14829bb9be..b42cffd6751f 100644
--- a/drivers/cxl/acpi.c
+++ b/drivers/cxl/acpi.c
@@ -22,9 +22,9 @@ static const guid_t acpi_cxl_qtg_id_guid =
GUID_INIT(0xF365F9A6, 0xA7DE, 0x4071,
0xA6, 0x6A, 0xB4, 0x0C, 0x0B, 0x4F, 0x8E, 0x52);
-
-static u64 cxl_xor_hpa_to_spa(struct cxl_root_decoder *cxlrd, u64 hpa)
+static u64 cxl_xor_hpa_to_spa(struct cxl_decoder *cxld, u64 hpa)
{
+ struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(&cxld->dev);
struct cxl_cxims_data *cximsd = cxlrd->platform_data;
int hbiw = cxlrd->cxlsd.nr_targets;
u64 val;
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index 6fcf56806606..9443507ed4e1 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -2925,7 +2925,7 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd,
/* Root decoder translation overrides typical modulo decode */
if (cxlrd->hpa_to_spa)
- hpa = cxlrd->hpa_to_spa(cxlrd, hpa);
+ hpa = cxlrd->hpa_to_spa(&cxlrd->cxlsd.cxld, hpa);
if (hpa < p->res->start || hpa > p->res->end) {
dev_dbg(&cxlr->dev,
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index b3989dc58ed1..be7685fe8a23 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -443,8 +443,7 @@ struct cxl_switch_decoder {
struct cxl_dport *target[];
};
-struct cxl_root_decoder;
-typedef u64 (*cxl_hpa_to_spa_fn)(struct cxl_root_decoder *cxlrd, u64 hpa);
+typedef u64 (*cxl_to_hpa_fn)(struct cxl_decoder *cxld, u64 hpa);
/**
* struct cxl_root_decoder - Static platform CXL address decoder
@@ -459,7 +458,7 @@ typedef u64 (*cxl_hpa_to_spa_fn)(struct cxl_root_decoder *cxlrd, u64 hpa);
struct cxl_root_decoder {
struct resource *res;
atomic_t region_id;
- cxl_hpa_to_spa_fn hpa_to_spa;
+ cxl_to_hpa_fn hpa_to_spa;
void *platform_data;
struct mutex range_lock;
int qos_class;
--
2.39.5
next prev parent reply other threads:[~2025-01-07 14:11 UTC|newest]
Thread overview: 117+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-07 14:09 [PATCH v1 00/29] cxl: Add address translation support and enable AMD Zen5 platforms Robert Richter
2025-01-07 14:09 ` [PATCH v1 01/29] cxl: Remove else after return Robert Richter
2025-01-07 16:10 ` Gregory Price
2025-01-07 16:37 ` Dave Jiang
2025-01-09 12:00 ` Robert Richter
2025-01-07 14:09 ` [PATCH v1 02/29] cxl/pci: Moving code in cxl_hdm_decode_init() Robert Richter
2025-01-07 16:18 ` Gregory Price
2025-01-29 12:47 ` Robert Richter
2025-01-07 14:09 ` [PATCH v1 03/29] cxl/pci: cxl_hdm_decode_init: Move comment Robert Richter
2025-01-07 16:46 ` Gregory Price
2025-01-07 14:09 ` [PATCH v1 04/29] cxl/pci: Add comments to cxl_hdm_decode_init() Robert Richter
2025-01-07 16:51 ` Gregory Price
2025-01-13 16:47 ` Jonathan Cameron
2025-01-07 14:09 ` [PATCH v1 05/29] cxl/region: Move find_cxl_root() to cxl_add_to_region() Robert Richter
2025-01-07 16:49 ` Gregory Price
2025-01-13 16:52 ` Jonathan Cameron
2025-01-07 14:09 ` [PATCH v1 06/29] cxl/region: Factor out code to find the root decoder Robert Richter
2025-01-07 16:57 ` Gregory Price
2025-01-13 16:59 ` Jonathan Cameron
2025-01-29 13:13 ` Robert Richter
2025-01-07 14:09 ` [PATCH v1 07/29] cxl/region: Factor out code to find a root decoder's region Robert Richter
2025-01-07 16:59 ` Gregory Price
2025-01-30 16:43 ` Robert Richter
2025-01-07 14:09 ` [PATCH v1 08/29] cxl/region: Split region registration into an initialization and adding part Robert Richter
2025-01-07 18:29 ` Gregory Price
2025-01-30 16:53 ` Robert Richter
2025-01-09 1:08 ` Li Ming
2025-01-09 10:30 ` Robert Richter
2025-01-07 14:09 ` [PATCH v1 09/29] cxl/region: Use iterator to find the root port in cxl_find_root_decoder() Robert Richter
2025-01-07 17:23 ` Gregory Price
2025-01-13 18:11 ` Jonathan Cameron
2025-01-07 14:09 ` [PATCH v1 10/29] cxl/region: Add function to find a port's switch decoder by range Robert Richter
2025-01-07 18:38 ` Gregory Price
2025-01-30 16:58 ` Robert Richter
2025-01-17 21:31 ` Ben Cheatham
2025-01-30 17:02 ` Robert Richter
2025-01-07 14:09 ` [PATCH v1 11/29] cxl/region: Unfold cxl_find_root_decoder() into cxl_endpoint_initialize() Robert Richter
2025-01-07 18:41 ` Gregory Price
2025-01-07 14:09 ` Robert Richter [this message]
2025-01-07 18:44 ` [PATCH v1 12/29] cxl: Modify address translation callback for generic use Gregory Price
2025-01-31 14:19 ` Robert Richter
2025-01-17 21:31 ` Ben Cheatham
2025-01-31 14:27 ` Robert Richter
2025-01-07 14:09 ` [PATCH v1 13/29] cxl: Introduce callback to translate an HPA range from a port to its parent Robert Richter
2025-01-07 18:47 ` Gregory Price
2025-01-07 14:10 ` [PATCH v1 14/29] cxl: Introduce parent_port_of() helper Robert Richter
2025-01-07 18:50 ` Gregory Price
2025-01-13 18:20 ` Jonathan Cameron
2025-01-07 14:10 ` [PATCH v1 15/29] cxl/region: Use an endpoint's SPA range to find a region Robert Richter
2025-01-07 19:14 ` Gregory Price
2025-02-05 8:48 ` Robert Richter
2025-01-14 10:59 ` Jonathan Cameron
2025-01-31 15:46 ` Robert Richter
2025-01-17 21:31 ` Ben Cheatham
2025-02-05 9:00 ` Robert Richter
2025-01-07 14:10 ` [PATCH v1 16/29] cxl/region: Use translated HPA ranges to calculate the endpoint position Robert Richter
2025-01-07 22:01 ` Gregory Price
2025-02-05 10:38 ` Robert Richter
2025-01-17 21:31 ` Ben Cheatham
2025-02-05 10:43 ` Robert Richter
2025-01-07 14:10 ` [PATCH v1 17/29] cxl/region: Rename function to cxl_find_decoder_early() Robert Richter
2025-01-07 22:06 ` Gregory Price
2025-02-05 10:56 ` Robert Richter
2025-01-07 14:10 ` [PATCH v1 18/29] cxl/region: Avoid duplicate call of cxl_find_decoder_early() Robert Richter
2025-01-07 22:11 ` Gregory Price
2025-01-07 14:10 ` [PATCH v1 19/29] cxl/region: Use endpoint's HPA range to find the port's decoder Robert Richter
2025-01-07 22:18 ` Gregory Price
2025-02-06 10:50 ` Robert Richter
2025-01-17 21:31 ` Ben Cheatham
2025-02-06 11:03 ` Robert Richter
2025-01-07 14:10 ` [PATCH v1 20/29] cxl/region: Use translated HPA ranges " Robert Richter
2025-01-07 22:33 ` Gregory Price
2025-02-06 11:31 ` Robert Richter
2025-01-07 14:10 ` [PATCH v1 21/29] cxl/region: Lock decoders that need address translation Robert Richter
2025-01-07 22:35 ` Gregory Price
2025-02-06 13:23 ` Robert Richter
2025-01-07 14:10 ` [PATCH v1 22/29] cxl/region: Use translated HPA ranges to create a region Robert Richter
2025-01-07 23:08 ` Gregory Price
2025-02-06 13:25 ` Robert Richter
2025-01-07 14:10 ` [PATCH v1 23/29] cxl/region: Use root decoders interleaving parameters " Robert Richter
2025-01-13 17:48 ` Alison Schofield
2025-02-14 13:06 ` Robert Richter
2025-01-07 14:10 ` [PATCH v1 24/29] cxl/region: Use endpoint's SPA range to check " Robert Richter
2025-01-13 17:38 ` Alison Schofield
2025-02-14 13:09 ` Robert Richter
2025-01-07 14:10 ` [PATCH v1 25/29] cxl/amd: Enable Zen5 address translation using ACPI PRMT Robert Richter
2025-01-07 16:32 ` Robert Richter
2025-01-07 23:28 ` Gregory Price
2025-01-08 14:52 ` Robert Richter
2025-01-08 15:49 ` Gregory Price
2025-01-08 15:48 ` Gregory Price
2025-01-09 10:14 ` Robert Richter
2025-01-14 11:13 ` Jonathan Cameron
2025-01-17 7:59 ` Robert Richter
2025-01-17 11:46 ` Jonathan Cameron
2025-01-17 14:10 ` Robert Richter
2025-01-09 22:25 ` Gregory Price
2025-01-15 15:05 ` Robert Richter
2025-01-15 17:05 ` Gregory Price
2025-01-15 22:24 ` Gregory Price
2025-01-17 14:06 ` Robert Richter
2025-01-10 22:48 ` Gregory Price
2025-01-17 8:41 ` Robert Richter
2025-01-17 21:32 ` Ben Cheatham
2025-01-28 9:29 ` Robert Richter
2025-01-07 14:10 ` [PATCH v1 26/29] MAINTAINERS: CXL: Add entry for AMD platform support (CXL_AMD) Robert Richter
2025-01-07 14:10 ` [PATCH v1 27/29] cxl/region: Show message on registration failure Robert Richter
2025-01-07 23:11 ` Gregory Price
2025-01-07 14:10 ` [PATCH v1 28/29] cxl/region: Show message on broken target list Robert Richter
2025-01-07 23:12 ` Gregory Price
2025-01-14 11:16 ` Jonathan Cameron
2025-02-06 21:23 ` Robert Richter
2025-02-07 17:51 ` Jonathan Cameron
2025-02-12 9:08 ` Robert Richter
2025-01-07 14:10 ` [PATCH v1 29/29] cxl: Show message when a decoder was added to a port Robert Richter
2025-01-07 23:15 ` Gregory Price
2025-01-13 18:41 ` [PATCH v1 00/29] cxl: Add address translation support and enable AMD Zen5 platforms Alison Schofield
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