From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <dave@stgolabs.net>,
<alison.schofield@intel.com>, <vishal.l.verma@intel.com>,
<ira.weiny@intel.com>, <dan.j.williams@intel.com>,
<rrichter@amd.com>
Subject: Re: [PATCH v9 05/10] cxl/test: Refactor decoder setup to reduce cxl_test burden
Date: Tue, 9 Sep 2025 16:44:01 +0100 [thread overview]
Message-ID: <20250909164401.00002430@huawei.com> (raw)
In-Reply-To: <20250829180928.842707-6-dave.jiang@intel.com>
On Fri, 29 Aug 2025 11:09:23 -0700
Dave Jiang <dave.jiang@intel.com> wrote:
> Group the decoder setup code in switch and endpoint port probe into a
> single function for each to reduce the number of functions to be mocked
> in cxl_test. Introduce devm_cxl_switch_port_decoders_setup() and
> devm_cxl_endpoint_decoders_setup(). These two functions will be mocked
> instead with some functions optimized out since the mock version does
> not do anything. Remove devm_cxl_setup_hdm(),
> devm_cxl_add_passthrough_decoder(), and devm_cxl_enumerate_decoders() in
> cxl_test mock code. In turn, mock_cxl_add_passthrough_decoder() can be
> removed since cxl_test does not setup passthrough decoders.
> __wrap_cxl_hdm_decode_init() and __wrap_cxl_dvsec_rr_decode() can be
> removed as well since they only return 0 when called.
>
> Suggested-by: Robert Richter <rrichter@amd.com>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
There was a bit of code reordering in here that made it a little hard
to check but I can't see an easy way to make that more obvious.
A precursor patch shuffling the code would perhaps allow it to be
discussed in the patch description, but perhaps that's overkill
Anyhow, I'm fairly sure it is fine.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c
> index cf32dc50b7a6..d8cae2b5bac6 100644
> --- a/drivers/cxl/port.c
> +++ b/drivers/cxl/port.c
>
> static int cxl_endpoint_port_probe(struct cxl_port *port)
> {
> - struct cxl_endpoint_dvsec_info info = { .port = port };
> struct cxl_memdev *cxlmd = to_cxl_memdev(port->uport_dev);
> - struct cxl_dev_state *cxlds = cxlmd->cxlds;
> - struct cxl_hdm *cxlhdm;
> int rc;
>
> - rc = cxl_dvsec_rr_decode(cxlds, &info);
> - if (rc < 0)
> - return rc;
> -
> - cxlhdm = devm_cxl_setup_hdm(port, &info);
> - if (IS_ERR(cxlhdm)) {
> - if (PTR_ERR(cxlhdm) == -ENODEV)
> - dev_err(&port->dev, "HDM decoder registers not found\n");
> - return PTR_ERR(cxlhdm);
> - }
> -
> /* Cache the data early to ensure is_visible() works */
> read_cdat_data(port);
> cxl_endpoint_parse_cdat(port);
> @@ -117,11 +87,7 @@ static int cxl_endpoint_port_probe(struct cxl_port *port)
> if (rc)
> return rc;
Hmm. The reordering makes me a little nervous but I 'think' it's ok as the
code in between is all related to the cxlmd which none of the
code above is directly related to.
>
> - rc = cxl_hdm_decode_init(cxlds, cxlhdm, &info);
> - if (rc)
> - return rc;
> -
> - rc = devm_cxl_enumerate_decoders(cxlhdm, &info);
> + rc = devm_cxl_endpoint_decoders_setup(port);
> if (rc)
> return rc;
next prev parent reply other threads:[~2025-09-09 15:44 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-29 18:09 [PATCH v9 00/10] cxl: Delay HB port and switch dport probing until endpoint dev probe Dave Jiang
2025-08-29 18:09 ` [PATCH v9 01/10] cxl: Add helper to detect top of CXL device topology Dave Jiang
2025-08-29 18:09 ` [PATCH v9 02/10] cxl: Add helper to reap dport Dave Jiang
2025-09-15 9:42 ` Robert Richter
2025-08-29 18:09 ` [PATCH v9 03/10] cxl: Add a cached copy of target_map to cxl_decoder Dave Jiang
2025-09-10 2:22 ` Alison Schofield
2025-09-15 10:29 ` Robert Richter
2025-08-29 18:09 ` [PATCH v9 04/10] cxl: Move port register setup to first dport appear Dave Jiang
2025-09-10 2:21 ` Alison Schofield
2025-08-29 18:09 ` [PATCH v9 05/10] cxl/test: Refactor decoder setup to reduce cxl_test burden Dave Jiang
2025-09-09 15:44 ` Jonathan Cameron [this message]
2025-09-10 2:19 ` Alison Schofield
2025-09-18 9:18 ` Robert Richter
2025-08-29 18:09 ` [PATCH v9 06/10] cxl: Defer dport allocation for switch ports Dave Jiang
2025-09-09 15:56 ` Jonathan Cameron
2025-09-10 0:53 ` Alison Schofield
2025-08-29 18:09 ` [PATCH v9 07/10] cxl/test: Add mock version of devm_cxl_add_dport_by_dev() Dave Jiang
2025-08-29 18:09 ` [PATCH v9 08/10] cxl/test: Adjust the mock version of devm_cxl_switch_port_decoders_setup() Dave Jiang
2025-09-09 15:57 ` Jonathan Cameron
2025-09-10 0:48 ` Alison Schofield
2025-08-29 18:09 ` [PATCH v9 09/10] cxl/test: Setup target_map for cxl_test decoder initialization Dave Jiang
2025-09-10 0:27 ` Alison Schofield
2025-08-29 18:09 ` [PATCH v9 10/10] cxl: Change sslbis handler to only handle single dport Dave Jiang
2025-09-17 17:28 ` [PATCH v9 00/10] cxl: Delay HB port and switch dport probing until endpoint dev probe Dave Jiang
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