From: Robert Richter <rrichter@amd.com>
To: Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Dave Jiang <dave.jiang@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Jonathan Cameron <jonathan.cameron@huawei.com>
Cc: <linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Gregory Price <gourry@gourry.net>,
"Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>,
Terry Bowman <terry.bowman@amd.com>,
Joshua Hahn <joshua.hahnjy@gmail.com>,
Robert Richter <rrichter@amd.com>
Subject: [PATCH v4 07/14] cxl/region: Use region data to get the root decoder
Date: Mon, 3 Nov 2025 19:47:48 +0100 [thread overview]
Message-ID: <20251103184804.509762-8-rrichter@amd.com> (raw)
In-Reply-To: <20251103184804.509762-1-rrichter@amd.com>
To find a region's root decoder, the endpoint's HPA range is used to
search the matching decoder by its range. With address translation the
endpoint decoder's range is in a different address space and thus
cannot be used to determine the root decoder.
The region parameters are encapsulated within struc cxl_region_context
and may include the translated Host Physical Address (HPA) range. Use
this context to identify the root decoder rather than relying on the
endpoint.
Modify cxl_find_root_decoder() and add the region context as
parameter. Rename this function to get_cxl_root_decoder() as a
counterpart to put_cxl_root_decoder(). Simplify the implementation by
removing function cxl_port_find_switch_decode(). The function is
unnecessary because it is not referenced or utilized elsewhere in the
code.
Signed-off-by: Robert Richter <rrichter@amd.com>
---
drivers/cxl/core/region.c | 50 +++++++++++++++++----------------------
1 file changed, 22 insertions(+), 28 deletions(-)
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index 2cfc29a2b588..2dd9e9be4889 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -3350,47 +3350,39 @@ static int devm_cxl_add_dax_region(struct cxl_region *cxlr)
return rc;
}
-static int match_decoder_by_range(struct device *dev, const void *data)
+static int match_root_decoder(struct device *dev, const void *data)
{
const struct range *r1, *r2 = data;
- struct cxl_decoder *cxld;
+ struct cxl_root_decoder *cxlrd;
- if (!is_switch_decoder(dev))
+ if (!is_root_decoder(dev))
return 0;
- cxld = to_cxl_decoder(dev);
- r1 = &cxld->hpa_range;
- return range_contains(r1, r2);
-}
+ cxlrd = to_cxl_root_decoder(dev);
+ r1 = &cxlrd->cxlsd.cxld.hpa_range;
-static struct cxl_decoder *
-cxl_port_find_switch_decoder(struct cxl_port *port, struct range *hpa_range)
-{
- struct device *cxld_dev = device_find_child(&port->dev, hpa_range,
- match_decoder_by_range);
-
- return cxld_dev ? to_cxl_decoder(cxld_dev) : NULL;
+ return range_contains(r1, r2);
}
static struct cxl_root_decoder *
-cxl_find_root_decoder(struct cxl_endpoint_decoder *cxled)
+get_cxl_root_decoder(struct cxl_endpoint_decoder *cxled,
+ struct cxl_region_context *ctx)
{
- struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
struct cxl_port *port = cxled_to_port(cxled);
struct cxl_root *cxl_root __free(put_cxl_root) = find_cxl_root(port);
- struct cxl_decoder *root, *cxld = &cxled->cxld;
- struct range *hpa_range = &cxld->hpa_range;
+ struct device *cxlrd_dev;
- root = cxl_port_find_switch_decoder(&cxl_root->port, hpa_range);
- if (!root) {
- dev_err(cxlmd->dev.parent,
+ cxlrd_dev = device_find_child(&cxl_root->port.dev, &ctx->hpa_range,
+ match_root_decoder);
+ if (!cxlrd_dev) {
+ dev_err(port->uport_dev,
"%s:%s no CXL window for range %#llx:%#llx\n",
- dev_name(&cxlmd->dev), dev_name(&cxld->dev),
- hpa_range->start, hpa_range->end);
- return NULL;
+ dev_name(&ctx->cxlmd->dev), dev_name(&cxled->cxld.dev),
+ ctx->hpa_range.start, ctx->hpa_range.end);
+ return ERR_PTR(-ENXIO);
}
- return to_cxl_root_decoder(&root->dev);
+ return to_cxl_root_decoder(cxlrd_dev);
}
static int match_region_by_range(struct device *dev, const void *data)
@@ -3584,9 +3576,11 @@ int cxl_add_to_region(struct cxl_endpoint_decoder *cxled)
};
struct cxl_root_decoder *cxlrd __free(put_cxl_root_decoder) =
- cxl_find_root_decoder(cxled);
- if (!cxlrd)
- return -ENXIO;
+ get_cxl_root_decoder(cxled, &ctx);
+
+ rc = PTR_ERR_OR_ZERO(cxlrd);
+ if (rc)
+ return rc;
/*
* Ensure that if multiple threads race to construct_region()
--
2.47.3
next prev parent reply other threads:[~2025-11-03 18:49 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-03 18:47 [PATCH v4 00/14] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement Robert Richter
2025-11-03 18:47 ` [PATCH v4 01/14] cxl/region: Store root decoder in struct cxl_region Robert Richter
2025-11-11 14:45 ` Jonathan Cameron
2025-11-14 9:38 ` Robert Richter
2025-11-03 18:47 ` [PATCH v4 02/14] cxl/region: Store HPA range " Robert Richter
2025-11-11 11:25 ` Robert Richter
2025-11-03 18:47 ` [PATCH v4 03/14] cxl/region: Rename misleading variable name @hpa to @hpa_range Robert Richter
2025-11-03 21:36 ` Dave Jiang
2025-11-11 14:41 ` Jonathan Cameron
2025-11-12 16:23 ` Dave Jiang
2025-11-03 18:47 ` [PATCH v4 04/14] cxl/region: Add @hpa_range argument to function cxl_calc_interleave_pos() Robert Richter
2025-11-03 21:52 ` Dave Jiang
2025-11-04 3:04 ` Alison Schofield
2025-11-11 11:28 ` Robert Richter
2025-11-04 16:52 ` kernel test robot
2025-11-03 18:47 ` [PATCH v4 05/14] cxl: Simplify cxl_root_ops allocation and handling Robert Richter
2025-11-03 21:53 ` Dave Jiang
2025-11-04 23:02 ` Dave Jiang
2025-11-07 15:45 ` Robert Richter
2025-11-07 15:50 ` Dave Jiang
2025-11-11 14:52 ` Jonathan Cameron
2025-11-03 18:47 ` [PATCH v4 06/14] cxl/region: Separate region parameter setup and region construction Robert Richter
2025-11-03 22:05 ` Dave Jiang
2025-11-07 15:59 ` Robert Richter
2025-11-11 14:59 ` Jonathan Cameron
2025-11-11 15:02 ` Jonathan Cameron
2025-11-03 18:47 ` Robert Richter [this message]
2025-11-03 22:30 ` [PATCH v4 07/14] cxl/region: Use region data to get the root decoder Dave Jiang
2025-11-11 15:14 ` Jonathan Cameron
2025-11-03 18:47 ` [PATCH v4 08/14] cxl: Introduce callback for HPA address ranges translation Robert Richter
2025-11-03 23:09 ` Dave Jiang
2025-11-11 15:15 ` Jonathan Cameron
2025-11-03 18:47 ` [PATCH v4 09/14] cxl/acpi: Prepare use of EFI runtime services Robert Richter
2025-11-03 23:34 ` Dave Jiang
2025-11-11 15:17 ` Jonathan Cameron
2025-11-03 18:47 ` [PATCH v4 10/14] cxl: Enable AMD Zen5 address translation using ACPI PRMT Robert Richter
2025-11-04 1:00 ` Dave Jiang
2025-11-11 9:23 ` Robert Richter
2025-11-04 9:33 ` kernel test robot
2025-11-04 12:49 ` Robert Richter
2025-11-04 23:35 ` kernel test robot
2025-11-11 15:30 ` Jonathan Cameron
2025-11-13 11:24 ` Robert Richter
2025-11-03 18:47 ` [PATCH v4 11/14] cxl/atl: Lock decoders that need address translation Robert Richter
2025-11-04 17:13 ` Dave Jiang
2025-11-11 12:54 ` Robert Richter
2025-11-12 16:34 ` Dave Jiang
2025-11-13 20:05 ` Robert Richter
2025-11-13 20:36 ` Dave Jiang
2025-11-14 7:34 ` Robert Richter
2025-11-14 15:21 ` Dave Jiang
2025-11-11 15:31 ` Jonathan Cameron
2025-11-03 18:47 ` [PATCH v4 12/14] cxl: Simplify cxl_rd_ops allocation and handling Robert Richter
2025-11-04 17:26 ` Dave Jiang
2025-11-04 23:02 ` Alison Schofield
2025-11-11 12:07 ` Robert Richter
2025-11-11 15:34 ` Jonathan Cameron
2025-11-03 18:47 ` [PATCH v4 13/14] cxl/acpi: Group xor arithmetric setup code in a single block Robert Richter
2025-11-11 15:35 ` Jonathan Cameron
2025-11-03 18:47 ` [PATCH v4 14/14] cxl/region: Remove local variable @inc in cxl_port_setup_targets() Robert Richter
2025-11-11 15:36 ` Jonathan Cameron
2025-11-13 20:10 ` Robert Richter
2025-11-04 16:17 ` [PATCH v4 00/14] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement Alison Schofield
2025-11-17 15:34 ` Robert Richter
2025-11-17 17:23 ` Gregory Price
2025-11-11 14:01 ` Gregory Price
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