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From: Jonathan Cameron <jic23@kernel.org>
To: Anisa Su <anisa.su887@gmail.com>
Cc: linux-cxl@vger.kernel.org, alison.schofield@intel.com,
	dave.jiang@intel.com, gourry@gourry.net, icheng@nvidia.com,
	ming.li@zohomail.com, vishal.l.verma@intel.com,
	dave@stgolabs.net, benjamin.cheatham@amd.com,
	Ira Weiny <iweiny@kernel.org>, Wonjae Lee <wj28.lee@samsung.com>,
	Junhee Park <jh9934.park@samsung.com>,
	Heesoo Kim <habil.kim@samsung.com>
Subject: Re: [RESEND PATCH v13 3/8] cxl/cdat: Gather DSMAS data for DCD partitions
Date: Fri, 11 Sep 2026 01:56:25 +0100	[thread overview]
Message-ID: <20260911015625.7f06c4eb@jic23-hlaptop> (raw)
In-Reply-To: <aqNFEUWNMmTvJmh_@cxlqual>

On Fri, 11 Sep 2026 09:02:25 +0900
Anisa Su <anisa.su887@gmail.com> wrote:

> On Tue, Sep 08, 2026 at 09:52:00PM +0100, Jonathan Cameron wrote:
> > On Tue,  8 Sep 2026 03:15:07 -0700
> > Anisa Su <anisa.su887@gmail.com> wrote:
> >   
> > > From: Ira Weiny <iweiny@kernel.org>
> > > 
> > > Additional DCD partition (AKA region) information is contained in the
> > > DSMAS CDAT tables, including performance and shareable attributes.
> > > 
> > > Match DCD partitions with DSMAS tables and store the meta data.
> > > 
> > > Signed-off-by: Ira Weiny <iweiny@kernel.org>
> > > Co-developed-by: Anisa Su <anisa.su@samsung.com>
> > > Signed-off-by: Anisa Su <anisa.su@samsung.com>
> > > Tested-by: Wonjae Lee <wj28.lee@samsung.com>
> > > Tested-by: Junhee Park <jh9934.park@samsung.com>
> > > Tested-by: Heesoo Kim <habil.kim@samsung.com>
> > >   
> > Minor thing inline. I think we can take a bit of refactoring
> > you did a little further and end up with simpler code.
> >   
> > > ---
> > >  drivers/cxl/core/cdat.c   | 32 +++++++++++++++++++++++++-------
> > >  drivers/cxl/core/hdm.c    |  1 +
> > >  drivers/cxl/core/mbox.c   |  9 +++++++++
> > >  drivers/cxl/core/memdev.c | 17 ++++++++++-------
> > >  drivers/cxl/cxlmem.h      |  2 ++
> > >  include/cxl/cxl.h         |  4 ++++
> > >  6 files changed, 51 insertions(+), 14 deletions(-)
> > > 
> > > diff --git a/drivers/cxl/core/cdat.c b/drivers/cxl/core/cdat.c
> > > index 5c9f07262513..05058d4520f2 100644
> > > --- a/drivers/cxl/core/cdat.c
> > > +++ b/drivers/cxl/core/cdat.c
> > > @@ -17,6 +17,7 @@ struct dsmas_entry {
> > >  	struct access_coordinate cdat_coord[ACCESS_COORDINATE_MAX];
> > >  	int entries;
> > >  	int qos_class;
> > > +	bool shareable;
> > >  };
> > >  
> > >  static u32 cdat_normalize(u16 entry, u64 base, u8 type)
> > > @@ -74,6 +75,8 @@ static int cdat_dsmas_handler(union acpi_subtable_headers *header, void *arg,
> > >  		return -ENOMEM;
> > >  
> > >  	dent->handle = dsmas->dsmad_handle;
> > > +	/* Shareable is CDAT 1.03 and later, DSMAS Flags bit 3 */
> > > +	dent->shareable = dsmas->flags & ACPI_CDAT_DSMAS_SHAREABLE;
> > >  	dent->dpa_range.start = le64_to_cpu((__force __le64)dsmas->dpa_base_address);
> > >  	dent->dpa_range.end = le64_to_cpu((__force __le64)dsmas->dpa_base_address) +
> > >  			      le64_to_cpu((__force __le64)dsmas->dpa_length) - 1;
> > > @@ -266,18 +269,33 @@ static void cxl_memdev_set_qos_class(struct cxl_dev_state *cxlds,
> > >  		bool found = false;
> > >  
> > >  		for (int i = 0; i < cxlds->nr_partitions; i++) {
> > > -			struct resource *res = &cxlds->part[i].res;
> > > +			struct cxl_dpa_partition *part = &cxlds->part[i];
> > >  			struct range range = {
> > > -				.start = res->start,
> > > -				.end = res->end,
> > > +				.start = part->res.start,
> > > +				.end = part->res.end,
> > >  			};
> > >  
> > > -			if (range_contains(&range, &dent->dpa_range)) {
> > > -				update_perf_entry(dev, dent,
> > > -						  &cxlds->part[i].perf);
> > > -				found = true;
> > > +			if (!range_contains(&range, &dent->dpa_range))
> > > +				continue;
> > > +
> > > +			found = true;
> > > +			/*
> > > +			 * part->handle is from Get DC Config, dent->handle
> > > +			 * from the CDAT DSMAS entry.
> > > +			 */
> > > +			if (part->mode == CXL_PARTMODE_DYNAMIC_RAM_1 &&
> > > +			    dent->handle != part->handle) {
> > > +				dev_warn(dev,
> > > +					 "DSMAD handle mismatch: %pra has %u, DSMAS %pra has %u\n",
> > > +					 &range, part->handle,
> > > +					 &dent->dpa_range, dent->handle);
> > >  				break;  
> > 
> > For the error path I'd just return here. Maybe there is more after this loop
> > in future patches that make it useful to break instead?
> >   
> > >  			}
> > > +
> > > +			update_perf_entry(dev, dent, &part->perf);
> > > +			if (part->mode == CXL_PARTMODE_DYNAMIC_RAM_1)
> > > +				part->shareable = dent->shareable;
> > > +			break;  
> > 
> > Come to think of it, can return in this path too.  Then you don't need the
> > local variable found.
> >   
> Ah the break in both spots is so we print a debug message if no
> partition is found matching the dsmas entry:
> 
> if (!found)
> 	dev_dbg(dev, "no partition for dsmas dpa: %pra\n",
> 		&dent->dpa_range);
> 
> It got cut off in the diff.

For both break paths, found == true

Jonathan

> 
> > >  		}  
> >   
> > >  
> > >  		if (!found)  


  reply	other threads:[~2026-09-11  0:56 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-08 10:15 [RESEND PATCH v13 0/8] DCD Prep Series Anisa Su
2026-09-08 10:15 ` [RESEND PATCH v13 1/8] cxl/mbox: Flag support for Dynamic Capacity Devices (DCD) Anisa Su
2026-09-08 15:39   ` dave
2026-09-08 18:45   ` Jonathan Cameron
2026-09-08 10:15 ` [RESEND PATCH v13 2/8] cxl/mem: Read dynamic capacity configuration from the device Anisa Su
2026-09-08 15:59   ` Davidlohr Bueso
2026-09-08 20:43   ` Jonathan Cameron
2026-09-10 23:56     ` Anisa Su
2026-09-11  0:53       ` Jonathan Cameron
2026-09-11 16:38         ` Anisa Su
2026-09-08 10:15 ` [RESEND PATCH v13 3/8] cxl/cdat: Gather DSMAS data for DCD partitions Anisa Su
2026-09-08 20:52   ` Jonathan Cameron
2026-09-11  0:02     ` Anisa Su
2026-09-11  0:56       ` Jonathan Cameron [this message]
2026-09-11 16:37         ` Anisa Su
2026-09-08 10:15 ` [RESEND PATCH v13 4/8] cxl/events: Split event msgnum configuration from irq setup Anisa Su
2026-09-08 16:37   ` Davidlohr Bueso
2026-09-08 10:15 ` [RESEND PATCH v13 5/8] cxl/pci: Factor out interrupt policy check Anisa Su
2026-09-08 17:17   ` Davidlohr Bueso
2026-09-08 10:15 ` [RESEND PATCH v13 6/8] cxl/mem: Configure dynamic capacity interrupts Anisa Su
2026-09-08 10:43   ` sashiko-bot
2026-09-11 21:10     ` Anisa Su
2026-09-12  0:09       ` Gregory Price
2026-09-08 22:14   ` Jonathan Cameron
2026-09-11 18:21     ` Anisa Su
2026-09-08 10:15 ` [RESEND PATCH v13 7/8] cxl/core: Enforce partition order/simplify partition calls Anisa Su
2026-09-08 10:15 ` [RESEND PATCH v13 8/8] Documentation/cxl: Document DPA partition layout and ordering rules Anisa Su
2026-09-08 22:17   ` Jonathan Cameron
2026-09-11 20:39     ` Anisa Su
2026-09-09 15:19   ` Davidlohr Bueso
2026-09-11 20:38     ` Anisa Su
2026-09-11 20:50       ` Davidlohr Bueso
2026-09-12  0:20   ` Gregory Price

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