From: Ben Cheatham <benjamin.cheatham@amd.com>
To: <alejandro.lucero-palau@amd.com>
Cc: Alejandro Lucero <alucerop@amd.com>, <linux-cxl@vger.kernel.org>,
<dan.j.williams@intel.com>
Subject: Re: [RFC 0/2] type2 cxl initialization
Date: Mon, 3 Mar 2025 14:38:49 -0600 [thread overview]
Message-ID: <289fc275-43b6-424c-8c0c-28c5d527ac35@amd.com> (raw)
In-Reply-To: <20250220200041.3891165-1-alejandro.lucero-palau@amd.com>
On 2/20/25 2:00 PM, alejandro.lucero-palau@amd.com wrote:
> From: Alejandro Lucero <alucerop@amd.com>
>
> Avoiding to send the full type2 support patchset until there is an
> agreement about how to do the cxl initialization from accel drivers.
>
> Using the idea from fwctl for embedding cxl_dev_state in a private
> accel driver struct and a macro helping for the allocation and
> initialization of such struct.
>
> The main problem is the amount of internal cxl structs which need to be
> public for accel drivers which we tried to avoid since v1 of the type2
> patchset history.
I have a suggestion or two in the next patch, but in my opinion the only
potentially problematic exports are the cxl register structs. I'm assuming
allowing accelerator drivers access to those may cause stale values in the
CXL driver, but I haven't looked. The only suggestion I have there is to
use pointers to the struct instead, but I imagine achieving could be a
non-trivial amount of effort.
The only other member that may be a problem is the DPA partition info,
but I don't know enough about that to comment.
>
> Alejandro Lucero (2):
> cxl: add type2 device basic support
> sfc: add cxl support
>
> drivers/cxl/core/mbox.c | 3 +-
> drivers/cxl/core/memdev.c | 25 +++
> drivers/cxl/core/pci.c | 1 +
> drivers/cxl/core/regs.c | 1 +
> drivers/cxl/cxl.h | 98 +----------
> drivers/cxl/cxlmem.h | 108 +------------
> drivers/cxl/cxlpci.h | 21 ---
> drivers/cxl/pci.c | 17 +-
> drivers/net/ethernet/sfc/Kconfig | 6 +
> drivers/net/ethernet/sfc/Makefile | 1 +
> drivers/net/ethernet/sfc/efx.c | 15 +-
> drivers/net/ethernet/sfc/efx_cxl.c | 53 ++++++
> drivers/net/ethernet/sfc/efx_cxl.h | 40 +++++
> drivers/net/ethernet/sfc/net_driver.h | 10 ++
> include/cxl/cxl.h | 225 ++++++++++++++++++++++++++
> include/cxl/pci.h | 23 +++
> 16 files changed, 417 insertions(+), 230 deletions(-)
> create mode 100644 drivers/net/ethernet/sfc/efx_cxl.c
> create mode 100644 drivers/net/ethernet/sfc/efx_cxl.h
> create mode 100644 include/cxl/cxl.h
> create mode 100644 include/cxl/pci.h
>
>
> base-commit: d5d2106e2118c4e09fef131d9889f79559b95bfc
next prev parent reply other threads:[~2025-03-03 20:39 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-20 20:00 [RFC 0/2] type2 cxl initialization alejandro.lucero-palau
2025-02-20 20:00 ` [RFC type cxl initialization 1/2] cxl: add type2 device basic support alejandro.lucero-palau
2025-03-03 20:15 ` Dan Williams
2025-03-04 14:21 ` Alejandro Lucero Palau
2025-03-03 20:39 ` Ben Cheatham
2025-03-03 20:51 ` Dan Williams
2025-03-03 21:26 ` Ben Cheatham
2025-02-20 20:00 ` [RFC type cxl initialization 2/2] sfc: add cxl support alejandro.lucero-palau
2025-03-03 20:26 ` Dan Williams
2025-03-03 20:38 ` Ben Cheatham [this message]
2025-03-03 20:49 ` [RFC 0/2] type2 cxl initialization Dan Williams
2025-03-03 21:26 ` Ben Cheatham
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