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From: Ira Weiny <ira.weiny@intel.com>
To: <shiju.jose@huawei.com>, <dave.jiang@intel.com>,
	<dan.j.williams@intel.com>, <jonathan.cameron@huawei.com>,
	<alison.schofield@intel.com>, <nifan.cxl@gmail.com>,
	<vishal.l.verma@intel.com>, <ira.weiny@intel.com>,
	<dave@stgolabs.net>, <linux-cxl@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <linuxarm@huawei.com>,
	<tanxiaofei@huawei.com>, <prime.zeng@hisilicon.com>,
	<shiju.jose@huawei.com>
Subject: Re: [PATCH v5 5/6] cxl/events: Update Memory Module Event Record to CXL spec rev 3.1
Date: Fri, 10 Jan 2025 12:46:36 -0600	[thread overview]
Message-ID: <67816b0c869df_177894294f2@iweiny-mobl.notmuch> (raw)
In-Reply-To: <20250110115556.1654-6-shiju.jose@huawei.com>

shiju.jose@ wrote:
> From: Shiju Jose <shiju.jose@huawei.com>
> 

[snip]

> @@ -724,6 +752,7 @@ TRACE_EVENT(cxl_memory_module,
>  
>  		/* Memory Module Event */
>  		__field(u8, event_type)
> +		__field(u8, event_sub_type)
>  
>  		/* Device Health Info */
>  		__field(u8, health_status)
> @@ -734,6 +763,8 @@ TRACE_EVENT(cxl_memory_module,
>  		__field(u32, cor_per_err_cnt)
>  		__field(s16, device_temp)
>  		__field(u8, add_status)
> +		__field(u16, validity_flags)
> +		__array(u8, comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE)
>  	),


With the change of the packing of the record.

Reviewed-by: Ira Weiny <ira.weiny@intel.com>


diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
index cfb8de6f9739..5989e5f9f38d 100644
--- a/drivers/cxl/core/trace.h
+++ b/drivers/cxl/core/trace.h
@@ -753,7 +753,6 @@ TRACE_EVENT(cxl_memory_module,
 
                /* Memory Module Event */
                __field(u8, event_type)
-               __field(u8, event_sub_type)
 
                /* Device Health Info */
                __field(u8, health_status)
@@ -764,8 +763,9 @@ TRACE_EVENT(cxl_memory_module,
                __field(u32, cor_per_err_cnt)
                __field(s16, device_temp)
                __field(u8, add_status)
-               __field(u16, validity_flags)
+               __field(u8, event_sub_type)
                __array(u8, comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE)
+               __field(u16, validity_flags)
        ),
 
        TP_fast_assign(

  reply	other threads:[~2025-01-10 18:46 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-10 11:55 [PATCH v5 0/6] Update Event Records to CXL spec rev 3.1 shiju.jose
2025-01-10 11:55 ` [PATCH v5 1/6] cxl/events: Update Common Event Record " shiju.jose
2025-01-10 17:35   ` Ira Weiny
2025-01-10 11:55 ` [PATCH v5 2/6] cxl/events: Add Component Identifier formatting for " shiju.jose
2025-01-10 17:43   ` Ira Weiny
2025-01-10 11:55 ` [PATCH v5 3/6] cxl/events: Update General Media Event Record to " shiju.jose
2025-01-10 17:54   ` Ira Weiny
2025-01-10 18:30   ` Ira Weiny
2025-01-10 11:55 ` [PATCH v5 4/6] cxl/events: Update DRAM " shiju.jose
2025-01-10 18:27   ` Ira Weiny
2025-01-11  9:16     ` Shiju Jose
2025-01-10 11:55 ` [PATCH v5 5/6] cxl/events: Update Memory Module " shiju.jose
2025-01-10 18:46   ` Ira Weiny [this message]
2025-01-10 11:55 ` [PATCH v5 6/6] cxl/test: Update test code for event records " shiju.jose
2025-01-10 18:48   ` Ira Weiny
2025-01-10 16:06 ` [PATCH v5 0/6] Update Event Records " Jonathan Cameron
2025-01-10 16:46   ` Shiju Jose
2025-01-10 20:18     ` Dave Jiang
2025-01-11  9:22       ` Shiju Jose

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