From: Dan Williams <dan.j.williams@intel.com>
To: Robert Richter <rrichter@amd.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
"Ira Weiny" <ira.weiny@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Dave Jiang <dave.jiang@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>
Cc: <linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Gregory Price <gourry@gourry.net>,
Terry Bowman <terry.bowman@amd.com>,
Robert Richter <rrichter@amd.com>
Subject: Re: [PATCH 0/2] cxl/pci: Inactive downstream port handling
Date: Wed, 5 Mar 2025 11:06:52 -0800 [thread overview]
Message-ID: <67c8a0cc23ec_24b64294f6@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <20250305100123.3077031-1-rrichter@amd.com>
Robert Richter wrote:
> A small series with individual patches to handle inactive downstream
> ports during enumeration. First patch changes downstream port
> enumeration to ignore those with duplicate port IDs. Second patch only
> enables active downstream ports with the link status up.
>
> Patches are independent each and can be applied individually.
>
> Robert Richter (2):
> cxl/pci: Ignore downstream ports with duplicate port IDs
> cxl/pci: Check link status and only enable active dports
Both of these problems are to addressed by work in progress patches to
delay dport enumeration until a cxl_memdev is registered beneath that
leg of CXL topology.
I would prefer to focus on that solution and skip these band-aids in
the near term unless there is an urgent need that makes it clear that
waiting for v6.16 is not tenable.
next prev parent reply other threads:[~2025-03-05 19:07 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-05 10:01 [PATCH 0/2] cxl/pci: Inactive downstream port handling Robert Richter
2025-03-05 10:01 ` [PATCH 1/2] cxl/pci: Ignore downstream ports with duplicate port IDs Robert Richter
2025-03-05 15:09 ` Ira Weiny
2025-03-07 15:28 ` Robert Richter
2025-03-14 12:11 ` Jonathan Cameron
2025-03-05 10:01 ` [PATCH 2/2] cxl/pci: Check link status and only enable active dports Robert Richter
2025-03-05 15:19 ` Ira Weiny
2025-03-07 15:43 ` Robert Richter
2025-03-07 20:51 ` Ira Weiny
2025-03-14 12:14 ` Jonathan Cameron
2025-03-05 19:06 ` Dan Williams [this message]
2025-03-07 14:06 ` [PATCH 0/2] cxl/pci: Inactive downstream port handling Robert Richter
2025-03-07 20:58 ` Dan Williams
-- strict thread matches above, loose matches on Subject: below --
2025-03-05 9:58 Robert Richter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=67c8a0cc23ec_24b64294f6@dwillia2-xfh.jf.intel.com.notmuch \
--to=dan.j.williams@intel.com \
--cc=Jonathan.Cameron@huawei.com \
--cc=alison.schofield@intel.com \
--cc=dave.jiang@intel.com \
--cc=dave@stgolabs.net \
--cc=gourry@gourry.net \
--cc=ira.weiny@intel.com \
--cc=linux-cxl@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=rrichter@amd.com \
--cc=terry.bowman@amd.com \
--cc=vishal.l.verma@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox