Linux CXL
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From: "Dan Williams (nvidia)" <djbw@kernel.org>
To: Alejandro Lucero Palau <alucerop@amd.com>,
	 "Dan Williams (nvidia)" <djbw@kernel.org>,
	 alejandro.lucero-palau@amd.com,  linux-cxl@vger.kernel.org,
	 edward.cree@amd.com,  davem@davemloft.net,  kuba@kernel.org,
	 pabeni@redhat.com,  edumazet@google.com,  dave.jiang@intel.com
Subject: Re: [PATCH v26 6/8] cxl: attach region to an accelerator/type2 memdev
Date: Fri, 01 May 2026 17:46:31 -0700	[thread overview]
Message-ID: <69f54967edd72_3291a9100c3@djbw-dev.notmuch> (raw)
In-Reply-To: <b5110c3e-c5ee-4305-b307-704837fe4f9c@amd.com>

Alejandro Lucero Palau wrote:
[..]
> >> +	}
> > A couple problems here.
> >
> > 1/ Nothing stops a CXL class device from implementing a decoder with
> >     CXL_DECODER_DEVMEM (HDM-DB).
> 
> Uhmmm...

Consider a helpful expander that does not require the host OS to use
cpu_cache_invalidate_memregion() whenever DPA space is changed. I
imagine that would be useful for DCD where there could be a higher
frequency of extent changes.

> >> +	/* hold endpoint lock to setup autoremove of the region */
> >> +	guard(device)(&endpoint->dev);
> > This does not handle the case when ->endpoint is an ERR_PTR() because
> > the memdev never attached in the first instance.
> 
> Not sure about this but, is it not the success of devm_cxl_add_memdev() 
> ensuring this can not happen?

That is only ensured by using the "attach" mechanism.
devm_cxl_add_memdev(..., NULL) is only for the generic memory expander
case. Where the entire usage model is governed by memdev ABIs.

> Note I decouple region attach from memdev creation. No memdev, no call 
> to this function.

Which leads to this problem.

> >> +/* Called at driver exit or when user space triggers cxl region removal. */
> >> +static void efx_cxl_unmap_region(void *data) {
> >> +	struct efx_probe_data *probe_data = data;
> >> +
> >> +	probe_data->cxl_pio_initialised = false;
> >> +	iounmap(probe_data->cxl->ctpio_cxl);
> >> +}
> > I do not see how an async event can safely zap that ctpio_cxl space with
> > zero coordination with the driver, and I do not think you want to burden
> > the fast path with new locks to coordinate this.
> 
> You should look patch 8 where your concern is hopefully tackled. I need 
> to test this further, but there is no need of additional locks.

Please do not structure patches with bugs in the middle of the series.
It burns reviewer resources.

> > Can we please stick with the violent but simple "unload driver" approach
> > for now? Someone removing cxl_acpi, disabling port drivers, or disabling
> > the cxl_mem driver gets to keep all the pieces. Just like force
> > unloading your storage driver underneath your root filesystem. Do not do
> > it unless you want to see the fireworks or test various hotplug flows.
> 
> 
> I have to disagree. The use of CXL is only part of the datapath. The 
> driver can keep going without CXL. The related buffers can be used until 
> the sync between the efx_ef10_disable_piobufs() added in patch 8 and the 
> CXL CTPIO datapath.
> 
> 
> Although the option of unloading the driver is possible, I do not think 
> CXL should decide what to do here when there exists another option.

The concern is creeping complexity. There is no such concept in existing
Linux drivers where an MMIO mapping disappears out from underneath a
running driver. It may start returning all 0xff and fire an error
interrupt, but the driver does not need to worry about responding to
async unmap.

All drivers must already be prepared to be unloaded. So we start with
the simple semantic first to get this functionality landed and then
think about adding sophistication like live fallback to PCI operation.

  reply	other threads:[~2026-05-02  0:46 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-23 18:05 [PATCH v26 0/8] Type2 device basic support alejandro.lucero-palau
2026-04-23 18:05 ` [PATCH v26 1/8] sfc: add cxl support alejandro.lucero-palau
2026-04-29 21:14   ` Cheatham, Benjamin
2026-05-01 10:07     ` Alejandro Lucero Palau
2026-04-23 18:05 ` [PATCH v26 2/8] cxl/sfc: Map cxl regs alejandro.lucero-palau
2026-04-23 18:05 ` [PATCH v26 3/8] cxl/sfc: Initialize dpa without a mailbox alejandro.lucero-palau
2026-04-23 18:05 ` [PATCH v26 4/8] cxl: Prepare memdev creation for type2 alejandro.lucero-palau
2026-04-30 23:23   ` Dan Williams (nvidia)
2026-04-23 18:05 ` [PATCH v26 5/8] sfc: create type2 cxl memdev alejandro.lucero-palau
2026-04-23 18:05 ` [PATCH v26 6/8] cxl: attach region to an accelerator/type2 memdev alejandro.lucero-palau
2026-04-29 21:14   ` Cheatham, Benjamin
2026-05-01 10:35     ` Alejandro Lucero Palau
2026-05-01  2:00   ` Dan Williams (nvidia)
2026-05-01 10:59     ` Alejandro Lucero Palau
2026-05-02  0:46       ` Dan Williams (nvidia) [this message]
2026-05-05 20:51         ` Alejandro Lucero Palau
2026-04-23 18:05 ` [PATCH v26 7/8] cxl: Avoid dax creation for accelerators alejandro.lucero-palau
2026-04-29 21:14   ` Cheatham, Benjamin
2026-04-23 18:05 ` [PATCH v26 8/8] sfc: support pio mapping based on cxl alejandro.lucero-palau
2026-04-23 22:07 ` [PATCH v26 0/8] Type2 device basic support Dave Jiang

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