Linux CXL
 help / color / mirror / Atom feed
 messages from 2023-07-20 20:38:39 to 2023-08-04 14:02:45 UTC [more...]

[PATCH 0/3] cxl/memdev: Make sanitize interfaces conditionally available
 2023-08-04 14:02 UTC  (8+ messages)
` [PATCH 1/3] cxl/memdev: Improve sanitize ABI descriptions
` [PATCH 2/3] cxl/memdev: Document security state in kern-doc
` [PATCH 3/3] cxl/memdev: Only show sanitize sysfs files when supported

[qemu PATCH 0/2] cxl: Handle GSL Sub-List
 2023-08-04 13:55 UTC  (5+ messages)
` [PATCH 1/2] hw/cxl: Update comments for Get Log
` [PATCH 2/2] hw/cxl: Add the Get Supported Logs Sub-List cmd

[PATCH v2 0/2] CXL/events: Fix and improve event dev_dbg() messages
 2023-08-04 12:17 UTC  (12+ messages)
` [PATCH v2 1/2] cxl/mbox: Use correct handle in events debug message
` [PATCH v2 2/2] cxl/mbox: Add handle to event processing debug

[PATCH v3 0/3] PCI/AER, CXL: Fix appropriate _OSC check for CXL RAS Cap
 2023-08-04 12:14 UTC  (7+ messages)
` [PATCH v3 1/3] cxl/pci: Fix appropriate checking for _OSC while handling CXL RAS registers
` [PATCH v3 2/3] PCI/AER: Export pcie_aer_is_native()
` [PATCH v3 3/3] cxl/pci: Replace host_bridge->native_aer with pcie_aer_is_native()

[RFC PATCH v5 0/4] CXL: Standalone switch CCI driver
 2023-08-04 11:54 UTC  (5+ messages)
` [RFC PATCH v5 1/4] cxl: mbox: Preparatory move of functions to core/mbox.c and cxlmbox.h
` [RFC PATCH v5 2/4] cxl: mbox: Factor out the mbox specific data for reuse in switch cci
` [RFC PATCH v5 3/4] PCI: Add PCI_CLASS_SERIAL_CXL_SWITCH_CCI class ID to pci_ids.h
` [RFC PATCH v5 4/4] cxl/pci: Add support for stand alone CXL Switch mailbox CCI

[RFC PATCH v2 0/4] CXL: Standalone switch CCI driver
 2023-08-04 10:46 UTC  (4+ messages)
` [RFC PATCH v2 4/4] cxl/pci: Add support for stand alone CXL Switch mailbox CCI

[RFC PATCH v4 0/4] CXL: Standalone switch CCI driver
 2023-08-04  9:38 UTC  (10+ messages)
` [RFC PATCH v4 2/4] cxl: mbox: Factor out the mbox specific data for reuse in switch cci
` [RFC PATCH v4 4/4] cxl/pci: Add support for stand alone CXL Switch mailbox CCI

[GIT PULL] Compute Express Link (CXL) Fixes for 6.5-rc5
 2023-08-03 22:52 UTC  (2+ messages)

[ANNOUNCE] ndctl v78
 2023-08-03 22:28 UTC 

[cxl:fixes] BUILD SUCCESS ad64f5952ce3ea565c7f76ec37ab41df0dde773a
 2023-08-03 13:42 UTC 

[PATCH v3 0/2] mm: use memmap_on_memory semantics for dax/kmem
 2023-08-02 15:57 UTC  (4+ messages)
` [PATCH v3 1/2] mm/memory_hotplug: split memmap_on_memory requests across memblocks
` [PATCH v3 2/2] dax/kmem: allow kmem to add memory with memmap_on_memory

[PATCH v2 0/3] mm: use memmap_on_memory semantics for dax/kmem
 2023-08-02  6:08 UTC  (11+ messages)
` [PATCH v2 1/3] mm/memory_hotplug: Export symbol mhp_supports_memmap_on_memory()
` [PATCH v2 2/3] mm/memory_hotplug: split memmap_on_memory requests across memblocks

CXL RAS flows on Linux
 2023-08-02  5:17 UTC  (3+ messages)

[PATCH V3] PCI: pciehp: Disable ACS Source Validation during hot-remove
 2023-08-02  0:19 UTC 

[PATCH] cxl/memdev: Avoid mailbox functionality on device memory CXL devices
 2023-08-01 21:03 UTC  (5+ messages)

[PATCH ndctl v2] ndctl/cxl/test: Add CXL event test
 2023-08-01 19:13 UTC  (3+ messages)

[PATCH] cxl/mbox: Fix debug message print
 2023-08-01 18:48 UTC  (7+ messages)

[PATCH RESEND 0/4] memory tiering: calculate abstract distance based on ACPI HMAT
 2023-08-01  2:35 UTC  (22+ messages)
` [PATCH RESEND 1/4] memory tiering: add abstract distance calculation algorithms management
` [PATCH RESEND 2/4] acpi, hmat: refactor hmat_register_target_initiators()
` [PATCH RESEND 3/4] acpi, hmat: calculate abstract distance with HMAT
` [PATCH RESEND 4/4] dax, kmem: calculate abstract distance with general interface

[PATCH ndctl] ndctl/cxl/test: Add CXL event test
 2023-07-31 22:16 UTC  (6+ messages)

[PATCH ndctl] cxl/memdev: initialize 'rc' in action_update_fw()
 2023-07-31 20:40 UTC  (3+ messages)

[ndctl PATCH RESEND 0/2] Fix accessors for temperature field when it is negative
 2023-07-31 18:45 UTC  (5+ messages)
  ` [ndctl PATCH RESEND 2/2] libcxl: Fix accessors for temperature field to support negative value

[cxl:fixes] BUILD SUCCESS c4b53e8ad3a7452392f3ecd882f06f3416a021e0
 2023-07-31  5:03 UTC 

[ndctl PATCH 0/2] add support for Set Alert Configuration mailbox command
 2023-07-31  3:23 UTC  (4+ messages)
  ` [ndctl PATCH 2/2] cxl: add 'set-alert-config' command to cxl tool

[PATCH v7 0/2] Fixing check patch styling issues
 2023-07-30 20:09 UTC  (6+ messages)
` [PATCH v7 1/2] cxl/mbox: Remove redundant dev_err() after failed mem alloc
` [PATCH v7 2/2] cxl/region: Remove else after return statement

[cxl:fixes] BUILD SUCCESS 11dcd3b6a3aac1cace09f35407a47a311fdb0259
 2023-07-29 10:54 UTC 

[GIT PULL] Compute Express Link (CXL) Fixes for 6.5-rc4
 2023-07-28 18:39 UTC  (2+ messages)

[ANNOUNCE/CFP] CXL Microconference at LPC 2023
 2023-07-28 17:57 UTC  (2+ messages)

[ndctl PATCH v2 RESEND 0/2] cxl-graph: add a new command to construct CXL topology graph images
 2023-07-26 20:43 UTC  (4+ messages)
  ` [ndctl PATCH v2 RESEND 1/2] cxl/list: Add parent_dport attribute to memdev and root port listing
  ` [ndctl PATCH v2 RESEND 2/2] cxl-graph: Add cxl graph command to construct CXL topology graph images

[Qemu PATCH v2 0/9] Enabling DCD emulation support in Qemu
 2023-07-26 16:17 UTC  (12+ messages)
  ` [Qemu PATCH v2 1/9] hw/cxl/cxl-mailbox-utils: Add dc_event_log_size field to output payload of identify memory device command
  ` [Qemu PATCH v2 3/9] include/hw/cxl/cxl_device: Rename mem_size as static_mem_size for type3 memory devices
  ` [Qemu PATCH v2 2/9] hw/cxl/cxl-mailbox-utils: Add dynamic capacity region representative and mailbox command support
  ` [Qemu PATCH v2 4/9] hw/mem/cxl_type3: Add support to create DC regions to type3 memory devices
  ` [Qemu PATCH v2 5/9] hw/mem/cxl_type3: Add host backend and address space handling for DC regions
  ` [Qemu PATCH v2 7/9] hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response
  ` [Qemu PATCH v2 9/9] hw/mem/cxl_type3: Add dpa range validation for accesses to dc regions
  ` [Qemu PATCH v2 8/9] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents
  ` [Qemu PATCH v2 6/9] hw/mem/cxl_type3: Add DC extent list representative and get DC extent list mailbox support

[PATCH RESEND v6 0/2] Fixing check patch styling issues
 2023-07-26  3:45 UTC  (2+ messages)

[PATCH RESEND v6 0/2] Fixing check patch styling issues
 2023-07-25 17:55 UTC  (4+ messages)
` [PATCH RESEND v6 1/2] cxl/mbox: Remove redundant dev_err() after failed mem alloc
` [PATCH RESEND v6 2/2] cxl/region: Remove else after return statement

[Qemu RFC 0/7] Early enabling of DCD emulation in Qemu
 2023-07-25 16:46 UTC  (4+ messages)

[PATCH v2 0/3] PCI/AER, CXL: Fix appropriate _OSC check for CXL RAS Cap
 2023-07-24 21:59 UTC  (10+ messages)
` [PATCH v2 1/3] cxl/pci: Fix appropriate checking for _OSC while handling CXL RAS registers
` [PATCH v2 2/3] PCI/AER: Export pcie_aer_is_native()
` [PATCH v2 3/3] cxl/pci: Replace host_bridge->native_aer with pcie_aer_is_native()

[PATCH -ndctl v2 0/2] cxl: Support memdev sanitation
 2023-07-24 21:38 UTC  (6+ messages)
` [PATCH 2/2] cxl/memdev: Introduce sanitize-memdev functionality

[NDCTL PATCH] cxl/region: Always use the correct target position
 2023-07-24 21:16 UTC  (3+ messages)

[Qemu PATCH RESEND 0/9] Enabling DCD emulation support in Qemu
 2023-07-24 18:19 UTC  (11+ messages)
  ` [Qemu PATCH RESEND 4/9] hw/mem/cxl_type3: Add support to create DC regions to type3 memory devices
  ` [Qemu PATCH RESEND 3/9] include/hw/cxl/cxl_device: Rename mem_size as static_mem_size for "
  ` [Qemu PATCH RESEND 5/9] hw/mem/cxl_type3: Add host backend and address space handling for DC regions
  ` [Qemu PATCH RESEND 2/9] hw/cxl/cxl-mailbox-utils: Add dynamic capacity region representative and mailbox command support
  ` [Qemu PATCH RESEND 6/9] hw/mem/cxl_type3: Add DC extent list representative and get DC extent list mailbox support
  ` [Qemu PATCH RESEND 1/9] hw/cxl/cxl-mailbox-utils: Add dc_event_log_size field to output payload of identify memory device command
  ` [Qemu PATCH RESEND 8/9] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents
  ` [Qemu PATCH RESEND 9/9] hw/mem/cxl_type3: Add dpa range validation for accesses to dc regions
  ` [Qemu PATCH RESEND 7/9] hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response

DCD region base address
 2023-07-24 17:10 UTC  (3+ messages)

[Qemu PATCH 0/9] Enabling DCD emulation support in Qemu
 2023-07-24 16:41 UTC  (5+ messages)

[PATCH 1/9] hw/cxl/cxl-mailbox-utils: Add dc_event_log_size field to output payload of identify memory device command
 2023-07-24 16:29 UTC  (10+ messages)
` [PATCH 2/9] hw/cxl/cxl-mailbox-utils: Add dynamic capacity region representative and mailbox command support
` [PATCH 3/9] include/hw/cxl/cxl_device: Rename mem_size as static_mem_size for type3 memory devices
` [PATCH 4/9] hw/mem/cxl_type3: Add support to create DC regions to "
` [PATCH 5/9] hw/mem/cxl_type3: Add host backend and address space handling for DC regions
` [PATCH 6/9] hw/mem/cxl_type3: Add DC extent list representative and get DC extent list mailbox support
` [PATCH 7/9] hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response
` [PATCH 8/9] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents
` [PATCH 9/9] hw/mem/cxl_type3: Add dpa range validation for accesses to dc regions

How to find the correct corresponding relationship between mem devices and target postions?
 2023-07-23  2:55 UTC  (3+ messages)

[cxl:fixes] BUILD SUCCESS 70d49bbf962ce4579bebd82938ef7f265bc3e6ae
 2023-07-22  7:20 UTC 

[PATCH 0/4] CXL: SK hynix Niagara MHSLD Device
 2023-07-21 16:35 UTC  (5+ messages)
` [PATCH 1/4] cxl/mailbox: change CCI cmd set structure to be a member, not a refernce
` [PATCH 2/4] cxl/mailbox: interface to add CCI commands to an existing CCI
` [PATCH 3/4] cxl/type3: minimum MHD cci support
` [PATCH 4/4] cxl/vendor: SK hynix Niagara Multi-Headed SLD Device

[PATCH 0/2] PCI, AER, CXL: Fix appropriate _OSC check for CXL RAS Cap
 2023-07-21 13:49 UTC  (7+ messages)
` [PATCH 2/2] cxl/pci: Fix appropriate checking for _OSC while handling CXL RAS registers


This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox