Re: [PATCH RFC] hw/cxl: type 3 devices can now present volatile or persistent memory

[Gregory Price <gregory.price@memverge.com>]

I've pushed 5 new commits to this branch here (@Jonathan I've also made
a merge request to pull them into your branch).

https://gitlab.com/gourry.memverge/qemu/-/commits/cxl-2022-10-09

They're built on top of Jonathan's extensions for the CDAT since the
CDAT has memory region relevant entries and trying to do this separate
would be unwise.

1/5: PCI_CLASS_MEMORY_CXL patch
2/5: CXL_CAPACITY_MULTIPLIER pullout patch (@Davidlohr request)
3/5: Generalizes CDATDsmas intialization ahead of multi-region
4/5: Multi-region support w/ backward compatibility
     * Requires extra eyes for CDAT and Read/Write Change Validation*
5/5: Test and documentation update


On Mon, Oct 10, 2022 at 11:25:31AM -0400, Gregory Price wrote:
> > 
> > https://gitlab.com/jic23/qemu/-/commits/cxl-2022-10-09
> > There are a few messy corners in that tree but it should work. I'll be
> > pushing out a new version in a few days.
> > 
> > I updated that in latest version to build the tables based on the
> > memdev provided.  We'll want to add the volatile support to that alongside
> > your patch.
> > 
> 
> I will rebase my --persistent-memdev and --volatile-memdev patch on your
> branch and send out the commits when i'm done.  I may also add the
> scafolding for the partitionable-pmem field but not actually expose it.